Lines Matching +full:12 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
27 #define RTW_TX_DESC_W0_BMC BIT(24)
28 #define RTW_TX_DESC_W0_LS BIT(26)
29 #define RTW_TX_DESC_W0_DISQSELSEQ BIT(31)
31 #define RTW_TX_DESC_W1_QSEL GENMASK(12, 8)
35 #define RTW_TX_DESC_W1_MORE_DATA BIT(29)
36 #define RTW_TX_DESC_W2_AGG_EN BIT(12)
37 #define RTW_TX_DESC_W2_SPE_RPT BIT(19)
39 #define RTW_TX_DESC_W2_BT_NULL BIT(23)
41 #define RTW_TX_DESC_W3_USE_RATE BIT(8)
42 #define RTW_TX_DESC_W3_DISDATAFB BIT(10)
43 #define RTW_TX_DESC_W3_USE_RTS BIT(12)
44 #define RTW_TX_DESC_W3_NAVUSEHDR BIT(15)
47 #define RTW_TX_DESC_W4_DATARATE_FB_LIMIT GENMASK(12, 8)
49 #define RTW_TX_DESC_W5_DATA_SHORT BIT(4)
51 #define RTW_TX_DESC_W5_DATA_LDPC BIT(7)
53 #define RTW_TX_DESC_W5_DATA_RTS_SHORT BIT(12)
57 #define RTW_TX_DESC_W8_EN_HWSEQ BIT(15)
58 #define RTW_TX_DESC_W9_SW_SEQ GENMASK(23, 12)
59 #define RTW_TX_DESC_W9_TIM_EN BIT(7)
75 TX_DESC_QSEL_TID12 = 12,
125 le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM);
127 while (words--)
130 le32p_replace_bits(&tx_desc->w7, __le16_to_cpu(chksum),
138 const struct rtw_chip_info *chip = rtwdev->chip;
140 chip->ops->fill_txdesc_checksum(rtwdev, pkt_info, txdesc);