| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */
15 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1)
26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0)
27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
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| H A D | regs.h | 1 /* SPDX-License-Identifier: ISC */
35 #define MT_HW_INFO_BASE ((dev)->reg_map[MT_HW_BASE])
40 #define MT_TOP_3NSS BIT(24)
45 #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134)
49 #define MT_TOP_MISC2_FW_PWR_ON BIT(1)
59 #define MT_MCU_PCIE_REMAP_2 ((dev)->reg_map[MT_PCIE_REMAP_2])
62 #define MT_PCIE_REMAP_BASE_2 ((dev)->reg_map[MT_PCIE_REMAP_BASE2])
69 #define MT_HIF(ofs) ((dev)->reg_map[MT_HIF_BASE] + (ofs))
71 #define MT_HIF_LOGIC_RST_N BIT(4)
74 #define MT_PDMA_AXI_SLPPROT_ENABLE BIT(0)
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| /freebsd/sys/contrib/dev/rtw89/ |
| H A D | txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode()
41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs()
49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs()
62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss()
71 #define RTW89_TXWD_BODY0_MORE_DATA BIT(23)
72 #define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22)
73 #define RTW89_TXWD_BODY0_FW_DL BIT(20)
75 #define RTW89_TXWD_BODY0_HDR_LLC_LEN GENMASK(15, 11)
76 #define RTW89_TXWD_BODY0_STF_MODE BIT(10)
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| H A D | reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_PWC_EV2EF_B15 BIT(15)
14 #define B_AX_PWC_EV2EF_B14 BIT(14)
15 #define B_AX_ISO_EB2CORE BIT(8)
18 #define B_AX_FEN_BB_GLB_RSTN BIT(1)
19 #define B_AX_FEN_BBRSTB BIT(0)
22 #define B_AX_SOP_ASWRM BIT(31)
23 #define B_AX_SOP_PWMM_DSWR BIT(29)
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| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
18 #define BAC_OOBS_SEL BIT(4)
20 #define B_BAC_EQ_SEL BIT(5)
24 #define B_PCIE_BIT_PSAVE BIT(15)
26 #define OFFSET_CAL_MODE BIT(13)
27 #define BAC_RX_TEST_EN BIT(6)
32 #define B_PCIE_BIT_PINOUT_DIS BIT(3)
37 #define B_PCIE_BIT_RD_SEL BIT(2)
48 #define B_AX_DEGLITCH GENMASK(11, 8)
54 #define B_AX_CLK_CALIB_EN BIT(12)
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| /freebsd/sys/contrib/dev/mediatek/mt76/mt7603/ |
| H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */
10 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22)
34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5)
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| H A D | regs.h | 1 /* SPDX-License-Identifier: ISC */
28 #define MT_INT_RX_DONE(_n) BIT(_n)
31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4)
33 #define MT_INT_RX_COHERENT BIT(20)
34 #define MT_INT_TX_COHERENT BIT(21)
35 #define MT_INT_MAC_IRQ3 BIT(27)
37 #define MT_INT_MCU_CMD BIT(30)
40 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0)
41 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1)
42 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2)
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| /freebsd/contrib/wpa/src/common/ |
| H A D | ieee802_11_defs.h | 3 * Copyright (c) 2002-2019, Jouni Malinen <j@w1.fi>
4 * Copyright (c) 2007-2008 Intel Corporation
39 #define WLAN_GET_SEQ_FRAG(seq) ((seq) & (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
41 (((seq) & (~(BIT(3) | BIT(2) | BIT(1) | BIT(0)))) >> 4)
58 #define WLAN_FC_STYPE_AUTH 11
65 #define WLAN_FC_STYPE_RTS 11
83 #define WLAN_FC_STYPE_QOS_DATA_CFACKPOLL 11
105 #define WLAN_CAPABILITY_ESS BIT(0)
106 #define WLAN_CAPABILITY_IBSS BIT(1)
107 #define WLAN_CAPABILITY_CF_POLLABLE BIT(2)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 1 //===- ARCInstrFormats.td - ARC Instruction Formats --------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
21 "\n return isUInt<"#BSz#">(N->getSExtValue());"> {
27 "\n return isInt<"#BSz#">(N->getSExtValue());"> {
31 // e.g. s3 field may encode the signed integers values -1 .. 6
34 "\n return isInt<"#BSz#">(N->getSExtValue());"> {
64 class ExtMode<bit mode, string instSfx, string asmSfx> {
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| /freebsd/sys/contrib/dev/mediatek/mt76/ |
| H A D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */
46 #define MT_TX_FREE_PAIR BIT(31)
55 #define MT_TXD1_LONG_FORMAT BIT(31)
56 #define MT_TXD1_TGID BIT(30)
58 #define MT_TXD1_AMSDU BIT(23)
62 #define MT_TXD1_HDR_INFO GENMASK(15, 11)
63 #define MT_TXD1_ETH_802_3 BIT(15)
64 #define MT_TXD1_VTA BIT(10)
67 #define MT_TXD2_FIX_RATE BIT(31)
68 #define MT_TXD2_FIXED_RATE BIT(30)
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| H A D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */
28 #define MT_RXD0_MESH BIT(18)
29 #define MT_RXD0_MHCP BIT(19)
37 #define MT_RXD1_NORMAL_WLAN_IDX GENMASK(11, 0)
38 #define MT_RXD1_NORMAL_GROUP_1 BIT(16)
39 #define MT_RXD1_NORMAL_GROUP_2 BIT(17)
40 #define MT_RXD1_NORMAL_GROUP_3 BIT(18)
41 #define MT_RXD1_NORMAL_GROUP_4 BIT(19)
42 #define MT_RXD1_NORMAL_GROUP_5 BIT(20)
44 #define MT_RXD1_NORMAL_CM BIT(23)
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| /freebsd/sys/contrib/dev/iwlwifi/fw/api/ |
| H A D | nvm-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulatory/NVM commands
61 * enum iwl_nvm_access_op - NVM access opcode
71 * enum iwl_nvm_access_target - target of the NVM_ACCESS_CMD
83 * enum iwl_nvm_section_type - section types for NVM_ACCESS_CMD
99 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
105 * struct iwl_nvm_access_cmd - Request the device to send an NVM section
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrFormats.td | 1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrFormatsV.td | 1 //===-- RISCVInstrFormatsV.td - RISC-V V Instruction Formats -*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file describes the RISC-V V extension instruction formats.
11 //===----------------------------------------------------------------------===//
65 let Inst{29-20} = vtypei{9-0};
66 let Inst{19-15} = uimm;
67 let Inst{14-12} = OPCFG.Value;
68 let Inst{11-7} = rd;
69 let Inst{6-0} = OPC_OP_V.Value;
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| /freebsd/sys/contrib/dev/rtw88/ |
| H A D | rtw8822b.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8822be_efuse_parsing()
32 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8822bu_efuse_parsing()
38 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8822bs_efuse_parsing()
43 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse()
49 efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(7)); in rtw8822b_read_efuse()
50 efuse->rfe_option = map->rfe_option; in rtw8822b_read_efuse()
51 efuse->rf_board_option = map->rf_board_option; in rtw8822b_read_efuse()
52 efuse->crystal_cap = map->xtal_k; in rtw8822b_read_efuse()
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| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
14 /* 11K + rx desc size */
18 #define BIT_RST_TRXDMA_INTF BIT(20)
19 #define BIT_RX_TAG_EN BIT(15)
23 #define BIT_DBI_RFLAG BIT(17)
24 #define BIT_DBI_WFLAG BIT(16)
26 #define BITS_DBI_ADDR_MASK GENMASK(11, 2)
31 #define BIT_MDIO_WFLAG_V1 BIT(5)
32 #define RTW_PCI_MDIO_PG_SZ BIT(5)
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| /freebsd/contrib/netbsd-tests/include/ |
| H A D | d_bitstring_27.out | 16 11 1 8 2
34 be: 0 -1 000000000000000000000000000
35 is: 0 -1 000000000000000000000000000
58 11 0
76 be: 0 -1 000000000000000000000000000
77 is: 0 -1 000000000000000000000000000
84 be: 0 -1 000000000000000000000000000
85 is: 0 -1 000000000000000000000000000
88 be: 0 -1 000000000000000000000000000
89 is: 0 -1 000000000000000000000000000
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| H A D | d_bitstring_32.out | 16 11 1 8 2
39 be: 0 -1 00000000000000000000000000000000
40 is: 0 -1 00000000000000000000000000000000
63 11 0
86 be: 0 -1 00000000000000000000000000000000
87 is: 0 -1 00000000000000000000000000000000
94 be: 0 -1 00000000000000000000000000000000
95 is: 0 -1 00000000000000000000000000000000
98 be: 0 -1 00000000000000000000000000000000
99 is: 0 -1 00000000000000000000000000000000
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | mach | 2 #------------------------------------------------------------
8 #------------------------------------------------------------
9 # if set, it's for the 64-bit version of the architecture
10 # yes, this is separate from the low-order magic number bit
11 # it's also separate from the "64-bit libraries" bit in the
14 # Reference: https://opensource.apple.com/source/cctools/cctools-949.0.1/
15 # include/mach-o/loader.h
17 0 name mach-o-cpu
20 # 32-bit ABIs.
35 >>>4 belong&0x00ffffff 11 vax8800
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| /freebsd/sys/dev/ath/ath_hal/ |
| H A D | ah_regdomain.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2005-2006 Atheros Communications, Inc.
33 * The following describe the bit masks for different passive scan
66 ADHOC_PER_11D = 0x00000008, /* must receive 11d beacon */
71 /* Bit masks for DFS per regdomain */
87 * an 8 bit regdomain value to the individual unitary reg domains
90 HAL_REG_DOMAIN regDmnEnum; /* 16 bit reg domain pair */
105 a one-on-one mapping exists */
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| /freebsd/contrib/libarchive/libarchive/test/ |
| H A D | test_zip_filename_encoding.c | 1 /*-
36 if (NULL == setlocale(LC_ALL, "en_US.UTF-8")) { in DEFINE_TEST()
37 skipping("en_US.UTF-8 locale not available on this system."); in DEFINE_TEST()
42 * Verify that UTF-8 filenames are correctly stored with in DEFINE_TEST()
43 * hdrcharset=UTF-8 option. in DEFINE_TEST()
47 if (archive_write_set_options(a, "hdrcharset=UTF-8") != ARCHIVE_OK) { in DEFINE_TEST()
48 skipping("This system cannot convert character-set" in DEFINE_TEST()
49 " for UTF-8."); in DEFINE_TEST()
57 /* Set a UTF-8 filename. */ in DEFINE_TEST()
65 /* A bit 11 of general purpose flag should be 0x08, in DEFINE_TEST()
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | smmintrin.h | 1 /*===---- smmintrin.h - SSE4 intrinsics ------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
22 __target__("sse4.1,no-evex512"), __min_vector_width__(128)))
41 /// Rounds up each element of the 128-bit vector of [4 x float] to an
42 /// integer and returns the rounded values in a 128-bit vector of
54 /// A 128-bit vector of [4 x float] values to be rounded up.
55 /// \returns A 128-bit vector of [4 x float] containing the rounded values.
58 /// Rounds up each element of the 128-bit vector of [2 x double] to an
59 /// integer and returns the rounded values in a 128-bit vector of
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| /freebsd/sys/dev/irdma/ |
| H A D | irdma.h | 1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2017 - 2022 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
48 #define IRDMA_CQPTAIL_CQP_OP_ERR BIT(31)
59 #define IRDMA_GLINT_RATE_INTRL_ENA_M BIT(6)
60 #define IRDMA_GLINT_RATE_INTRL_ENA BIT(6)
63 #define IRDMA_GLINT_DYN_CTL_INTENA BIT(0)
65 #define IRDMA_GLINT_DYN_CTL_CLEARPBA BIT(1)
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| /freebsd/sys/contrib/dev/athk/ath11k/ |
| H A D | hal_rx.h | 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
206 #define HAL_RX_PPDU_END_USER_STATS_INFO1_FC_VALID BIT(9)
207 #define HAL_RX_PPDU_END_USER_STATS_INFO1_QOS_CTRL_VALID BIT(10)
208 #define HAL_RX_PPDU_END_USER_STATS_INFO1_HT_CTRL_VALID BIT(11)
239 __le32 rsvd2[11];
253 #define HAL_RX_HT_SIG_INFO_INFO0_BW BIT(7)
256 #define HAL_RX_HT_SIG_INFO_INFO1_FEC_CODING BIT(6)
257 #define HAL_RX_HT_SIG_INFO_INFO1_GI BIT(7)
280 #define HAL_RX_VHT_SIG_A_INFO_INFO0_STBC BIT(3)
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