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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_ni_dpkg.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause AND BSD-2-Clause
4 * Copyright © 2013-2015 Freescale Semiconductor, Inc.
10 * 1. Redistributions of source code must retain the above copyright notice,
41 * Copyright © 2021-2022 Dmitry Salychev
46 * 1. Redistributions of source code must retain the above copyright
68 #define BIT(x) (1ul << (x)) macro
71 * DPKG_NUM_OF_MASKS - Number of masks per key extraction
76 * DPKG_MAX_NUM_OF_EXTRACTS - Number of extractions per key profile
81 * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dpci.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
11 #define MDIO_PG1_G1 1
16 #define OOBS_SEN_MASK GENMASK(5, 1)
18 #define BAC_OOBS_SEL BIT(4)
20 #define B_BAC_EQ_SEL BIT(5)
24 #define B_PCIE_BIT_PSAVE BIT(15)
26 #define OFFSET_CAL_MODE BIT(13)
27 #define BAC_RX_TEST_EN BIT(6)
32 #define B_PCIE_BIT_PINOUT_DIS BIT(3)
37 #define B_PCIE_BIT_RD_SEL BIT(2)
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H A Dtxrx.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
28 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode()
41 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs()
49 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_mcs()
62 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_nss()
71 #define RTW89_TXWD_BODY0_MORE_DATA BIT(23)
72 #define RTW89_TXWD_BODY0_WD_INFO_EN BIT(22)
73 #define RTW89_TXWD_BODY0_FW_DL BIT(20)
76 #define RTW89_TXWD_BODY0_STF_MODE BIT(10)
77 #define RTW89_TXWD_BODY0_WD_PAGE BIT(7)
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/freebsd/contrib/wpa/src/common/
H A Dieee802_11_defs.h3 * Copyright (c) 2002-2019, Jouni Malinen <j@w1.fi>
4 * Copyright (c) 2007-2008 Intel Corporation
39 #define WLAN_GET_SEQ_FRAG(seq) ((seq) & (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
41 (((seq) & (~(BIT(3) | BIT(2) | BIT(1) | BIT(0)))) >> 4)
44 #define WLAN_FC_TYPE_CTRL 1
50 #define WLAN_FC_STYPE_ASSOC_RESP 1
73 #define WLAN_FC_STYPE_DATA_CFACK 1
90 #define WLAN_FC_STYPE_S1G_BEACON 1
94 #define WLAN_AUTH_SHARED_KEY 1
105 #define WLAN_CAPABILITY_ESS BIT(0)
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H A Ddefs.h2 * WPA Supplicant - Common definitions
3 * Copyright (c) 2004-2018, Jouni Malinen <j@w1.fi>
12 #define WPA_CIPHER_NONE BIT(0)
13 #define WPA_CIPHER_WEP40 BIT(1)
14 #define WPA_CIPHER_WEP104 BIT(2)
15 #define WPA_CIPHER_TKIP BIT(3)
16 #define WPA_CIPHER_CCMP BIT(4)
17 #define WPA_CIPHER_AES_128_CMAC BIT(5)
18 #define WPA_CIPHER_GCMP BIT(6)
19 #define WPA_CIPHER_SMS4 BIT(7)
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/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dbitops.h1 /*-
5 * Copyright (c) 2013-2017 Mellanox Technologies, Ltd.
11 * 1. Redistributions of source code must retain the above copyright
38 #define BIT(nr) (1UL << (nr)) macro
39 #define BIT_ULL(nr) (1ULL << (nr))
44 #define BITMAP_LAST_WORD_MASK(n) (~0UL >> (BITS_PER_LONG - (n)))
46 #define BIT_MASK(nr) (1UL << ((nr) & (BITS_PER_LONG - 1)))
48 #define GENMASK(h, l) (((~0UL) >> (BITS_PER_LONG - (h) - 1)) & ((~0UL) << (l)))
49 #define GENMASK_ULL(h, l) (((~0ULL) >> (BITS_PER_LONG_LONG - (h) - 1)) & ((~0ULL) << (l)))
68 return (ffs(mask) - 1); in __ffs()
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/freebsd/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
57 * 1. Redistributions of source code must retain the above copyright
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DInstructionUtils.h1 //===-- InstructionUtils.h --------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
15 // Common utilities for manipulating instruction bit fields.
19 // Return the bit field(s) from the most significant bit (msbit) to the
20 // least significant bit (lsbit) of a 64-bit unsigned value.
24 return (bits >> lsbit) & ((1ull << (msbit - lsbit + 1)) - 1); in Bits64()
27 // Return the bit field(s) from the most significant bit (msbit) to the
28 // least significant bit (lsbit) of a 32-bit unsigned value.
32 return (bits >> lsbit) & ((1u << (msbit - lsbit + 1)) - 1); in Bits32()
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/freebsd/sys/dev/flash/flexspi/
H A Dflex_spi.h1 /*-
8 * 1. Redistributions of source code must retain the above copyright
29 #define BIT(x) (1 << (x)) macro
35 #define FSPI_MCR0_LEARN_EN BIT(15)
36 #define FSPI_MCR0_SCRFRUN_EN BIT(14)
37 #define FSPI_MCR0_OCTCOMB_EN BIT(13)
38 #define FSPI_MCR0_DOZE_EN BIT(12)
39 #define FSPI_MCR0_HSEN BIT(11)
40 #define FSPI_MCR0_SERCLKDIV BIT(8)
41 #define FSPI_MCR0_ATDF_EN BIT(7)
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/freebsd/sys/dev/qat/qat_hw/qat_dh895xcc/
H A Dadf_dh895xcc_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
8 #define ADF_DH895XCC_PMISC_BAR 1
31 #define ADF_DH895XCC_ENABLE_AE_ECC_ERR BIT(28)
32 #define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
35 #define ADF_DH895XCC_ERRSSMSH_EN BIT(3)
38 /* BIT(2) enables the logging of push/pull data errors. */
39 #define ADF_DH895XCC_PPERR_EN (BIT(2))
50 #define ADF_DH895XCC_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
51 #define ADF_DH895XCC_ERRMSK1_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Drs.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022, 2024-2025 Intel Corporation
14 * enum iwl_tlc_mng_cfg_flags - options for TLC config flags
21 * for BPSK (MCS 0) with 1 spatial
29 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0),
30 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1),
31 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2),
32 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3),
33 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4),
34 IWL_TLC_MNG_CFG_FLAGS_EHT_EXTRA_LTF_MSK = BIT(6),
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmc13xxx.txt4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892"
7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used
8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used
9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used
10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
12 Sub-nodes:
13 - codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
16 - leds : Contain the led nodes and initial register values in property
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_type_e610.h2 SPDX-License-Identifier: BSD-3-Clause
10 1. Redistributions of source code must retain the above copyright notice,
40 #ifndef BIT
41 #define BIT(a) (1UL << (a)) macro
42 #endif /* !BIT */
44 #define BIT_ULL(a) (1ULL << (a))
50 #define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
55 * ROUND_UP - round up to next arbitrary multiple (not a power of 2)
77 (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
80 (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrFormats.td1 //===-- SIInstrFormats.td - SI Instruction Encodings ----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
16 // Low bits - basic encoding information.
17 field bit SALU = 0;
18 field bit VALU = 0;
21 field bit SOP1 = 0;
22 field bit SOP2 = 0;
23 field bit SOPC = 0;
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/freebsd/contrib/jemalloc/include/jemalloc/internal/
H A Dbitmap.h10 /* Maximum bitmap bit count is 2^LG_BITMAP_MAXBITS. */
12 /* Maximum bitmap bit count is determined by maximum regions per slab. */
15 /* Maximum bitmap bit count is determined by number of extent size classes. */
18 #define BITMAP_MAXBITS (ZU(1) << LG_BITMAP_MAXBITS)
22 #define BITMAP_GROUP_NBITS (1U << LG_BITMAP_GROUP_NBITS)
23 #define BITMAP_GROUP_NBITS_MASK (BITMAP_GROUP_NBITS-1)
30 #if LG_BITMAP_MAXBITS - LG_BITMAP_GROUP_NBITS > 3
116 (BITMAP_GROUPS_L3(nbits) > BITMAP_GROUPS_L4(nbits)) + 1, \
160 * Only the first (nlevels+1) element
195 bitmap_get(bitmap_t * bitmap,const bitmap_info_t * binfo,size_t bit) bitmap_get() argument
206 bitmap_set(bitmap_t * bitmap,const bitmap_info_t * binfo,size_t bit) bitmap_set() argument
246 size_t bit = 0; bitmap_ffu() local
286 size_t bit; bitmap_ffu() local
302 size_t bit; bitmap_sfu() local
331 bitmap_unset(bitmap_t * bitmap,const bitmap_info_t * binfo,size_t bit) bitmap_unset() argument
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/freebsd/sys/contrib/dev/athk/ath10k/
H A Drx_desc.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
13 RX_ATTENTION_FLAGS_FIRST_MPDU = BIT(0),
14 RX_ATTENTION_FLAGS_LAST_MPDU = BIT(1),
15 RX_ATTENTION_FLAGS_MCAST_BCAST = BIT(2),
16 RX_ATTENTION_FLAGS_PEER_IDX_INVALID = BIT(3),
17 RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT = BIT(4),
18 RX_ATTENTION_FLAGS_POWER_MGMT = BIT(5),
19 RX_ATTENTION_FLAGS_NON_QOS = BIT(6),
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/freebsd/sys/dev/qat/qat_hw/qat_c3xxx/
H A Dadf_c3xxx_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
8 #define ADF_C3XXX_ETR_BAR 1
22 #define ADF_C3XXX_POWERGATE_PKE BIT(24)
23 #define ADF_C3XXX_POWERGATE_CY BIT(23)
28 #define ADF_C3XXX_ENABLE_AE_ECC_ERR BIT(28)
29 #define ADF_C3XXX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
32 #define ADF_C3XXX_ERRSSMSH_EN BIT(3)
36 /* BIT(2) enables the logging of push/pull data errors. */
37 #define ADF_C3XXX_PPERR_EN (BIT(2))
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/freebsd/sys/dev/qat/qat_hw/qat_200xx/
H A Dadf_200xx_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
8 #define ADF_200XX_ETR_BAR 1
22 #define ADF_200XX_POWERGATE_PKE BIT(24)
23 #define ADF_200XX_POWERGATE_CY BIT(23)
30 #define ADF_200XX_ENABLE_AE_ECC_ERR BIT(28)
31 #define ADF_200XX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
34 #define ADF_200XX_ERRSSMSH_EN BIT(3)
38 /* BIT(2) enables the logging of push/pull data errors. */
39 #define ADF_200XX_PPERR_EN (BIT(2))
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/freebsd/sys/dev/qat/qat_hw/qat_c62x/
H A Dadf_c62x_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
8 #define ADF_C62X_PMISC_BAR 1
23 #define ADF_C62X_POWERGATE_PKE BIT(24)
24 #define ADF_C62X_POWERGATE_DC BIT(23)
29 #define ADF_C62X_ENABLE_AE_ECC_ERR BIT(28)
30 #define ADF_C62X_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
35 #define ADF_C62X_ERRSSMSH_EN (BIT(3))
36 /* BIT(2) enables the logging of push/pull data errors. */
37 #define ADF_C62X_PPERR_EN (BIT(2))
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/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Davxvnniint16intrin.h1 /*===----------- avxvnniint16intrin.h - AVXVNNIINT16 intrinsics-------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
26 /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
27 /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate
28 /// signed 16-bit results. Sum these 2 results with the corresponding
29 /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
40 /// A 128-bit vector of [4 x int].
42 /// A 128-bit vector of [8 x short].
44 /// A 128-bit vector of [8 x unsigned short].
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/freebsd/secure/lib/libcrypto/man/man3/
H A DOPENSSL_ia32cap.31 .\" -*- mode: troff; coding: utf-8 -*-
46 . tm Index:\\$1\t\\n%\t"\\$2"
58 .TH OPENSSL_IA32CAP 3ossl 2025-09-30 3.5.4 OpenSSL
64 OPENSSL_ia32cap \- the x86[_64] processor capabilities vector
67 .Vb 1
74 stored internally as ten 32\-bit capability vectors and for simplicity
75 represented logically below as five 64\-bit vectors. This logical
81 environment variable capability bit modifications are applied. After toolkit
94 .IP "bit #0+4 denoting presence of Time-Stamp Counter;" 4
95 .IX Item "bit #0+4 denoting presence of Time-Stamp Counter;"
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/freebsd/sys/dev/ice/
H A Dice_adminq_cmd.h1 /* SPDX-License-Identifier: BSD-3-Clause */
8 * 1. Redistributions of source code must retain the above copyright notice,
48 ICE_RES_READ = 1,
87 #define ICE_AQC_DRIVER_UNLOADING BIT(0)
104 #define ICE_AQC_RES_ID_NVM 1
109 #define ICE_AQC_RES_ACCESS_READ 1
126 #define ICE_AQ_RES_GLBL_IN_PROG 1
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dregs.h1 /* SPDX-License-Identifier: ISC */
35 #define MT_HW_INFO_BASE ((dev)->reg_map[MT_HW_BASE])
40 #define MT_TOP_3NSS BIT(24)
45 #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134)
48 #define MT7663_TOP_MISC2_FW_STATE GENMASK(3, 1)
49 #define MT_TOP_MISC2_FW_PWR_ON BIT(1)
59 #define MT_MCU_PCIE_REMAP_2 ((dev)->reg_map[MT_PCIE_REMAP_2])
62 #define MT_PCIE_REMAP_BASE_2 ((dev)->reg_map[MT_PCIE_REMAP_BASE2])
69 #define MT_HIF(ofs) ((dev)->reg_map[MT_HIF_BASE] + (ofs))
71 #define MT_HIF_LOGIC_RST_N BIT(4)
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/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_inline.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
19 #define ADF_C4XXX_SADB_SIZE_BIT BIT(24)
21 ((accel_dev)->aram_info->sadb_region_size / 32)
24 /* SADB CTRL register bit offsets */
26 #define ADF_C4XXX_MAX_CHAIN_LEN_BIT_OFFS 1
39 #define ADF_C4XXX_STATS_REQUEST_ENABLED BIT(16)
40 #define ADF_C4XXX_STATS_REQUEST_DISABLED ~BIT(16)
45 #define ADF_C4XXX_MAC_STATS_READY BIT(0)
48 #define ADF_C4XXX_MAC_ERROR_TX_UNDERRUN BIT(6)
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/freebsd/sys/amd64/vmm/amd/
H A Damdvi_priv.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
13 * 1. Redistributions of source code must retain the above copyright
37 #define BIT(n) (1ULL << (n)) macro
38 /* Return value of bits[n:m] where n and (n >= ) m are bit positions. */
40 ((1 << (((n) - (m)) + 1)) - 1))
45 #define AMDVI_PCI_CAP_IOTLB BIT(0) /* IOTLB is supported. */
46 #define AMDVI_PCI_CAP_HT BIT(1) /* HyperTransport tunnel support. */
47 #define AMDVI_PCI_CAP_NPCACHE BIT(2) /* Not present page cached. */
48 #define AMDVI_PCI_CAP_EFR BIT(3) /* Extended features. */
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