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Searched +full:0 +full:xff500000 (Results 1 – 10 of 10) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3308-cru.yaml72 reg = <0xff500000 0x1000>;
/linux/Documentation/devicetree/bindings/usb/
H A Damlogic,meson-g12a-usb-ctrl.yaml81 "^usb@[0-9a-f]+$":
202 reg = <0xffe09000 0xa0>;
218 reg = <0xff400000 0x40000>;
231 reg = <0xff500000 0x100000>;
235 snps,quirk-frame-length-adjustment = <0x20>;
/linux/drivers/mtd/maps/
H A Dichxrom.c30 #define BIOS_CNTL 0x4e
31 #define FWH_DEC_EN1 0xE3
32 #define FWH_DEC_EN2 0xF0
33 #define FWH_SEL1 0xE8
34 #define FWH_SEL2 0xEE
83 window->phys = 0; in ichxrom_cleanup()
84 window->size = 0; in ichxrom_cleanup()
113 window->phys = 0; in ichxrom_init_one()
115 if (byte == 0xff) { in ichxrom_init_one()
116 window->phys = 0xffc00000; in ichxrom_init_one()
[all …]
H A Desb2rom.c34 #define BIOS_CNTL 0xDC
35 #define BIOS_LOCK_ENABLE 0x02
36 #define BIOS_WRITE_ENABLE 0x01
39 #define FWH_DEC_EN1 0xD8
40 #define FWH_F8_EN 0x8000
41 #define FWH_F0_EN 0x4000
42 #define FWH_E8_EN 0x2000
43 #define FWH_E0_EN 0x1000
44 #define FWH_D8_EN 0x0800
45 #define FWH_D0_EN 0x0400
[all …]
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3562.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
64 reg = <0x0 0x1>;
76 reg = <0x0 0x2>;
88 reg = <0x0 0x3>;
103 arm,psci-suspend-param = <0x0010000>;
147 opp-supported-hw = <0xf9 0xffff>;
[all …]
H A Drk3368.dtsi43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
78 cpu_l0: cpu@0 {
81 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
97 reg = <0x0 0x2>;
105 reg = <0x0 0x3>;
113 reg = <0x0 0x100>;
121 reg = <0x0 0x101>;
129 reg = <0x0 0x102>;
[all …]
H A Drk3308.dtsi44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
72 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
95 arm,psci-suspend-param = <0x0010000>;
109 cpu0_opp_table: opp-table-0 {
149 #clock-cells = <0>;
167 #clock-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi62 #size-cells = <0>;
69 reg = <0x500>;
79 reg = <0x501>;
89 reg = <0x502>;
99 reg = <0x503>;
108 cpu_opp_table: opp-table-0 {
169 * The rk3288 cannot use the memory area above 0xfe000000
179 reg = <0x0 0xfe000000 0x0 0x1000000>;
187 #clock-cells = <0>;
203 reg = <0x0 0xff810000 0x0 0x20>;
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi107 reg = <0x0 0x05000000 0x0 0x300000>;
113 reg = <0x0 0x05300000 0x0 0x2000000>;
120 size = <0x0 0x10000000>;
121 alignment = <0x0 0x400000>;
138 reg = <0x0 0xfc000000 0x0 0x400000>,
139 <0x0 0xff648000 0x0 0x2000>,
140 <0x0 0xfc400000 0x0 0x200000>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
146 bus-range = <0x0 0xff>;
[all …]