Searched +full:0 +full:xfeb00000 (Results 1 – 18 of 18) sorted by relevance
15 #define SP5100_WDT_MEM_MAP_SIZE 0x0816 #define SP5100_WDT_CONTROL(base) ((base) + 0x00) /* Watchdog Control */17 #define SP5100_WDT_COUNT(base) ((base) + 0x04) /* Watchdog Count */19 #define SP5100_WDT_START_STOP_BIT BIT(0)25 #define SP5100_PM_IOPORTS_SIZE 0x0233 #define SP5100_IO_PM_INDEX_REG 0xCD634 #define SP5100_IO_PM_DATA_REG 0xCD737 #define SP5100_SB_RESOURCE_MMIO_BASE 0x9C39 #define SP5100_PM_WATCHDOG_CONTROL 0x6940 #define SP5100_PM_WATCHDOG_BASE 0x6C[all …]
68 "^port@[0-3]$":73 - port@0121 - const: du.0133 port@0:134 description: DPAD 0142 - port@0170 - const: du.0183 - const: du.0187 port@0:188 description: DPAD 0[all …]
27 #size-cells = <0>;29 cpu0: cpu@0 {32 reg = <0>;51 L2_CA7: cache-controller-0 {62 #clock-cells = <0>;64 clock-frequency = <0>;77 #clock-cells = <0>;79 clock-frequency = <0>;93 reg = <0 0xe6020000 0 0x0c>;104 reg = <0 0xe6050000 0 0x50>;[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;60 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;69 clock-frequency = <0>;87 #clock-cells = <0>;[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;80 #clock-cells = <0>;82 clock-frequency = <0>;87 #clock-cells = <0>;89 clock-frequency = <0>;95 #clock-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;38 #clock-cells = <0>;39 clock-frequency = <0>;44 #size-cells = <0>;46 a53_0: cpu@0 {48 reg = <0x0>;[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;67 #size-cells = <0>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;27 #clock-cells = <0>;28 clock-frequency = <0>;31 cluster0_opp: opp-table-0 {66 #size-cells = <0>;88 a76_0: cpu@0 {90 reg = <0>;102 reg = <0x100>;114 reg = <0x10000>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;26 #size-cells = <0>;28 a76_0: cpu@0 {30 reg = <0>;37 L3_CA76_0: cache-controller-0 {47 #clock-cells = <0>;49 clock-frequency = <0>;54 #clock-cells = <0>;56 clock-frequency = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;44 #clock-cells = <0>;45 clock-frequency = <0>;48 cluster0_opp: opp-table-0 {[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;47 cluster0_opp: opp-table-0 {[all …]
23 * The external audio clocks are configured as 0 Hz fixed frequency29 #clock-cells = <0>;30 clock-frequency = <0>;35 #clock-cells = <0>;36 clock-frequency = <0>;41 #clock-cells = <0>;42 clock-frequency = <0>;48 #clock-cells = <0>;49 clock-frequency = <0>;52 cluster0_opp: opp-table-0 {[all …]
56 #size-cells = <0>;91 cpu_l0: cpu@0 {94 reg = <0x0>;115 reg = <0x100>;134 reg = <0x200>;153 reg = <0x300>;172 reg = <0x400>;193 reg = <0x500>;212 reg = <0x600>;233 reg = <0x700>;[all …]