Lines Matching +full:0 +full:xfeb00000
19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
48 reg = <0x0>;
65 #clock-cells = <0>;
67 clock-frequency = <0>;
83 #clock-cells = <0>;
84 clock-frequency = <0>;
99 reg = <0 0xe6020000 0 0x0c>;
110 reg = <0 0xe6050000 0 0x50>;
114 gpio-ranges = <&pfc 0 0 9>;
125 reg = <0 0xe6051000 0 0x50>;
129 gpio-ranges = <&pfc 0 32 32>;
140 reg = <0 0xe6052000 0 0x50>;
144 gpio-ranges = <&pfc 0 64 32>;
155 reg = <0 0xe6053000 0 0x50>;
159 gpio-ranges = <&pfc 0 96 10>;
170 reg = <0 0xe6054000 0 0x50>;
174 gpio-ranges = <&pfc 0 128 32>;
185 reg = <0 0xe6055000 0 0x50>;
189 gpio-ranges = <&pfc 0 160 21>;
200 reg = <0 0xe6055400 0 0x50>;
204 gpio-ranges = <&pfc 0 192 14>;
214 reg = <0 0xe6060000 0 0x508>;
221 reg = <0 0xe60f0000 0 0x1004>;
234 reg = <0 0xe6130000 0 0x1004>;
253 reg = <0 0xe6140000 0 0x1004>;
272 reg = <0 0xe6148000 0 0x1004>;
290 reg = <0 0xe6150000 0 0x1000>;
294 #power-domain-cells = <0>;
301 reg = <0 0xe6160000 0 0x0200>;
307 reg = <0 0xe6180000 0 0x0400>;
313 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
320 #thermal-sensor-cells = <0>;
327 reg = <0 0xe61c0000 0 0x200>;
328 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
341 reg = <0 0xe61e0000 0 0x30>;
355 reg = <0 0xe6fc0000 0 0x30>;
370 reg = <0 0xe6fd0000 0 0x30>;
385 reg = <0 0xe6fe0000 0 0x30>;
399 reg = <0 0xffc00000 0 0x30>;
413 #size-cells = <0>;
416 reg = <0 0xe6500000 0 0x40>;
421 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
422 <&dmac2 0x91>, <&dmac2 0x90>;
430 #size-cells = <0>;
433 reg = <0 0xe6508000 0 0x40>;
438 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
439 <&dmac2 0x93>, <&dmac2 0x92>;
447 #size-cells = <0>;
450 reg = <0 0xe6510000 0 0x40>;
455 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
456 <&dmac2 0x95>, <&dmac2 0x94>;
464 #size-cells = <0>;
467 reg = <0 0xe66d0000 0 0x40>;
472 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
482 reg = <0 0xe6540000 0 0x60>;
488 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
489 <&dmac2 0x31>, <&dmac2 0x30>;
500 reg = <0 0xe66a0000 0 0x60>;
506 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
516 reg = <0 0xe6590000 0 0x200>;
519 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
520 <&usb_dmac1 0>, <&usb_dmac1 1>;
533 reg = <0 0xe65a0000 0 0x100>;
547 reg = <0 0xe65b0000 0 0x100>;
561 reg = <0x0 0xe6601000 0 0x1000>;
570 reg = <0 0xe66c0000 0 0x8000>;
596 reg = <0 0xe6700000 0 0x10000>;
615 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
624 reg = <0 0xe7300000 0 0x10000>;
643 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
652 reg = <0 0xe7310000 0 0x10000>;
679 reg = <0 0xe6740000 0 0x1000>;
680 renesas,ipmmu-main = <&ipmmu_mm 0>;
687 reg = <0 0xe7740000 0 0x1000>;
695 reg = <0 0xe6570000 0 0x1000>;
703 reg = <0 0xe67b0000 0 0x1000>;
712 reg = <0 0xec670000 0 0x1000>;
720 reg = <0 0xfd800000 0 0x1000>;
728 reg = <0 0xffc80000 0 0x1000>;
736 reg = <0 0xfe6b0000 0 0x1000>;
744 reg = <0 0xfebd0000 0 0x1000>;
752 reg = <0 0xfe990000 0 0x1000>;
761 reg = <0 0xe6800000 0 0x800>;
802 #size-cells = <0>;
809 reg = <0 0xe6c30000 0 0x1000>;
825 reg = <0 0xe6c38000 0 0x1000>;
840 reg = <0 0xe6e30000 0 0x8>;
850 reg = <0 0xe6e31000 0 0x8>;
860 reg = <0 0xe6e32000 0 0x8>;
870 reg = <0 0xe6e33000 0 0x8>;
881 reg = <0 0xe6e60000 0 64>;
887 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
888 <&dmac2 0x51>, <&dmac2 0x50>;
898 reg = <0 0xe6e68000 0 64>;
904 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
905 <&dmac2 0x53>, <&dmac2 0x52>;
915 reg = <0 0xe6e88000 0 64>;
921 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
922 <&dmac2 0x13>, <&dmac2 0x12>;
932 reg = <0 0xe6c50000 0 64>;
938 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
948 reg = <0 0xe6c40000 0 64>;
954 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
964 reg = <0 0xe6f30000 0 64>;
970 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
971 <&dmac2 0x5b>, <&dmac2 0x5a>;
981 reg = <0 0xe6e90000 0 0x64>;
984 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
985 <&dmac2 0x41>, <&dmac2 0x40>;
990 #size-cells = <0>;
997 reg = <0 0xe6ea0000 0 0x64>;
1000 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1001 <&dmac2 0x43>, <&dmac2 0x42>;
1006 #size-cells = <0>;
1013 reg = <0 0xe6c00000 0 0x64>;
1016 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1021 #size-cells = <0>;
1028 reg = <0 0xe6c10000 0 0x64>;
1031 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1036 #size-cells = <0>;
1042 reg = <0 0xe6ef4000 0 0x1000>;
1055 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1061 * clkout : #clock-cells = <0>; <&rcar_sound>;
1065 reg = <0 0xec500000 0 0x1000>, /* SCU */
1066 <0 0xec5a0000 0 0x100>, /* ADG */
1067 <0 0xec540000 0 0x1000>, /* SSIU */
1068 <0 0xec541000 0 0x280>, /* SSI */
1069 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1083 "mix.1", "mix.0",
1084 "ctu.1", "ctu.0",
1085 "dvc.0", "dvc.1",
1095 ctu00: ctu-0 { };
1106 dvc0: dvc-0 {
1107 dmas = <&audma0 0xbc>;
1111 dmas = <&audma0 0xbe>;
1117 mix0: mix-0 { };
1124 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1129 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1137 dmas = <&audma0 0x07>, <&audma0 0x08>,
1138 <&audma0 0x6f>, <&audma0 0x70>;
1143 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1144 <&audma0 0x71>, <&audma0 0x72>;
1153 reg = <0 0xec520000 0 0x800>;
1165 reg = <0 0xec700000 0 0x10000>;
1194 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1206 reg = <0 0xee080000 0 0x100>;
1218 reg = <0 0xee080100 0 0x100>;
1232 reg = <0 0xee080200 0 0x700>;
1244 reg = <0 0xee140000 0 0x2000>;
1258 reg = <0 0xee200000 0 0x200>,
1259 <0 0x08000000 0 0x04000000>,
1260 <0 0xee208000 0 0x100>;
1267 #size-cells = <0>;
1274 #address-cells = <0>;
1276 reg = <0x0 0xf1010000 0 0x1000>,
1277 <0x0 0xf1020000 0 0x20000>,
1278 <0x0 0xf1040000 0 0x20000>,
1279 <0x0 0xf1060000 0 0x20000>;
1290 reg = <0 0xfe960000 0 0x8000>;
1300 reg = <0 0xfea20000 0 0x5000>;
1310 reg = <0 0xfea28000 0 0x5000>;
1320 reg = <0 0xfe96f000 0 0x200>;
1329 reg = <0 0xfea27000 0 0x200>;
1338 reg = <0 0xfea2f000 0 0x200>;
1348 reg = <0 0xfea40000 0 0x1000>;
1357 reg = <0 0xfea50000 0 0x1000>;
1365 reg = <0 0xfeb00000 0 0x40000>;
1369 clock-names = "du.0", "du.1";
1371 reset-names = "du.0";
1374 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1380 #size-cells = <0>;
1382 port@0 {
1383 reg = <0>;
1404 reg = <0 0xfeb90000 0 0x20>;
1414 #size-cells = <0>;
1416 port@0 {
1417 reg = <0>;
1431 reg = <0 0xfeb90100 0 0x20>;
1439 #size-cells = <0>;
1441 port@0 {
1442 reg = <0>;
1456 reg = <0 0xfff00044 0 4>;