/linux/arch/arm/mach-spear/ |
H A D | spear1310.c | 21 #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) 22 #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) 26 platform_device_register_simple("spear-cpufreq", -1, NULL, 0); in spear1310_dt_init() 38 * 0xD8000000 0xFA000000
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/linux/arch/arm/mach-omap2/ |
H A D | iomap.h | 33 #define OMAP2_L3_IO_OFFSET 0x90000000 36 #define OMAP2_L4_IO_OFFSET 0xb2000000 39 #define OMAP4_L3_IO_OFFSET 0xb4000000 42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000 45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ 61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ 65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ 70 /* 0x6e000000 --> 0xfe000000 */ [all …]
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/linux/arch/arm/mach-footbridge/include/mach/ |
H A D | hardware.h | 13 * 0xff800000 0x40000000 1MB X-Bus 14 * 0xff000000 0x7c000000 1MB PCI I/O space 15 * 0xfe000000 0x42000000 1MB CSR 16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) 17 * 0xfc000000 0x79000000 1MB PCI IACK/special space 18 * 0xfb000000 0x7a000000 16MB PCI Config type 1 19 * 0xfa000000 0x7b000000 16MB PCI Config type 0 20 * 0xf9000000 0x50000000 1MB Cache flush 21 * 0xf0000000 0x80000000 16MB ISA memory 24 #define XBUS_SIZE 0x00100000 [all …]
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/linux/arch/arm/mach-pxa/ |
H A D | pxa-regs.h | 14 #define UNCACHED_PHYS_0 0xfe000000 15 #define UNCACHED_PHYS_0_SIZE 0x00100000 20 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff 21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff 22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff 23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff 24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff 25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff 26 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff 31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-80x0.dtsi | 24 #define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000)) 25 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 45 #define CP11X_PCIEx_MEM_BASE(iface) (0xfa000000 + (iface * 0x1000000)) 46 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7100-common.dtsi | 30 reg = <0x0 0x80000000 0x2 0x0>; 51 reg = <0x0 0xfa000000 0x0 0x1000000>; 57 reg = <0x10 0x7a000000 0x0 0x1000000>; 64 dma-ranges = <0x00 0x80000000 0x00 0x80000000 0x00 0x7a000000>, 65 <0x00 0xfa000000 0x10 0x7a000000 0x00 0x01000000>, 66 <0x00 0xfb000000 0x00 0xfb000000 0x07 0x85000000>; 77 pinctrl-0 = <&gmac_pins>; 83 #size-cells = <0>; 89 gmac_pins: gmac-0 { 96 slew-rate = <0>; [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | rockchip,rk3399-pcie-ep.yaml | 50 reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0xfa000000 0x0 0x2000000>; 63 phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; 64 phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; 67 pinctrl-0 = <&pcie_clkreqnb_cpm>;
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/linux/arch/powerpc/boot/dts/ |
H A D | ep8248e.dts | 26 #size-cells = <0>; 28 PowerPC,8248@0 { 30 reg = <0>; 35 timebase-frequency = <0>; 36 clock-frequency = <0>; 46 reg = <0xf0010100 0x40>; 48 ranges = <0 0 0xfc000000 0x04000000 49 1 0 0xfa000000 0x00008000>; 51 flash@0,3800000 { 53 reg = <0 0x3800000 0x800000>; [all …]
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H A D | ep88xc.dts | 19 #size-cells = <0>; 21 PowerPC,885@0 { 23 reg = <0x0>; 28 timebase-frequency = <0>; 29 bus-frequency = <0>; 30 clock-frequency = <0>; 38 reg = <0x0 0x0>; 45 reg = <0xfa200100 0x40>; 48 0x0 0x0 0xfc000000 0x4000000 49 0x3 0x0 0xfa000000 0x1000000 [all …]
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H A D | mpc8308rdb.dts | 26 #size-cells = <0>; 28 PowerPC,8308@0 { 30 reg = <0x0>; 35 timebase-frequency = <0>; // from bootloader 36 bus-frequency = <0>; // from bootloader 37 clock-frequency = <0>; // from bootloader 43 reg = <0x00000000 0x08000000>; // 128MB at 0 50 reg = <0xe0005000 0x1000>; 51 interrupts = <77 0x8>; 57 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8313erdb.dts | 26 #size-cells = <0>; 28 PowerPC,8313@0 { 30 reg = <0x0>; 35 timebase-frequency = <0>; // from bootloader 36 bus-frequency = <0>; // from bootloader 37 clock-frequency = <0>; // from bootloader 43 reg = <0x00000000 0x08000000>; // 128MB at 0 50 reg = <0xe0005000 0x1000>; 51 interrupts = <77 0x8>; 57 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8379_rdb.dts | 25 #size-cells = <0>; 27 PowerPC,8379@0 { 29 reg = <0x0>; 34 timebase-frequency = <0>; 35 bus-frequency = <0>; 36 clock-frequency = <0>; 42 reg = <0x00000000 0x10000000>; // 256MB at 0 49 reg = <0xe0005000 0x1000>; 50 interrupts = <77 0x8>; 56 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8315erdb.dts | 27 #size-cells = <0>; 29 PowerPC,8315@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; // from bootloader 37 bus-frequency = <0>; // from bootloader 38 clock-frequency = <0>; // from bootloader 44 reg = <0x00000000 0x08000000>; // 128MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8377_rdb.dts | 27 #size-cells = <0>; 29 PowerPC,8377@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 44 reg = <0x00000000 0x10000000>; // 256MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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H A D | mpc8378_rdb.dts | 27 #size-cells = <0>; 29 PowerPC,8378@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; 37 bus-frequency = <0>; 38 clock-frequency = <0>; 44 reg = <0x00000000 0x10000000>; // 256MB at 0 51 reg = <0xe0005000 0x1000>; 52 interrupts = <77 0x8>; 58 ranges = <0x0 0x0 0xfe000000 0x00800000 [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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/linux/arch/arm/mach-sa1100/ |
H A D | generic.c | 70 return 0; in sa11x0_getspeed() 71 return sa11x0_freq_table[PPCR & 0xf].frequency; in sa11x0_getspeed() 89 PSPR = 0; in sa1100_power_off() 99 /* Jump into ROM at address 0 */ in sa11x0_restart() 100 soft_restart(0); in sa11x0_restart() 119 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K), 123 static u64 sa11x0udc_dma_mask = 0xffffffffUL; 130 .coherent_dma_mask = 0xffffffff, 137 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K), 149 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K), [all …]
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
H A D | phy.c | 52 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92ee_phy_query_bb_reg() 142 u8 rfpi_enable = 0; in _rtl92ee_phy_rf_serial_read() 145 offset &= 0xff; in _rtl92ee_phy_rf_serial_read() 149 return 0xFFFFFFFF; in _rtl92ee_phy_rf_serial_read() 175 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92ee_phy_rf_serial_read() 194 offset &= 0xff; in _rtl92ee_phy_rf_serial_write() 196 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl92ee_phy_rf_serial_write() 199 "RFW-%d Addr[0x%x]=0x%x\n", rfpath, in _rtl92ee_phy_rf_serial_write() 219 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92ee_phy_bb_config() 226 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl92ee_phy_bb_config() [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | s5pv210.dtsi | 46 #size-cells = <0>; 48 cpu@0 { 51 reg = <0>; 55 xxti: oscillator-0 { 57 clock-frequency = <0>; 59 #clock-cells = <0>; 64 clock-frequency = <0>; 66 #clock-cells = <0>; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, [all …]
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
H A D | phy.c | 23 } while (0) 53 rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x3); in rtl8812ae_fixspur() 54 /* 0x8AC[11:10] = 2'b11*/ in rtl8812ae_fixspur() 56 rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x2); in rtl8812ae_fixspur() 57 /* 0x8AC[11:10] = 2'b10*/ in rtl8812ae_fixspur() 64 rtl_set_bbreg(hw, RRFMOD, 0x300, 0x3); in rtl8812ae_fixspur() 65 /*0x8AC[9:8] = 2'b11*/ in rtl8812ae_fixspur() 67 /* 0x8C4[30] = 1*/ in rtl8812ae_fixspur() 71 /*0x8C4[30] = 1*/ in rtl8812ae_fixspur() 73 rtl_set_bbreg(hw, RRFMOD, 0x300, 0x2); in rtl8812ae_fixspur() [all …]
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/linux/arch/arm64/boot/dts/altera/ |
H A D | socfpga_stratix10.dtsi | 21 service_reserved: svcbuffer@0 { 23 reg = <0x0 0x0 0x0 0x1000000>; 24 alignment = <0x1000>; 31 #size-cells = <0>; 33 cpu0: cpu@0 { 38 reg = <0x0>; 46 reg = <0x1>; 54 reg = <0x2>; 62 reg = <0x3>; 86 #address-cells = <0x2>; [all …]
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/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_agilex.dtsi | 22 service_reserved: svcbuffer@0 { 24 reg = <0x0 0x0 0x0 0x2000000>; 25 alignment = <0x1000>; 32 #size-cells = <0>; 34 cpu0: cpu@0 { 38 reg = <0x0>; 45 reg = <0x1>; 52 reg = <0x2>; 59 reg = <0x3>; 77 #address-cells = <0x2>; [all …]
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/linux/drivers/net/wireless/realtek/rtl8xxxu/ |
H A D | 8192e.c | 20 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7}, 21 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00}, 22 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05}, 23 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05}, 24 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01}, 25 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00}, 26 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f}, 27 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00}, 28 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f}, 29 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66}, [all …]
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/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | cwsr_trap_handler.h | 24 0xbf820001, 0xbf820121, 25 0xb8f4f802, 0x89748674, 26 0xb8f5f803, 0x8675ff75, 27 0x00000400, 0xbf850017, 28 0xc00a1e37, 0x00000000, 29 0xbf8c007f, 0x87777978, 30 0xbf840005, 0x8f728374, 31 0xb972e0c2, 0xbf800002, 32 0xb9740002, 0xbe801d78, 33 0xb8f5f803, 0x8675ff75, [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-base.dtsi | 51 #size-cells = <0>; 79 cpu_l0: cpu@0 { 82 reg = <0x0 0x0>; 89 i-cache-size = <0x8000>; 92 d-cache-size = <0x8000>; 101 reg = <0x0 0x1>; 108 i-cache-size = <0x8000>; 111 d-cache-size = <0x8000>; 120 reg = <0x0 0x2>; 127 i-cache-size = <0x8000>; [all …]
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