Lines Matching +full:0 +full:xfa000000
33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
73 /* 0x6D000000 --> 0xfd000000 */
77 /* 0x6c000000 --> 0xfc000000 */
83 /* 0x58000000 --> 0xfc100000 */
84 #define DSP_MEM_2420_VIRT 0xfc100000
85 #define DSP_MEM_2420_SIZE 0x28000
87 /* 0x59000000 --> 0xfc128000 */
88 #define DSP_IPI_2420_VIRT 0xfc128000
91 /* 0x5a000000 --> 0xfc129000 */
92 #define DSP_MMU_2420_VIRT 0xfc129000
104 #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
108 #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
127 /* 0x49000000 --> 0xfb000000 */
132 /* 0x54000000 --> 0xfe800000 */
137 /* 0x6e000000 --> 0xfe000000 */
142 /* 0x6c000000 --> 0xfc000000 */
147 /* 0x6D000000 --> 0xfd000000 */
160 #define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
164 #define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
169 /* 0x48000000 --> 0xfa000000 */
174 /* 0x49000000 --> 0xfb000000 */
182 #define L3_54XX_PHYS L3_54XX_BASE /* 0x44000000 --> 0xf8000000 */
186 #define L4_54XX_PHYS L4_54XX_BASE /* 0x4a000000 --> 0xfc000000 */
190 #define L4_WK_54XX_PHYS L4_WK_54XX_BASE /* 0x4ae00000 --> 0xfce00000 */
194 #define L4_PER_54XX_PHYS L4_PER_54XX_BASE /* 0x48000000 --> 0xfa000000 */
204 * L3_MAIN_SN_DRA7XX_PHYS 0x44000000 --> 0xf8000000
205 * The overall space is 24MiB (0x4400_0000<->0x457F_FFFF), but mapping
213 * L4_PER1_DRA7XX_PHYS (0x4800_000<>0x480D_2FFF) -> 0.82MiB (alloc 1MiB)
214 * (0x48000000<->0x48100000) <=> (0xFA000000<->0xFA100000)
221 * L4_CFG_MPU_DRA7XX_PHYS (0x48210000<>0x482A_F2FF) -> 0.62MiB (alloc 1MiB)
222 * (0x48210000<->0x48310000) <=> (0xFA210000<->0xFA310000)
230 * L4_PER2_DRA7XX_PHYS (0x4840_0000<>0x4848_8FFF) -> .53MiB (alloc 1MiB)
231 * (0x48400000<->0x48500000) <=> (0xFA400000<->0xFA500000)
238 * L4_PER3_DRA7XX_PHYS (0x4880_0000<>0x489E_0FFF) -> 1.87MiB (alloc 2MiB)
239 * (0x48800000<->0x48A00000) <=> (0xFA800000<->0xFAA00000)
246 * L4_CFG_DRA7XX_PHYS (0x4A00_0000<>0x4A22_BFFF) ->2.17MiB (alloc 3MiB)?
247 * (0x4A000000<->0x4A300000) <=> (0xFC000000<->0xFC300000)
254 * L4_WKUP_DRA7XX_PHYS (0x4AE0_0000<>0x4AE3_EFFF) -> .24 mb (alloc 1MiB)?
255 * (0x4AE00000<->4AF00000) <=> (0xFCE00000<->0xFCF00000)