Lines Matching +full:0 +full:xfa000000
20 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7},
21 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00},
22 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
23 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
24 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
25 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
26 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
27 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
28 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
29 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66},
30 {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff}, {0x4cd, 0xff},
31 {0x4ce, 0x01}, {0x500, 0x26}, {0x501, 0xa2}, {0x502, 0x2f},
32 {0x503, 0x00}, {0x504, 0x28}, {0x505, 0xa3}, {0x506, 0x5e},
33 {0x507, 0x00}, {0x508, 0x2b}, {0x509, 0xa4}, {0x50a, 0x5e},
34 {0x50b, 0x00}, {0x50c, 0x4f}, {0x50d, 0xa4}, {0x50e, 0x00},
35 {0x50f, 0x00}, {0x512, 0x1c}, {0x514, 0x0a}, {0x516, 0x0a},
36 {0x525, 0x4f}, {0x540, 0x12}, {0x541, 0x64}, {0x550, 0x10},
37 {0x551, 0x10}, {0x559, 0x02}, {0x55c, 0x50}, {0x55d, 0xff},
38 {0x605, 0x30}, {0x608, 0x0e}, {0x609, 0x2a}, {0x620, 0xff},
39 {0x621, 0xff}, {0x622, 0xff}, {0x623, 0xff}, {0x624, 0xff},
40 {0x625, 0xff}, {0x626, 0xff}, {0x627, 0xff}, {0x638, 0x50},
41 {0x63c, 0x0a}, {0x63d, 0x0a}, {0x63e, 0x0e}, {0x63f, 0x0e},
42 {0x640, 0x40}, {0x642, 0x40}, {0x643, 0x00}, {0x652, 0xc8},
43 {0x66e, 0x05}, {0x700, 0x21}, {0x701, 0x43}, {0x702, 0x65},
44 {0x703, 0x87}, {0x708, 0x21}, {0x709, 0x43}, {0x70a, 0x65},
45 {0x70b, 0x87},
46 {0xffff, 0xff},
50 {0x800, 0x80040000}, {0x804, 0x00000003},
51 {0x808, 0x0000fc00}, {0x80c, 0x0000000a},
52 {0x810, 0x10001331}, {0x814, 0x020c3d10},
53 {0x818, 0x02220385}, {0x81c, 0x00000000},
54 {0x820, 0x01000100}, {0x824, 0x00390204},
55 {0x828, 0x01000100}, {0x82c, 0x00390204},
56 {0x830, 0x32323232}, {0x834, 0x30303030},
57 {0x838, 0x30303030}, {0x83c, 0x30303030},
58 {0x840, 0x00010000}, {0x844, 0x00010000},
59 {0x848, 0x28282828}, {0x84c, 0x28282828},
60 {0x850, 0x00000000}, {0x854, 0x00000000},
61 {0x858, 0x009a009a}, {0x85c, 0x01000014},
62 {0x860, 0x66f60000}, {0x864, 0x061f0000},
63 {0x868, 0x30303030}, {0x86c, 0x30303030},
64 {0x870, 0x00000000}, {0x874, 0x55004200},
65 {0x878, 0x08080808}, {0x87c, 0x00000000},
66 {0x880, 0xb0000c1c}, {0x884, 0x00000001},
67 {0x888, 0x00000000}, {0x88c, 0xcc0000c0},
68 {0x890, 0x00000800}, {0x894, 0xfffffffe},
69 {0x898, 0x40302010}, {0x900, 0x00000000},
70 {0x904, 0x00000023}, {0x908, 0x00000000},
71 {0x90c, 0x81121313}, {0x910, 0x806c0001},
72 {0x914, 0x00000001}, {0x918, 0x00000000},
73 {0x91c, 0x00010000}, {0x924, 0x00000001},
74 {0x928, 0x00000000}, {0x92c, 0x00000000},
75 {0x930, 0x00000000}, {0x934, 0x00000000},
76 {0x938, 0x00000000}, {0x93c, 0x00000000},
77 {0x940, 0x00000000}, {0x944, 0x00000000},
78 {0x94c, 0x00000008}, {0xa00, 0x00d0c7c8},
79 {0xa04, 0x81ff000c}, {0xa08, 0x8c838300},
80 {0xa0c, 0x2e68120f}, {0xa10, 0x95009b78},
81 {0xa14, 0x1114d028}, {0xa18, 0x00881117},
82 {0xa1c, 0x89140f00}, {0xa20, 0x1a1b0000},
83 {0xa24, 0x090e1317}, {0xa28, 0x00000204},
84 {0xa2c, 0x00d30000}, {0xa70, 0x101fff00},
85 {0xa74, 0x00000007}, {0xa78, 0x00000900},
86 {0xa7c, 0x225b0606}, {0xa80, 0x218075b1},
87 {0xb38, 0x00000000}, {0xc00, 0x48071d40},
88 {0xc04, 0x03a05633}, {0xc08, 0x000000e4},
89 {0xc0c, 0x6c6c6c6c}, {0xc10, 0x08800000},
90 {0xc14, 0x40000100}, {0xc18, 0x08800000},
91 {0xc1c, 0x40000100}, {0xc20, 0x00000000},
92 {0xc24, 0x00000000}, {0xc28, 0x00000000},
93 {0xc2c, 0x00000000}, {0xc30, 0x69e9ac47},
94 {0xc34, 0x469652af}, {0xc38, 0x49795994},
95 {0xc3c, 0x0a97971c}, {0xc40, 0x1f7c403f},
96 {0xc44, 0x000100b7}, {0xc48, 0xec020107},
97 {0xc4c, 0x007f037f},
100 {0xc50, 0x00340220},
102 {0xc50, 0x00340020},
104 {0xc54, 0x0080801f},
107 {0xc58, 0x00000220},
109 {0xc58, 0x00000020},
111 {0xc5c, 0x00248492}, {0xc60, 0x00000000},
112 {0xc64, 0x7112848b}, {0xc68, 0x47c00bff},
113 {0xc6c, 0x00000036}, {0xc70, 0x00000600},
114 {0xc74, 0x02013169}, {0xc78, 0x0000001f},
115 {0xc7c, 0x00b91612},
118 {0xc80, 0x2d4000b5},
120 {0xc80, 0x40000100},
122 {0xc84, 0x21f60000},
125 {0xc88, 0x2d4000b5},
127 {0xc88, 0x40000100},
129 {0xc8c, 0xa0e40000}, {0xc90, 0x00121820},
130 {0xc94, 0x00000000}, {0xc98, 0x00121820},
131 {0xc9c, 0x00007f7f}, {0xca0, 0x00000000},
132 {0xca4, 0x000300a0}, {0xca8, 0x00000000},
133 {0xcac, 0x00000000}, {0xcb0, 0x00000000},
134 {0xcb4, 0x00000000}, {0xcb8, 0x00000000},
135 {0xcbc, 0x28000000}, {0xcc0, 0x00000000},
136 {0xcc4, 0x00000000}, {0xcc8, 0x00000000},
137 {0xccc, 0x00000000}, {0xcd0, 0x00000000},
138 {0xcd4, 0x00000000}, {0xcd8, 0x64b22427},
139 {0xcdc, 0x00766932}, {0xce0, 0x00222222},
140 {0xce4, 0x00040000}, {0xce8, 0x77644302},
141 {0xcec, 0x2f97d40c}, {0xd00, 0x00080740},
142 {0xd04, 0x00020403}, {0xd08, 0x0000907f},
143 {0xd0c, 0x20010201}, {0xd10, 0xa0633333},
144 {0xd14, 0x3333bc43}, {0xd18, 0x7a8f5b6b},
145 {0xd1c, 0x0000007f}, {0xd2c, 0xcc979975},
146 {0xd30, 0x00000000}, {0xd34, 0x80608000},
147 {0xd38, 0x00000000}, {0xd3c, 0x00127353},
148 {0xd40, 0x00000000}, {0xd44, 0x00000000},
149 {0xd48, 0x00000000}, {0xd4c, 0x00000000},
150 {0xd50, 0x6437140a}, {0xd54, 0x00000000},
151 {0xd58, 0x00000282}, {0xd5c, 0x30032064},
152 {0xd60, 0x4653de68}, {0xd64, 0x04518a3c},
153 {0xd68, 0x00002101}, {0xd6c, 0x2a201c16},
154 {0xd70, 0x1812362e}, {0xd74, 0x322c2220},
155 {0xd78, 0x000e3c24}, {0xd80, 0x01081008},
156 {0xd84, 0x00000800}, {0xd88, 0xf0b50000},
157 {0xe00, 0x30303030}, {0xe04, 0x30303030},
158 {0xe08, 0x03903030}, {0xe10, 0x30303030},
159 {0xe14, 0x30303030}, {0xe18, 0x30303030},
160 {0xe1c, 0x30303030}, {0xe28, 0x00000000},
161 {0xe30, 0x1000dc1f}, {0xe34, 0x10008c1f},
162 {0xe38, 0x02140102}, {0xe3c, 0x681604c2},
163 {0xe40, 0x01007c00}, {0xe44, 0x01004800},
164 {0xe48, 0xfb000000}, {0xe4c, 0x000028d1},
165 {0xe50, 0x1000dc1f}, {0xe54, 0x10008c1f},
166 {0xe58, 0x02140102}, {0xe5c, 0x28160d05},
167 {0xe60, 0x00000008}, {0xe68, 0x0fc05656},
168 {0xe6c, 0x03c09696}, {0xe70, 0x03c09696},
169 {0xe74, 0x0c005656}, {0xe78, 0x0c005656},
170 {0xe7c, 0x0c005656}, {0xe80, 0x0c005656},
171 {0xe84, 0x03c09696}, {0xe88, 0x0c005656},
172 {0xe8c, 0x03c09696}, {0xed0, 0x03c09696},
173 {0xed4, 0x03c09696}, {0xed8, 0x03c09696},
174 {0xedc, 0x0000d6d6}, {0xee0, 0x0000d6d6},
175 {0xeec, 0x0fc01616}, {0xee4, 0xb0000c1c},
176 {0xee8, 0x00000001}, {0xf14, 0x00000003},
177 {0xf4c, 0x00000000}, {0xf00, 0x00000300},
178 {0xffff, 0xffffffff},
182 {0xc78, 0xfb000001}, {0xc78, 0xfb010001},
183 {0xc78, 0xfb020001}, {0xc78, 0xfb030001},
184 {0xc78, 0xfb040001}, {0xc78, 0xfb050001},
185 {0xc78, 0xfa060001}, {0xc78, 0xf9070001},
186 {0xc78, 0xf8080001}, {0xc78, 0xf7090001},
187 {0xc78, 0xf60a0001}, {0xc78, 0xf50b0001},
188 {0xc78, 0xf40c0001}, {0xc78, 0xf30d0001},
189 {0xc78, 0xf20e0001}, {0xc78, 0xf10f0001},
190 {0xc78, 0xf0100001}, {0xc78, 0xef110001},
191 {0xc78, 0xee120001}, {0xc78, 0xed130001},
192 {0xc78, 0xec140001}, {0xc78, 0xeb150001},
193 {0xc78, 0xea160001}, {0xc78, 0xe9170001},
194 {0xc78, 0xe8180001}, {0xc78, 0xe7190001},
195 {0xc78, 0xc81a0001}, {0xc78, 0xc71b0001},
196 {0xc78, 0xc61c0001}, {0xc78, 0x071d0001},
197 {0xc78, 0x061e0001}, {0xc78, 0x051f0001},
198 {0xc78, 0x04200001}, {0xc78, 0x03210001},
199 {0xc78, 0xaa220001}, {0xc78, 0xa9230001},
200 {0xc78, 0xa8240001}, {0xc78, 0xa7250001},
201 {0xc78, 0xa6260001}, {0xc78, 0x85270001},
202 {0xc78, 0x84280001}, {0xc78, 0x83290001},
203 {0xc78, 0x252a0001}, {0xc78, 0x242b0001},
204 {0xc78, 0x232c0001}, {0xc78, 0x222d0001},
205 {0xc78, 0x672e0001}, {0xc78, 0x662f0001},
206 {0xc78, 0x65300001}, {0xc78, 0x64310001},
207 {0xc78, 0x63320001}, {0xc78, 0x62330001},
208 {0xc78, 0x61340001}, {0xc78, 0x45350001},
209 {0xc78, 0x44360001}, {0xc78, 0x43370001},
210 {0xc78, 0x42380001}, {0xc78, 0x41390001},
211 {0xc78, 0x403a0001}, {0xc78, 0x403b0001},
212 {0xc78, 0x403c0001}, {0xc78, 0x403d0001},
213 {0xc78, 0x403e0001}, {0xc78, 0x403f0001},
214 {0xc78, 0xfb400001}, {0xc78, 0xfb410001},
215 {0xc78, 0xfb420001}, {0xc78, 0xfb430001},
216 {0xc78, 0xfb440001}, {0xc78, 0xfb450001},
217 {0xc78, 0xfa460001}, {0xc78, 0xf9470001},
218 {0xc78, 0xf8480001}, {0xc78, 0xf7490001},
219 {0xc78, 0xf64a0001}, {0xc78, 0xf54b0001},
220 {0xc78, 0xf44c0001}, {0xc78, 0xf34d0001},
221 {0xc78, 0xf24e0001}, {0xc78, 0xf14f0001},
222 {0xc78, 0xf0500001}, {0xc78, 0xef510001},
223 {0xc78, 0xee520001}, {0xc78, 0xed530001},
224 {0xc78, 0xec540001}, {0xc78, 0xeb550001},
225 {0xc78, 0xea560001}, {0xc78, 0xe9570001},
226 {0xc78, 0xe8580001}, {0xc78, 0xe7590001},
227 {0xc78, 0xe65a0001}, {0xc78, 0xe55b0001},
228 {0xc78, 0xe45c0001}, {0xc78, 0xe35d0001},
229 {0xc78, 0xe25e0001}, {0xc78, 0xe15f0001},
230 {0xc78, 0x8a600001}, {0xc78, 0x89610001},
231 {0xc78, 0x88620001}, {0xc78, 0x87630001},
232 {0xc78, 0x86640001}, {0xc78, 0x85650001},
233 {0xc78, 0x84660001}, {0xc78, 0x83670001},
234 {0xc78, 0x82680001}, {0xc78, 0x6b690001},
235 {0xc78, 0x6a6a0001}, {0xc78, 0x696b0001},
236 {0xc78, 0x686c0001}, {0xc78, 0x676d0001},
237 {0xc78, 0x666e0001}, {0xc78, 0x656f0001},
238 {0xc78, 0x64700001}, {0xc78, 0x63710001},
239 {0xc78, 0x62720001}, {0xc78, 0x61730001},
240 {0xc78, 0x49740001}, {0xc78, 0x48750001},
241 {0xc78, 0x47760001}, {0xc78, 0x46770001},
242 {0xc78, 0x45780001}, {0xc78, 0x44790001},
243 {0xc78, 0x437a0001}, {0xc78, 0x427b0001},
244 {0xc78, 0x417c0001}, {0xc78, 0x407d0001},
245 {0xc78, 0x407e0001}, {0xc78, 0x407f0001},
246 {0xc50, 0x00040022}, {0xc50, 0x00040020},
247 {0xffff, 0xffffffff}
251 {0xc78, 0xfa000001}, {0xc78, 0xf9010001},
252 {0xc78, 0xf8020001}, {0xc78, 0xf7030001},
253 {0xc78, 0xf6040001}, {0xc78, 0xf5050001},
254 {0xc78, 0xf4060001}, {0xc78, 0xf3070001},
255 {0xc78, 0xf2080001}, {0xc78, 0xf1090001},
256 {0xc78, 0xf00a0001}, {0xc78, 0xef0b0001},
257 {0xc78, 0xee0c0001}, {0xc78, 0xed0d0001},
258 {0xc78, 0xec0e0001}, {0xc78, 0xeb0f0001},
259 {0xc78, 0xea100001}, {0xc78, 0xe9110001},
260 {0xc78, 0xe8120001}, {0xc78, 0xe7130001},
261 {0xc78, 0xe6140001}, {0xc78, 0xe5150001},
262 {0xc78, 0xe4160001}, {0xc78, 0xe3170001},
263 {0xc78, 0xe2180001}, {0xc78, 0xe1190001},
264 {0xc78, 0x8a1a0001}, {0xc78, 0x891b0001},
265 {0xc78, 0x881c0001}, {0xc78, 0x871d0001},
266 {0xc78, 0x861e0001}, {0xc78, 0x851f0001},
267 {0xc78, 0x84200001}, {0xc78, 0x83210001},
268 {0xc78, 0x82220001}, {0xc78, 0x6a230001},
269 {0xc78, 0x69240001}, {0xc78, 0x68250001},
270 {0xc78, 0x67260001}, {0xc78, 0x66270001},
271 {0xc78, 0x65280001}, {0xc78, 0x64290001},
272 {0xc78, 0x632a0001}, {0xc78, 0x622b0001},
273 {0xc78, 0x612c0001}, {0xc78, 0x602d0001},
274 {0xc78, 0x472e0001}, {0xc78, 0x462f0001},
275 {0xc78, 0x45300001}, {0xc78, 0x44310001},
276 {0xc78, 0x43320001}, {0xc78, 0x42330001},
277 {0xc78, 0x41340001}, {0xc78, 0x40350001},
278 {0xc78, 0x40360001}, {0xc78, 0x40370001},
279 {0xc78, 0x40380001}, {0xc78, 0x40390001},
280 {0xc78, 0x403a0001}, {0xc78, 0x403b0001},
281 {0xc78, 0x403c0001}, {0xc78, 0x403d0001},
282 {0xc78, 0x403e0001}, {0xc78, 0x403f0001},
283 {0xc78, 0xfa400001}, {0xc78, 0xf9410001},
284 {0xc78, 0xf8420001}, {0xc78, 0xf7430001},
285 {0xc78, 0xf6440001}, {0xc78, 0xf5450001},
286 {0xc78, 0xf4460001}, {0xc78, 0xf3470001},
287 {0xc78, 0xf2480001}, {0xc78, 0xf1490001},
288 {0xc78, 0xf04a0001}, {0xc78, 0xef4b0001},
289 {0xc78, 0xee4c0001}, {0xc78, 0xed4d0001},
290 {0xc78, 0xec4e0001}, {0xc78, 0xeb4f0001},
291 {0xc78, 0xea500001}, {0xc78, 0xe9510001},
292 {0xc78, 0xe8520001}, {0xc78, 0xe7530001},
293 {0xc78, 0xe6540001}, {0xc78, 0xe5550001},
294 {0xc78, 0xe4560001}, {0xc78, 0xe3570001},
295 {0xc78, 0xe2580001}, {0xc78, 0xe1590001},
296 {0xc78, 0x8a5a0001}, {0xc78, 0x895b0001},
297 {0xc78, 0x885c0001}, {0xc78, 0x875d0001},
298 {0xc78, 0x865e0001}, {0xc78, 0x855f0001},
299 {0xc78, 0x84600001}, {0xc78, 0x83610001},
300 {0xc78, 0x82620001}, {0xc78, 0x6a630001},
301 {0xc78, 0x69640001}, {0xc78, 0x68650001},
302 {0xc78, 0x67660001}, {0xc78, 0x66670001},
303 {0xc78, 0x65680001}, {0xc78, 0x64690001},
304 {0xc78, 0x636a0001}, {0xc78, 0x626b0001},
305 {0xc78, 0x616c0001}, {0xc78, 0x606d0001},
306 {0xc78, 0x476e0001}, {0xc78, 0x466f0001},
307 {0xc78, 0x45700001}, {0xc78, 0x44710001},
308 {0xc78, 0x43720001}, {0xc78, 0x42730001},
309 {0xc78, 0x41740001}, {0xc78, 0x40750001},
310 {0xc78, 0x40760001}, {0xc78, 0x40770001},
311 {0xc78, 0x40780001}, {0xc78, 0x40790001},
312 {0xc78, 0x407a0001}, {0xc78, 0x407b0001},
313 {0xc78, 0x407c0001}, {0xc78, 0x407d0001},
314 {0xc78, 0x407e0001}, {0xc78, 0x407f0001},
315 {0xc50, 0x00040222}, {0xc50, 0x00040220},
316 {0xffff, 0xffffffff}
320 {0x7f, 0x00000082}, {0x81, 0x0003fc00},
321 {0x00, 0x00030000}, {0x08, 0x00008400},
322 {0x18, 0x00000407}, {0x19, 0x00000012},
323 {0x1b, 0x00000064}, {0x1e, 0x00080009},
324 {0x1f, 0x00000880}, {0x2f, 0x0001a060},
325 {0x3f, 0x00000000}, {0x42, 0x000060c0},
326 {0x57, 0x000d0000}, {0x58, 0x000be180},
327 {0x67, 0x00001552}, {0x83, 0x00000000},
328 {0xb0, 0x000ff9f1}, {0xb1, 0x00055418},
329 {0xb2, 0x0008cc00}, {0xb4, 0x00043083},
330 {0xb5, 0x00008166}, {0xb6, 0x0000803e},
331 {0xb7, 0x0001c69f}, {0xb8, 0x0000407f},
332 {0xb9, 0x00080001}, {0xba, 0x00040001},
333 {0xbb, 0x00000400}, {0xbf, 0x000c0000},
334 {0xc2, 0x00002400}, {0xc3, 0x00000009},
335 {0xc4, 0x00040c91}, {0xc5, 0x00099999},
336 {0xc6, 0x000000a3}, {0xc7, 0x00088820},
337 {0xc8, 0x00076c06}, {0xc9, 0x00000000},
338 {0xca, 0x00080000}, {0xdf, 0x00000180},
339 {0xef, 0x000001a0}, {0x51, 0x00069545},
340 {0x52, 0x0007e45e}, {0x53, 0x00000071},
341 {0x56, 0x00051ff3}, {0x35, 0x000000a8},
342 {0x35, 0x000001e2}, {0x35, 0x000002a8},
343 {0x36, 0x00001c24}, {0x36, 0x00009c24},
344 {0x36, 0x00011c24}, {0x36, 0x00019c24},
345 {0x18, 0x00000c07}, {0x5a, 0x00048000},
346 {0x19, 0x000739d0},
349 {0x34, 0x0000a093}, {0x34, 0x0000908f},
350 {0x34, 0x0000808c}, {0x34, 0x0000704d},
351 {0x34, 0x0000604a}, {0x34, 0x00005047},
352 {0x34, 0x0000400a}, {0x34, 0x00003007},
353 {0x34, 0x00002004}, {0x34, 0x00001001},
354 {0x34, 0x00000000},
357 {0x34, 0x0000add7}, {0x34, 0x00009dd4},
358 {0x34, 0x00008dd1}, {0x34, 0x00007dce},
359 {0x34, 0x00006dcb}, {0x34, 0x00005dc8},
360 {0x34, 0x00004dc5}, {0x34, 0x000034cc},
361 {0x34, 0x0000244f}, {0x34, 0x0000144c},
362 {0x34, 0x00000014},
364 {0x00, 0x00030159},
365 {0x84, 0x00068180},
366 {0x86, 0x0000014e},
367 {0x87, 0x00048e00},
368 {0x8e, 0x00065540},
369 {0x8f, 0x00088000},
370 {0xef, 0x000020a0},
373 {0x3b, 0x000f07b0},
375 {0x3b, 0x000f02b0},
377 {0x3b, 0x000ef7b0}, {0x3b, 0x000d4fb0},
378 {0x3b, 0x000cf060}, {0x3b, 0x000b0090},
379 {0x3b, 0x000a0080}, {0x3b, 0x00090080},
380 {0x3b, 0x0008f780},
383 {0x3b, 0x000787b0},
385 {0x3b, 0x00078730},
387 {0x3b, 0x00060fb0}, {0x3b, 0x0005ffa0},
388 {0x3b, 0x00040620}, {0x3b, 0x00037090},
389 {0x3b, 0x00020080}, {0x3b, 0x0001f060},
390 {0x3b, 0x0000ffb0}, {0xef, 0x000000a0},
391 {0xfe, 0x00000000}, {0x18, 0x0000fc07},
392 {0xfe, 0x00000000}, {0xfe, 0x00000000},
393 {0xfe, 0x00000000}, {0xfe, 0x00000000},
394 {0x1e, 0x00000001}, {0x1f, 0x00080000},
395 {0x00, 0x00033e70},
396 {0xff, 0xffffffff}
400 {0x7f, 0x00000082}, {0x81, 0x0003fc00},
401 {0x00, 0x00030000}, {0x08, 0x00008400},
402 {0x18, 0x00000407}, {0x19, 0x00000012},
403 {0x1b, 0x00000064}, {0x1e, 0x00080009},
404 {0x1f, 0x00000880}, {0x2f, 0x0001a060},
405 {0x3f, 0x00000000}, {0x42, 0x000060c0},
406 {0x57, 0x000d0000}, {0x58, 0x000be180},
407 {0x67, 0x00001552}, {0x7f, 0x00000082},
408 {0x81, 0x0003f000}, {0x83, 0x00000000},
409 {0xdf, 0x00000180}, {0xef, 0x000001a0},
410 {0x51, 0x00069545}, {0x52, 0x0007e42e},
411 {0x53, 0x00000071}, {0x56, 0x00051ff3},
412 {0x35, 0x000000a8}, {0x35, 0x000001e0},
413 {0x35, 0x000002a8}, {0x36, 0x00001ca8},
414 {0x36, 0x00009c24}, {0x36, 0x00011c24},
415 {0x36, 0x00019c24}, {0x18, 0x00000c07},
416 {0x5a, 0x00048000}, {0x19, 0x000739d0},
419 {0x34, 0x0000a093}, {0x34, 0x0000908f},
420 {0x34, 0x0000808c}, {0x34, 0x0000704d},
421 {0x34, 0x0000604a}, {0x34, 0x00005047},
422 {0x34, 0x0000400a}, {0x34, 0x00003007},
423 {0x34, 0x00002004}, {0x34, 0x00001001},
424 {0x34, 0x00000000},
426 {0x34, 0x0000add7}, {0x34, 0x00009dd4},
427 {0x34, 0x00008dd1}, {0x34, 0x00007dce},
428 {0x34, 0x00006dcb}, {0x34, 0x00005dc8},
429 {0x34, 0x00004dc5}, {0x34, 0x000034cc},
430 {0x34, 0x0000244f}, {0x34, 0x0000144c},
431 {0x34, 0x00000014},
433 {0x00, 0x00030159}, {0x84, 0x00068180},
434 {0x86, 0x000000ce}, {0x87, 0x00048a00},
435 {0x8e, 0x00065540}, {0x8f, 0x00088000},
436 {0xef, 0x000020a0},
439 {0x3b, 0x000f07b0},
441 {0x3b, 0x000f02b0},
444 {0x3b, 0x000ef7b0}, {0x3b, 0x000d4fb0},
445 {0x3b, 0x000cf060}, {0x3b, 0x000b0090},
446 {0x3b, 0x000a0080}, {0x3b, 0x00090080},
447 {0x3b, 0x0008f780},
450 {0x3b, 0x000787b0},
452 {0x3b, 0x00078730},
454 {0x3b, 0x00060fb0}, {0x3b, 0x0005ffa0},
455 {0x3b, 0x00040620}, {0x3b, 0x00037090},
456 {0x3b, 0x00020080}, {0x3b, 0x0001f060},
457 {0x3b, 0x0000ffb0}, {0xef, 0x000000a0},
458 {0x00, 0x00010159}, {0xfe, 0x00000000},
459 {0xfe, 0x00000000}, {0xfe, 0x00000000},
460 {0xfe, 0x00000000}, {0x1e, 0x00000001},
461 {0x1f, 0x00080000}, {0x00, 0x00033e70},
462 {0xff, 0xffffffff}
469 int ret = 0; in rtl8192eu_identify_chip()
519 tx_idx = 0; in rtl8192e_set_tx_power()
525 val32 &= 0xffff00ff; in rtl8192e_set_tx_power()
530 val32 &= 0xff; in rtl8192e_set_tx_power()
557 val32 &= 0xff; in rtl8192e_set_tx_power()
562 val32 &= 0xffffff00; in rtl8192e_set_tx_power()
593 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8192eu_parse_efuse()
610 priv->ht20_tx_power_diff[0].a = in rtl8192eu_parse_efuse()
612 priv->ht20_tx_power_diff[0].b = in rtl8192eu_parse_efuse()
615 priv->ht40_tx_power_diff[0].a = 0; in rtl8192eu_parse_efuse()
616 priv->ht40_tx_power_diff[0].b = 0; in rtl8192eu_parse_efuse()
635 priv->default_crystal_cap = priv->efuse_wifi.efuse8192eu.xtal_k & 0x3f; in rtl8192eu_parse_efuse()
637 return 0; in rtl8192eu_parse_efuse()
661 /* 6. 0x1f[7:0] = 0x07 */ in rtl8192eu_init_phy_bb()
696 int result = 0; in rtl8192eu_iqk_path_a()
700 * PA/PAD controlled by 0x0 in rtl8192eu_iqk_path_a()
702 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_iqk_path_a()
703 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x00180); in rtl8192eu_iqk_path_a()
705 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_iqk_path_a()
706 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x20000); in rtl8192eu_iqk_path_a()
707 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_iqk_path_a()
708 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0x07f77); in rtl8192eu_iqk_path_a()
710 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_iqk_path_a()
713 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8192eu_iqk_path_a()
714 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_iqk_path_a()
715 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_iqk_path_a()
716 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_iqk_path_a()
718 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82140303); in rtl8192eu_iqk_path_a()
719 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x68160000); in rtl8192eu_iqk_path_a()
722 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911); in rtl8192eu_iqk_path_a()
725 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8192eu_iqk_path_a()
726 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_iqk_path_a()
736 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8192eu_iqk_path_a()
737 ((reg_e9c & 0x03ff0000) != 0x00420000)) in rtl8192eu_iqk_path_a()
738 result |= 0x01; in rtl8192eu_iqk_path_a()
746 int result = 0; in rtl8192eu_rx_iqk_path_a()
749 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00); in rtl8192eu_rx_iqk_path_a()
752 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_a()
753 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_a()
754 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_a()
755 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173); in rtl8192eu_rx_iqk_path_a()
757 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_a()
758 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_a()
759 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_a()
760 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf1173); in rtl8192eu_rx_iqk_path_a()
762 /* PA/PAD control by 0x56, and set = 0x0 */ in rtl8192eu_rx_iqk_path_a()
763 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x00980); in rtl8192eu_rx_iqk_path_a()
764 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x511e0); in rtl8192eu_rx_iqk_path_a()
767 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_a()
770 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_rx_iqk_path_a()
771 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_rx_iqk_path_a()
774 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c); in rtl8192eu_rx_iqk_path_a()
775 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
776 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
777 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
779 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x8216031f); in rtl8192eu_rx_iqk_path_a()
780 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x6816031f); in rtl8192eu_rx_iqk_path_a()
783 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8192eu_rx_iqk_path_a()
786 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8192eu_rx_iqk_path_a()
787 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_rx_iqk_path_a()
797 ((reg_e94 & 0x03ff0000) != 0x01420000) && in rtl8192eu_rx_iqk_path_a()
798 ((reg_e9c & 0x03ff0000) != 0x00420000)) { in rtl8192eu_rx_iqk_path_a()
799 result |= 0x01; in rtl8192eu_rx_iqk_path_a()
801 /* PA/PAD controlled by 0x0 */ in rtl8192eu_rx_iqk_path_a()
802 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a()
803 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180); in rtl8192eu_rx_iqk_path_a()
807 val32 = 0x80007c00 | in rtl8192eu_rx_iqk_path_a()
808 (reg_e94 & 0x03ff0000) | ((reg_e9c >> 16) & 0x03ff); in rtl8192eu_rx_iqk_path_a()
812 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a()
814 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_a()
815 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_a()
816 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_a()
817 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8192eu_rx_iqk_path_a()
819 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_a()
820 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_a()
821 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_a()
822 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8192eu_rx_iqk_path_a()
824 /* PA/PAD control by 0x56, and set = 0x0 */ in rtl8192eu_rx_iqk_path_a()
825 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x00980); in rtl8192eu_rx_iqk_path_a()
826 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_PAD_TXG, 0x510e0); in rtl8192eu_rx_iqk_path_a()
829 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_a()
832 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_rx_iqk_path_a()
835 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
836 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x18008c1c); in rtl8192eu_rx_iqk_path_a()
837 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
838 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_a()
840 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821608ff); in rtl8192eu_rx_iqk_path_a()
841 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281608ff); in rtl8192eu_rx_iqk_path_a()
844 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891); in rtl8192eu_rx_iqk_path_a()
847 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8192eu_rx_iqk_path_a()
848 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_rx_iqk_path_a()
855 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_a()
856 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_GAIN_CCA, 0x180); in rtl8192eu_rx_iqk_path_a()
859 ((reg_ea4 & 0x03ff0000) != 0x01320000) && in rtl8192eu_rx_iqk_path_a()
860 ((reg_eac & 0x03ff0000) != 0x00360000)) in rtl8192eu_rx_iqk_path_a()
861 result |= 0x02; in rtl8192eu_rx_iqk_path_a()
873 int result = 0; in rtl8192eu_iqk_path_b()
875 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_iqk_path_b()
876 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_GAIN_CCA, 0x00180); in rtl8192eu_iqk_path_b()
878 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_iqk_path_b()
879 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x20000); in rtl8192eu_iqk_path_b()
880 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_iqk_path_b()
881 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0x07f77); in rtl8192eu_iqk_path_b()
883 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_iqk_path_b()
886 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_iqk_path_b()
887 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_iqk_path_b()
888 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c); in rtl8192eu_iqk_path_b()
889 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_iqk_path_b()
891 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140303); in rtl8192eu_iqk_path_b()
892 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x68160000); in rtl8192eu_iqk_path_b()
895 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911); in rtl8192eu_iqk_path_b()
898 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000); in rtl8192eu_iqk_path_b()
899 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_iqk_path_b()
909 ((reg_eb4 & 0x03ff0000) != 0x01420000) && in rtl8192eu_iqk_path_b()
910 ((reg_ebc & 0x03ff0000) != 0x00420000)) in rtl8192eu_iqk_path_b()
911 result |= 0x01; in rtl8192eu_iqk_path_b()
922 int result = 0; in rtl8192eu_rx_iqk_path_b()
925 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_b()
928 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_b()
929 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_b()
930 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_b()
931 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf1173); in rtl8192eu_rx_iqk_path_b()
933 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_b()
934 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_b()
935 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_b()
936 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf1173); in rtl8192eu_rx_iqk_path_b()
938 /* PA/PAD control by 0x56, and set = 0x0 */ in rtl8192eu_rx_iqk_path_b()
939 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_GAIN_CCA, 0x00980); in rtl8192eu_rx_iqk_path_b()
940 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_PAD_TXG, 0x511e0); in rtl8192eu_rx_iqk_path_b()
943 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_b()
946 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_rx_iqk_path_b()
947 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_rx_iqk_path_b()
950 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
951 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
952 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x18008c1c); in rtl8192eu_rx_iqk_path_b()
953 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
955 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x8216031f); in rtl8192eu_rx_iqk_path_b()
956 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x6816031f); in rtl8192eu_rx_iqk_path_b()
959 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911); in rtl8192eu_rx_iqk_path_b()
962 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000); in rtl8192eu_rx_iqk_path_b()
963 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_rx_iqk_path_b()
973 ((reg_eb4 & 0x03ff0000) != 0x01420000) && in rtl8192eu_rx_iqk_path_b()
974 ((reg_ebc & 0x03ff0000) != 0x00420000)) { in rtl8192eu_rx_iqk_path_b()
975 result |= 0x01; in rtl8192eu_rx_iqk_path_b()
978 * PA/PAD controlled by 0x0 in rtl8192eu_rx_iqk_path_b()
981 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_b()
982 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_GAIN_CCA, 0x180); in rtl8192eu_rx_iqk_path_b()
986 val32 = 0x80007c00 | in rtl8192eu_rx_iqk_path_b()
987 (reg_eb4 & 0x03ff0000) | ((reg_ebc >> 16) & 0x03ff); in rtl8192eu_rx_iqk_path_b()
991 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_b()
993 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_b()
994 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_b()
995 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_b()
996 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8192eu_rx_iqk_path_b()
998 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_WE_LUT, 0x800a0); in rtl8192eu_rx_iqk_path_b()
999 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_RCK_OS, 0x30000); in rtl8192eu_rx_iqk_path_b()
1000 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G1, 0x0000f); in rtl8192eu_rx_iqk_path_b()
1001 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_TXPA_G2, 0xf7ff2); in rtl8192eu_rx_iqk_path_b()
1003 /* PA/PAD control by 0x56, and set = 0x0 */ in rtl8192eu_rx_iqk_path_b()
1004 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_GAIN_CCA, 0x00980); in rtl8192eu_rx_iqk_path_b()
1005 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_PAD_TXG, 0x510e0); in rtl8192eu_rx_iqk_path_b()
1008 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_rx_iqk_path_b()
1011 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_rx_iqk_path_b()
1014 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
1015 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
1016 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c); in rtl8192eu_rx_iqk_path_b()
1017 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x18008c1c); in rtl8192eu_rx_iqk_path_b()
1019 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821608ff); in rtl8192eu_rx_iqk_path_b()
1020 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x281608ff); in rtl8192eu_rx_iqk_path_b()
1023 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a891); in rtl8192eu_rx_iqk_path_b()
1026 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xfa000000); in rtl8192eu_rx_iqk_path_b()
1027 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8192eu_rx_iqk_path_b()
1035 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_rx_iqk_path_b()
1036 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_GAIN_CCA, 0x180); in rtl8192eu_rx_iqk_path_b()
1039 ((reg_ec4 & 0x03ff0000) != 0x01320000) && in rtl8192eu_rx_iqk_path_b()
1040 ((reg_ecc & 0x03ff0000) != 0x00360000)) in rtl8192eu_rx_iqk_path_b()
1041 result |= 0x02; in rtl8192eu_rx_iqk_path_b()
1077 u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff; in rtl8192eu_phy_iqcalibrate()
1078 u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff; in rtl8192eu_phy_iqcalibrate()
1085 if (t == 0) { in rtl8192eu_phy_iqcalibrate()
1100 val32 |= 0x0f000000; in rtl8192eu_phy_iqcalibrate()
1103 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8192eu_phy_iqcalibrate()
1104 rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4); in rtl8192eu_phy_iqcalibrate()
1105 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x22208200); in rtl8192eu_phy_iqcalibrate()
1118 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_phy_iqcalibrate()
1119 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_phy_iqcalibrate()
1120 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_phy_iqcalibrate()
1122 for (i = 0; i < retry; i++) { in rtl8192eu_phy_iqcalibrate()
1124 if (path_a_ok == 0x01) { in rtl8192eu_phy_iqcalibrate()
1127 result[t][0] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1130 result[t][1] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1139 for (i = 0; i < retry; i++) { in rtl8192eu_phy_iqcalibrate()
1141 if (path_a_ok == 0x03) { in rtl8192eu_phy_iqcalibrate()
1144 result[t][2] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1147 result[t][3] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1158 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_phy_iqcalibrate()
1159 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0x10000); in rtl8192eu_phy_iqcalibrate()
1160 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_phy_iqcalibrate()
1165 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8192eu_phy_iqcalibrate()
1166 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8192eu_phy_iqcalibrate()
1167 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8192eu_phy_iqcalibrate()
1169 for (i = 0; i < retry; i++) { in rtl8192eu_phy_iqcalibrate()
1171 if (path_b_ok == 0x01) { in rtl8192eu_phy_iqcalibrate()
1173 result[t][4] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1175 result[t][5] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1183 for (i = 0; i < retry; i++) { in rtl8192eu_phy_iqcalibrate()
1185 if (path_b_ok == 0x03) { in rtl8192eu_phy_iqcalibrate()
1188 result[t][6] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1191 result[t][7] = (val32 >> 16) & 0x3ff; in rtl8192eu_phy_iqcalibrate()
1201 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000); in rtl8192eu_phy_iqcalibrate()
1217 val32 &= 0xffffff00; in rtl8192eu_phy_iqcalibrate()
1218 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50); in rtl8192eu_phy_iqcalibrate()
1223 val32 &= 0xffffff00; in rtl8192eu_phy_iqcalibrate()
1225 val32 | 0x50); in rtl8192eu_phy_iqcalibrate()
1230 /* Load 0xe30 IQC default value */ in rtl8192eu_phy_iqcalibrate()
1231 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00); in rtl8192eu_phy_iqcalibrate()
1232 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00); in rtl8192eu_phy_iqcalibrate()
1246 memset(result, 0, sizeof(result)); in rtl8192eu_phy_iq_calibrate()
1252 for (i = 0; i < 3; i++) { in rtl8192eu_phy_iq_calibrate()
1257 result, 0, 1); in rtl8192eu_phy_iq_calibrate()
1259 candidate = 0; in rtl8192eu_phy_iq_calibrate()
1266 result, 0, 2); in rtl8192eu_phy_iq_calibrate()
1268 candidate = 0; in rtl8192eu_phy_iq_calibrate()
1281 for (i = 0; i < 4; i++) { in rtl8192eu_phy_iq_calibrate()
1282 reg_e94 = result[i][0]; in rtl8192eu_phy_iq_calibrate()
1290 if (candidate >= 0) { in rtl8192eu_phy_iq_calibrate()
1291 reg_e94 = result[candidate][0]; in rtl8192eu_phy_iq_calibrate()
1311 reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100; in rtl8192eu_phy_iq_calibrate()
1312 reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0; in rtl8192eu_phy_iq_calibrate()
1315 if (reg_e94 && candidate >= 0) in rtl8192eu_phy_iq_calibrate()
1317 candidate, (reg_ea4 == 0)); in rtl8192eu_phy_iq_calibrate()
1321 candidate, (reg_ec4 == 0)); in rtl8192eu_phy_iq_calibrate()
1336 * 40Mhz crystal source, MAC 0x28[2]=0 in rtl8192e_crystal_afe_adjust()
1339 val8 &= 0xfb; in rtl8192e_crystal_afe_adjust()
1343 val32 &= 0xfffffc7f; in rtl8192e_crystal_afe_adjust()
1348 * AFE PLL KVCO selection, MAC 0x28[6]=1 in rtl8192e_crystal_afe_adjust()
1351 val8 &= 0xbf; in rtl8192e_crystal_afe_adjust()
1355 * AFE PLL KVCO selection, MAC 0x78[21]=0 in rtl8192e_crystal_afe_adjust()
1358 val32 &= 0xffdfffff; in rtl8192e_crystal_afe_adjust()
1376 int count, ret = 0; in rtl8192e_emu_to_active()
1378 /* disable HWPDN 0x04[15]=0*/ in rtl8192e_emu_to_active()
1383 /* disable SW LPS 0x04[10]= 0 */ in rtl8192e_emu_to_active()
1393 /* wait till 0x04[17] = 1 power ready*/ in rtl8192e_emu_to_active()
1409 /* release WLON reset 0x04[16]= 1*/ in rtl8192e_emu_to_active()
1411 val8 |= BIT(0); in rtl8192e_emu_to_active()
1414 /* set, then poll until 0 */ in rtl8192e_emu_to_active()
1421 if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) { in rtl8192e_emu_to_active()
1422 ret = 0; in rtl8192e_emu_to_active()
1445 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8192eu_active_to_lps()
1450 * Poll 32 bit wide 0x05f8 for 0x00000000 to ensure no TX is pending. in rtl8192eu_active_to_lps()
1455 retval = 0; in rtl8192eu_active_to_lps()
1480 val16 &= 0xff00; in rtl8192eu_active_to_lps()
1499 int count, ret = 0; in rtl8192eu_active_to_emu()
1506 /* Switch DPDT_SEL_P output from register 0x65[2] */ in rtl8192eu_active_to_emu()
1511 /* 0x0005[1] = 1 turn off MAC by HW state machine*/ in rtl8192eu_active_to_emu()
1518 if ((val8 & BIT(1)) == 0) in rtl8192eu_active_to_emu()
1538 /* 0x04[12:11] = 01 enable WL suspend */ in rtl8192eu_emu_to_disabled()
1544 return 0; in rtl8192eu_emu_to_disabled()
1555 rtl8xxxu_write8(priv, REG_LDO_SW_CTRL, 0xc3); in rtl8192eu_power_on()
1561 val32 &= 0xff0fffff; in rtl8192eu_power_on()
1562 val32 |= 0x00500000; in rtl8192eu_power_on()
1564 rtl8xxxu_write8(priv, REG_LDO_SW_CTRL, 0x83); in rtl8192eu_power_on()
1577 rtl8xxxu_write16(priv, REG_CR, 0x0000); in rtl8192eu_power_on()
1607 rtl8xxxu_write8(priv, REG_RF_CTRL, 0x00); in rtl8192eu_power_off()
1621 rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00); in rtl8192eu_power_off()
1645 rtl8xxxu_write8(priv, REG_WLAN_ACT_CONTROL_8723B, 0x04); in rtl8192e_enable_rf()
1652 val32 |= (BIT(0) | BIT(1)); in rtl8192e_enable_rf()
1655 rtl8xxxu_write8(priv, REG_RFE_CTRL_ANTA_SRC, 0x77); in rtl8192e_enable_rf()
1666 val8 &= ~BIT(0); in rtl8192e_enable_rf()
1672 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8192e_enable_rf()
1681 s8 rx_pwr_all = 0x00; in rtl8192e_cck_rssi()
1683 s8 lna_gain = 0; in rtl8192e_cck_rssi()
1688 if (priv->cck_agc_report_type == 0) in rtl8192e_cck_rssi()
1718 return 0; in rtl8192eu_led_brightness_set()
1751 .has_s0s1 = 0,
1757 .adda_1t_init = 0x0fc01616,
1758 .adda_1t_path_on = 0x0fc01616,
1759 .adda_2t_path_on_a = 0x0fc01616,
1760 .adda_2t_path_on_b = 0x0fc01616,
1761 .trxff_boundary = 0x3cff,