Home
last modified time | relevance | path

Searched +full:0 +full:x90000000 (Results 1 – 25 of 140) sorted by relevance

123456

/linux/arch/powerpc/boot/dts/fsl/
H A Dbsc9132qds.dts20 ranges = <0x0 0x0 0x0 0x88000000 0x08000000
21 0x1 0x0 0x0 0xff800000 0x00010000>;
22 reg = <0x0 0xff71e000 0x0 0x2000>;
26 ranges = <0x0 0x0 0xff700000 0x100000>;
30 reg = <0 0xff70a000 0 0x1000>;
31 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000
32 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
33 pcie@0 {
34 ranges = <0x2000000 0x0 0x90000000
35 0x2000000 0x0 0x90000000
[all …]
H A Dmpc8536ds.dts17 #size-cells = <0>;
19 PowerPC,8536@0 {
21 reg = <0>;
28 reg = <0 0 0 0>; // Filled by U-Boot
32 reg = <0 0xffe05000 0 0x1000>;
34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
35 0x2 0x0 0x0 0xffa00000 0x00040000
36 0x3 0x0 0x0 0xffdf0000 0x00008000>;
40 ranges = <0x0 0 0xffe00000 0x100000>;
44 reg = <0 0xffe08000 0 0x1000>;
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a
28 #define mmCP_HYP_MEC1_UCODE_DATA 0xf81b
29 #define mmCP_HYP_MEC2_UCODE_ADDR 0xf81c
30 #define mmCP_HYP_MEC2_UCODE_DATA 0xf81d
49 { 0x00000000, mmRLC_CNTL },
50 { 0x00000002, mmRLC_SRM_CNTL },
51 { 0x15000000, mmCP_ME_CNTL },
52 { 0x50000000, mmCP_MEC_CNTL },
53 { 0x80000004, mmCP_DFY_CNTL },
54 { 0x0840800a, mmCP_RB0_CNTL },
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A D83xx-512x-pci.txt12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 /* IDSEL 0x0E -mini PCI */
15 0x7000 0x0 0x0 0x1 &ipic 18 0x8
16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
17 0x7000 0x0 0x0 0x3 &ipic 18 0x8
18 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20 /* IDSEL 0x0F - PCI slot */
21 0x7800 0x0 0x0 0x1 &ipic 17 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
23 0x7800 0x0 0x0 0x3 &ipic 17 0x8
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm97435svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
H A Dbcm97425svmb.dts11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
119 flash@0 {
121 reg = <0>;
133 flash0.cfe@0 {
134 reg = <0x0 0x200000>;
138 reg = <0x200000 0x40000>;
142 reg = <0x240000 0x10000>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Ddigsy_mtc.dts19 memory@0 {
20 reg = <0x00000000 0x02000000>; // 32MB
57 phy0: ethernet-phy@0 {
58 reg = <0>;
65 reg = <0x50>;
70 reg = <0x56>;
75 reg = <0x68>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
87 0xc000 0 0 2 &mpc5200_pic 0 0 3
[all …]
H A Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]
H A Dmucmc52.dts78 phy0: ethernet-phy@0 {
80 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
101 interrupt-map-mask = <0xf800 0 0 7>;
103 /* IDSEL 0x10 */
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
107 0x8000 0 0 4 &mpc5200_pic 0 1 3
[all …]
H A Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dcharon.dts23 #size-cells = <0>;
25 PowerPC,5200@0 {
27 reg = <0>;
30 d-cache-size = <0x4000>; // L1, 16K
31 i-cache-size = <0x4000>; // L1, 16K
32 timebase-frequency = <0>; // from bootloader
33 bus-frequency = <0>; // from bootloader
34 clock-frequency = <0>; // from bootloader
38 memory@0 {
40 reg = <0x00000000 0x08000000>; // 128MB
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphytbl_lcn.c10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
/linux/arch/m68k/ifpsp060/
H A Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/linux/arch/arm/mach-sa1100/
H A Dgeneric.c70 return 0; in sa11x0_getspeed()
71 return sa11x0_freq_table[PPCR & 0xf].frequency; in sa11x0_getspeed()
89 PSPR = 0; in sa1100_power_off()
99 /* Jump into ROM at address 0 */ in sa11x0_restart()
100 soft_restart(0); in sa11x0_restart()
119 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
123 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
130 .coherent_dma_mask = 0xffffffff,
137 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
149 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
[all …]
/linux/arch/xtensa/boot/dts/
H A Dkc705_nommu.dts9 …bootargs = "earlycon=uart8250,mmio32,0x9d050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/…
11 memory@0 {
13 reg = <0x60000000 0x10000000>;
16 ranges = <0x00000000 0x90000000 0x10000000>;
/linux/arch/mips/include/asm/mach-loongson2ef/
H A Dmem.h17 #define LOONGSON_HIGHMEM_START 0x20000000
19 #define LOONGSON_HIGHMEM_START 0x90000000
25 * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000.
26 * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000.
29 #define LOONGSON_MMIO_MEM_START 0x10000000
32 #define LOONGSON_MMIO_MEM_END 0x20000000
34 #define LOONGSON_MMIO_MEM_END 0x80000000
/linux/Documentation/devicetree/bindings/gpio/
H A Dlsi,zevio-gpio.yaml40 reg = <0x90000000 0x1000>;
/linux/arch/xtensa/include/asm/
H A Dkasan.h16 #define KASAN_START_VADDR __XTENSA_UL_CONST(0x90000000)
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx35-pdk.dts15 reg = <0x80000000 0x8000000>,
16 <0x90000000 0x8000000>;
22 pinctrl-0 = <&pinctrl_esdhc1>;
30 MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
31 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
32 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
33 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
34 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
35 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
41 MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
[all …]
/linux/arch/powerpc/math-emu/
H A Dmcrfs.c20 clear = 0x90000000; in mcrfs()
32 return 0; in mcrfs()
/linux/arch/arm/mach-mmp/
H A Daddr-map.h15 #define APB_PHYS_BASE 0xd4000000
16 #define APB_VIRT_BASE IOMEM(0xfe000000)
17 #define APB_PHYS_SIZE 0x00200000
19 #define AXI_PHYS_BASE 0xd4200000
20 #define AXI_VIRT_BASE IOMEM(0xfe200000)
21 #define AXI_PHYS_SIZE 0x00200000
23 #define PGU_PHYS_BASE 0xe0000000
24 #define PGU_VIRT_BASE IOMEM(0xfe400000)
25 #define PGU_PHYS_SIZE 0x00100000
27 /* Static Memory Controller - Chip Select 0 and 1 */
[all …]
/linux/arch/microblaze/
H A DKconfig.platform35 default "0x90000000"
44 int "USE_MSR_INSTR range (0:1)"
45 default 0
48 int "USE_PCMP_INSTR range (0:1)"
49 default 0
52 int "USE_BARREL range (0:1)"
53 default 0
56 int "USE_DIV range (0:1)"
57 default 0
60 int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
[all …]
/linux/arch/openrisc/boot/dts/
H A Dor1ksim.dts18 memory@0 {
20 reg = <0x00000000 0x02000000>;
25 #size-cells = <0>;
26 cpu@0 {
28 reg = <0>;
46 reg = <0x90000000 0x100>;
53 reg = <0x92000000 0x800>;
H A Dsimple_smp.dts17 memory@0 {
19 reg = <0x00000000 0x02000000>;
24 #size-cells = <0>;
25 cpu@0 {
27 reg = <0>;
39 reg = <0x98000000 16>;
41 #interrupt-cells = <0>;
58 reg = <0x90000000 0x100>;
65 reg = <0x92000000 0x800>;
/linux/arch/arm/configs/
H A Dstm32_defconfig20 CONFIG_DRAM_BASE=0x90000000
21 CONFIG_FLASH_MEM_BASE=0x08000000
22 CONFIG_FLASH_SIZE=0x00200000
25 CONFIG_XIP_PHYS_ADDR=0x08008000

123456