1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c24cf712SMichal Simek# For a description of the syntax of this configuration file, 3*cd238effSMauro Carvalho Chehab# see Documentation/kbuild/kconfig-language.rst. 4c24cf712SMichal Simek# 5c24cf712SMichal Simek# Platform selection Kconfig menu for MicroBlaze targets 6c24cf712SMichal Simek# 7c24cf712SMichal Simek 8c24cf712SMichal Simekmenu "Platform options" 9c24cf712SMichal Simek 10c24cf712SMichal Simekconfig OPT_LIB_FUNCTION 11c24cf712SMichal Simek bool "Optimalized lib function" 12c24cf712SMichal Simek default y 13c24cf712SMichal Simek help 14c24cf712SMichal Simek Allows turn on optimalized library function (memcpy and memmove). 15c24cf712SMichal Simek They are optimized by using word alignment. This will work 16c24cf712SMichal Simek fine if both source and destination are aligned on the same 17c24cf712SMichal Simek boundary. However, if they are aligned on different boundaries 18c24cf712SMichal Simek shifts will be necessary. This might result in bad performance 19c24cf712SMichal Simek on MicroBlaze systems without a barrel shifter. 20c24cf712SMichal Simek 21c24cf712SMichal Simekconfig OPT_LIB_ASM 22c24cf712SMichal Simek bool "Optimalized lib function ASM" 23c24cf712SMichal Simek depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1) 2418ffc0ccSMichal Simek depends on CPU_BIG_ENDIAN 25c24cf712SMichal Simek default n 26c24cf712SMichal Simek help 27c24cf712SMichal Simek Allows turn on optimalized library function (memcpy and memmove). 28c24cf712SMichal Simek Function are written in asm code. 29c24cf712SMichal Simek 30c24cf712SMichal Simek# Definitions for MICROBLAZE0 31c24cf712SMichal Simekcomment "Definitions for MICROBLAZE0" 32c24cf712SMichal Simek 33c24cf712SMichal Simekconfig KERNEL_BASE_ADDR 34c24cf712SMichal Simek hex "Physical address where Linux Kernel is" 35c24cf712SMichal Simek default "0x90000000" 36c24cf712SMichal Simek help 37c24cf712SMichal Simek BASE Address for kernel 38c24cf712SMichal Simek 39c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_FAMILY 40c24cf712SMichal Simek string "Targeted FPGA family" 41c24cf712SMichal Simek default "virtex5" 42c24cf712SMichal Simek 43c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_MSR_INSTR 44c24cf712SMichal Simek int "USE_MSR_INSTR range (0:1)" 45c24cf712SMichal Simek default 0 46c24cf712SMichal Simek 47c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_PCMP_INSTR 48c24cf712SMichal Simek int "USE_PCMP_INSTR range (0:1)" 49c24cf712SMichal Simek default 0 50c24cf712SMichal Simek 51c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_BARREL 52c24cf712SMichal Simek int "USE_BARREL range (0:1)" 53c24cf712SMichal Simek default 0 54c24cf712SMichal Simek 55c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_DIV 56c24cf712SMichal Simek int "USE_DIV range (0:1)" 57c24cf712SMichal Simek default 0 58c24cf712SMichal Simek 59c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_HW_MUL 60c24cf712SMichal Simek int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" 61c24cf712SMichal Simek default 0 62c24cf712SMichal Simek 63c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_USE_FPU 64c24cf712SMichal Simek int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)" 65c24cf712SMichal Simek default 0 66c24cf712SMichal Simek 67c24cf712SMichal Simekconfig XILINX_MICROBLAZE0_HW_VER 68c24cf712SMichal Simek string "Core version number" 6948547bd2SMasahiro Yamada default "7.10.d" 70c24cf712SMichal Simek 71c24cf712SMichal Simekendmenu 72