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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dtable.c7 0x800, 0x80040000,
8 0x804, 0x00000003,
9 0x808, 0x0000fc00,
10 0x80c, 0x0000000a,
11 0x810, 0x10005388,
12 0x814, 0x020c3d10,
13 0x818, 0x02200385,
14 0x81c, 0x00000000,
15 0x820, 0x01000100,
16 0x824, 0x00390004,
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
H A Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10000330,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192du/
H A Dtable.c9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10001331,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
17 0x820, 0x01000100,
18 0x824, 0x00390004,
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
H A Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10005388,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/linux/drivers/staging/rtl8723bs/hal/
H A Dodm_reg.h16 #define ODM_BB_RESET 0x002
17 #define ODM_DUMMY 0x4fe
18 #define RF_T_METER_OLD 0x24
19 #define RF_T_METER_NEW 0x42
21 #define ODM_EDCA_VO_PARAM 0x500
22 #define ODM_EDCA_VI_PARAM 0x504
23 #define ODM_EDCA_BE_PARAM 0x508
24 #define ODM_EDCA_BK_PARAM 0x50C
25 #define ODM_TXPAUSE 0x522
28 #define ODM_FPGA_PHY0_PAGE8 0x800
[all …]
H A DHalHWImg8723B_BB.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
40 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive()
42 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive()
48 cond1 &= 0x000F0FFF; in CheckPositive()
49 driver1 &= 0x000F0FFF; in CheckPositive()
52 u32 bitMask = 0; in CheckPositive()
54 if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */ in CheckPositive()
57 if ((cond1 & BIT0) != 0) /* GLNA */ in CheckPositive()
58 bitMask |= 0x000000FF; in CheckPositive()
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dbcm4908_enet.h5 #define ENET_CONTROL 0x000
6 #define ENET_MIB_CTRL 0x004
7 #define ENET_MIB_CTRL_CLR_MIB 0x00000001
8 #define ENET_RX_ERR_MASK 0x008
9 #define ENET_MIB_MAX_PKT_SIZE 0x00C
10 #define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff
11 #define ENET_DIAG_OUT 0x01c
12 #define ENET_ENABLE_DROP_PKT 0x020
13 #define ENET_IRQ_ENABLE 0x024
14 #define ENET_IRQ_ENABLE_OVFL 0x00000001
[all …]
/linux/include/dt-bindings/pinctrl/
H A Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-vi.yaml15 pattern: "^vi@[0-9a-f]+$"
80 port@0:
86 "^csi@[0-9a-f]+$":
122 #size-cells = <0>;
125 reg = <0x48>;
138 reg = <0x54080000 0x00040000>;
148 #size-cells = <0>;
149 port@0 {
150 reg = <0>;
166 #size-cells = <0>;
[all …]
H A Dnvidia,tegra20-host1x.yaml175 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
211 - description: host1x syncpoint interrupt 0
235 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
251 reg = <0x50000000 0x00024000>;
252 interrupts = <0 65 0x04>, /* mpcore syncpt */
253 <0 67 0x04>; /* mpcore general */
263 ranges = <0x54000000 0x54000000 0x04000000>;
267 reg = <0x54040000 0x00040000>;
268 interrupts = <0 68 0x04>;
276 reg = <0x54080000 0x00040000>;
[all …]
/linux/drivers/staging/rtl8723bs/include/
H A DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
50 /* 3. Page8(0x800) */
52 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */
54 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
55 #define rFPGA0_XA_HSSIParameter2 0x824
56 #define rFPGA0_XB_HSSIParameter1 0x828
57 #define rFPGA0_XB_HSSIParameter2 0x82c
58 #define rTxAGC_B_Rate18_06 0x830
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
H A Dimx35-pinfunc.h13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0
14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0
15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0
16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0
17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0
18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0
19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0
20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0
21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0
22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0
[all …]
/linux/arch/mips/include/asm/
H A Dgt64120.h21 #define GT_CPU_OFS 0x000
23 #define GT_MULTI_OFS 0x120
26 #define GT_SCS10LD_OFS 0x008
27 #define GT_SCS10HD_OFS 0x010
28 #define GT_SCS32LD_OFS 0x018
29 #define GT_SCS32HD_OFS 0x020
30 #define GT_CS20LD_OFS 0x028
31 #define GT_CS20HD_OFS 0x030
32 #define GT_CS3BOOTLD_OFS 0x038
33 #define GT_CS3BOOTHD_OFS 0x040
[all …]
/linux/drivers/fpga/
H A Dsocfpga.c18 #define SOCFPGA_FPGMGR_STAT_OFST 0x0
19 #define SOCFPGA_FPGMGR_CTL_OFST 0x4
20 #define SOCFPGA_FPGMGR_DCLKCNT_OFST 0x8
21 #define SOCFPGA_FPGMGR_DCLKSTAT_OFST 0xc
22 #define SOCFPGA_FPGMGR_GPIO_INTEN_OFST 0x830
23 #define SOCFPGA_FPGMGR_GPIO_INTMSK_OFST 0x834
24 #define SOCFPGA_FPGMGR_GPIO_INTTYPE_LEVEL_OFST 0x838
25 #define SOCFPGA_FPGMGR_GPIO_INT_POL_OFST 0x83c
26 #define SOCFPGA_FPGMGR_GPIO_INTSTAT_OFST 0x840
27 #define SOCFPGA_FPGMGR_GPIO_RAW_INTSTAT_OFST 0x844
[all …]
/linux/drivers/clk/stm32/
H A Dstm32mp21_rcc.h10 #define RCC_SECCFGR0 0x0
11 #define RCC_SECCFGR1 0x4
12 #define RCC_SECCFGR2 0x8
13 #define RCC_SECCFGR3 0xC
14 #define RCC_PRIVCFGR0 0x10
15 #define RCC_PRIVCFGR1 0x14
16 #define RCC_PRIVCFGR2 0x18
17 #define RCC_PRIVCFGR3 0x1C
18 #define RCC_RCFGLOCKR0 0x20
19 #define RCC_RCFGLOCKR1 0x24
[all …]
H A Dstm32mp25_rcc.h10 #define RCC_SECCFGR0 0x0
11 #define RCC_SECCFGR1 0x4
12 #define RCC_SECCFGR2 0x8
13 #define RCC_SECCFGR3 0xC
14 #define RCC_PRIVCFGR0 0x10
15 #define RCC_PRIVCFGR1 0x14
16 #define RCC_PRIVCFGR2 0x18
17 #define RCC_PRIVCFGR3 0x1C
18 #define RCC_RCFGLOCKR0 0x20
19 #define RCC_RCFGLOCKR1 0x24
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pocketbeagle.dts23 pinctrl-0 = <&usr_leds_pins>;
130 "[USR LED 0]",
151 "[SYSBOOT 0]",
220 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
225 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
226 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
229 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
234 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
235 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
238 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
[all …]
/linux/drivers/thermal/
H A Dairoha_thermal.c15 #define EN7581_PLLRG_PROTECT 0x268
16 #define EN7581_PWD_TADC 0x2ec
18 #define EN7581_DOUT_TADC 0x2f8
19 #define EN7581_DOUT_TADC_MASK GENMASK(15, 0)
22 #define EN7581_TEMPMONCTL0 0x800
26 #define EN7581_SENSE0_EN BIT(0)
27 #define EN7581_TEMPMONCTL1 0x804
29 #define EN7581_PERIOD_UNIT GENMASK(9, 0)
30 #define EN7581_TEMPMONCTL2 0x808
32 #define EN7581_SEN_INTERVAL GENMASK(9, 0)
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dtable.c8 0x800, 0x80040000,
9 0x804, 0x00000003,
10 0x808, 0x0000FC00,
11 0x80C, 0x0000000A,
12 0x810, 0x10001331,
13 0x814, 0x020C3D10,
14 0x818, 0x02200385,
15 0x81C, 0x00000000,
16 0x820, 0x01000100,
17 0x824, 0x00190204,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_GECC2 0x9c9
36 #define mmMC_ARB_GECC2_CLI 0x9ca
[all …]
/linux/drivers/clk/renesas/
H A Dr9a07g043-cpg.c18 #define CPG_PL2SDHI_DSEL (0x218)
21 #define SEL_SDHI0 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 0, 2)
74 {0, 1},
78 {0, 0},
82 {0, 1},
87 {0, 0},
106 DEF_SAMPLL(".pll1", CLK_PLL1, CLK_EXTAL, PLL146_CONF(0)),
151 mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
153 mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
167 0x514, 0, MSTOP(BUS_REG1, BIT(7))),
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]

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