xref: /linux/include/dt-bindings/pinctrl/am33xx.h (revision c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
23f2d1658SFlorian Vaussard /*
33f2d1658SFlorian Vaussard  * This header provides constants specific to AM33XX pinctrl bindings.
43f2d1658SFlorian Vaussard  */
53f2d1658SFlorian Vaussard 
6ac25da7fSFlorian Vaussard #ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
7ac25da7fSFlorian Vaussard #define _DT_BINDINGS_PINCTRL_AM33XX_H
8ac25da7fSFlorian Vaussard 
9c5f167d3SIan Campbell #include <dt-bindings/pinctrl/omap.h>
103f2d1658SFlorian Vaussard 
113f2d1658SFlorian Vaussard /* am33xx specific mux bit defines */
123f2d1658SFlorian Vaussard #undef PULL_ENA
133f2d1658SFlorian Vaussard #undef INPUT_EN
143f2d1658SFlorian Vaussard 
153f2d1658SFlorian Vaussard #define PULL_DISABLE		(1 << 3)
163f2d1658SFlorian Vaussard #define INPUT_EN		(1 << 5)
17424e0f03SDave Gerlach #define SLEWCTRL_SLOW		(1 << 6)
18424e0f03SDave Gerlach #define SLEWCTRL_FAST		0
193f2d1658SFlorian Vaussard 
203f2d1658SFlorian Vaussard /* update macro depending on INPUT_EN and PULL_ENA */
213f2d1658SFlorian Vaussard #undef PIN_OUTPUT
223f2d1658SFlorian Vaussard #undef PIN_OUTPUT_PULLUP
233f2d1658SFlorian Vaussard #undef PIN_OUTPUT_PULLDOWN
243f2d1658SFlorian Vaussard #undef PIN_INPUT
253f2d1658SFlorian Vaussard #undef PIN_INPUT_PULLUP
263f2d1658SFlorian Vaussard #undef PIN_INPUT_PULLDOWN
273f2d1658SFlorian Vaussard 
283f2d1658SFlorian Vaussard #define PIN_OUTPUT		(PULL_DISABLE)
293f2d1658SFlorian Vaussard #define PIN_OUTPUT_PULLUP	(PULL_UP)
303f2d1658SFlorian Vaussard #define PIN_OUTPUT_PULLDOWN	0
313f2d1658SFlorian Vaussard #define PIN_INPUT		(INPUT_EN | PULL_DISABLE)
323f2d1658SFlorian Vaussard #define PIN_INPUT_PULLUP	(INPUT_EN | PULL_UP)
333f2d1658SFlorian Vaussard #define PIN_INPUT_PULLDOWN	(INPUT_EN)
343f2d1658SFlorian Vaussard 
353f2d1658SFlorian Vaussard /* undef non-existing modes */
363f2d1658SFlorian Vaussard #undef PIN_OFF_NONE
373f2d1658SFlorian Vaussard #undef PIN_OFF_OUTPUT_HIGH
383f2d1658SFlorian Vaussard #undef PIN_OFF_OUTPUT_LOW
393f2d1658SFlorian Vaussard #undef PIN_OFF_INPUT_PULLUP
403f2d1658SFlorian Vaussard #undef PIN_OFF_INPUT_PULLDOWN
413f2d1658SFlorian Vaussard #undef PIN_OFF_WAKEUPENABLE
423f2d1658SFlorian Vaussard 
43*7ebd1ea7SChristina Quast #define AM335X_PIN_OFFSET_MIN			0x0800U
44ac25da7fSFlorian Vaussard 
45*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD0			0x800
46*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD1			0x804
47*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD2			0x808
48*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD3			0x80c
49*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD4			0x810
50*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD5			0x814
51*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD6			0x818
52*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD7			0x81c
53*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD8			0x820
54*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD9			0x824
55*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD10			0x828
56*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD11			0x82c
57*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD12			0x830
58*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD13			0x834
59*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD14			0x838
60*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_AD15			0x83c
61*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A0			0x840
62*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A1			0x844
63*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A2			0x848
64*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A3			0x84c
65*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A4			0x850
66*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A5			0x854
67*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A6			0x858
68*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A7			0x85c
69*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A8			0x860
70*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A9			0x864
71*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A10			0x868
72*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_A11			0x86c
73*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_WAIT0			0x870
74*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_WPN			0x874
75*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_BEN1			0x878
76*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_CSN0			0x87c
77*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_CSN1			0x880
78*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_CSN2			0x884
79*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_CSN3			0x888
80*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_CLK			0x88c
81*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_ADVN_ALE		0x890
82*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_OEN_REN			0x894
83*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_WEN			0x898
84*7ebd1ea7SChristina Quast #define AM335X_PIN_GPMC_BEN0_CLE		0x89c
85*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA0			0x8a0
86*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA1			0x8a4
87*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA2			0x8a8
88*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA3			0x8ac
89*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA4			0x8b0
90*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA5			0x8b4
91*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA6			0x8b8
92*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA7			0x8bc
93*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA8			0x8c0
94*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA9			0x8c4
95*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA10			0x8c8
96*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA11			0x8cc
97*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA12			0x8d0
98*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA13			0x8d4
99*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA14			0x8d8
100*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_DATA15			0x8dc
101*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_VSYNC			0x8e0
102*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_HSYNC			0x8e4
103*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_PCLK			0x8e8
104*7ebd1ea7SChristina Quast #define AM335X_PIN_LCD_AC_BIAS_EN		0x8ec
105*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_DAT3			0x8f0
106*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_DAT2			0x8f4
107*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_DAT1			0x8f8
108*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_DAT0			0x8fc
109*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_CLK			0x900
110*7ebd1ea7SChristina Quast #define AM335X_PIN_MMC0_CMD			0x904
111*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_COL			0x908
112*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_CRS			0x90c
113*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RX_ER			0x910
114*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TX_EN			0x914
115*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RX_DV			0x918
116*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TXD3			0x91c
117*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TXD2			0x920
118*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TXD1			0x924
119*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TXD0			0x928
120*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_TX_CLK			0x92c
121*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RX_CLK			0x930
122*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RXD3			0x934
123*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RXD2			0x938
124*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RXD1			0x93c
125*7ebd1ea7SChristina Quast #define AM335X_PIN_MII1_RXD0			0x940
126*7ebd1ea7SChristina Quast #define AM335X_PIN_RMII1_REF_CLK		0x944
127*7ebd1ea7SChristina Quast #define AM335X_PIN_MDIO				0x948
128*7ebd1ea7SChristina Quast #define AM335X_PIN_MDC				0x94c
129*7ebd1ea7SChristina Quast #define AM335X_PIN_SPI0_SCLK			0x950
130*7ebd1ea7SChristina Quast #define AM335X_PIN_SPI0_D0			0x954
131*7ebd1ea7SChristina Quast #define AM335X_PIN_SPI0_D1			0x958
132*7ebd1ea7SChristina Quast #define AM335X_PIN_SPI0_CS0			0x95c
133*7ebd1ea7SChristina Quast #define AM335X_PIN_SPI0_CS1			0x960
134*7ebd1ea7SChristina Quast #define AM335X_PIN_ECAP0_IN_PWM0_OUT		0x964
135*7ebd1ea7SChristina Quast #define AM335X_PIN_UART0_CTSN			0x968
136*7ebd1ea7SChristina Quast #define AM335X_PIN_UART0_RTSN			0x96c
137*7ebd1ea7SChristina Quast #define AM335X_PIN_UART0_RXD			0x970
138*7ebd1ea7SChristina Quast #define AM335X_PIN_UART0_TXD			0x974
139*7ebd1ea7SChristina Quast #define AM335X_PIN_UART1_CTSN			0x978
140*7ebd1ea7SChristina Quast #define AM335X_PIN_UART1_RTSN			0x97c
141*7ebd1ea7SChristina Quast #define AM335X_PIN_UART1_RXD			0x980
142*7ebd1ea7SChristina Quast #define AM335X_PIN_UART1_TXD			0x984
143*7ebd1ea7SChristina Quast #define AM335X_PIN_I2C0_SDA			0x988
144*7ebd1ea7SChristina Quast #define AM335X_PIN_I2C0_SCL			0x98c
145*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_ACLKX			0x990
146*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_FSX			0x994
147*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_AXR0			0x998
148*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_AHCLKR		0x99c
149*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_ACLKR			0x9a0
150*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_FSR			0x9a4
151*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_AXR1			0x9a8
152*7ebd1ea7SChristina Quast #define AM335X_PIN_MCASP0_AHCLKX		0x9ac
153*7ebd1ea7SChristina Quast #define AM335X_PIN_XDMA_EVENT_INTR0		0x9b0
154*7ebd1ea7SChristina Quast #define AM335X_PIN_XDMA_EVENT_INTR1		0x9b4
155*7ebd1ea7SChristina Quast #define AM335X_PIN_WARMRSTN			0x9b8
156*7ebd1ea7SChristina Quast #define AM335X_PIN_NNMI				0x9c0
157*7ebd1ea7SChristina Quast #define AM335X_PIN_TMS				0x9d0
158*7ebd1ea7SChristina Quast #define AM335X_PIN_TDI				0x9d4
159*7ebd1ea7SChristina Quast #define AM335X_PIN_TDO				0x9d8
160*7ebd1ea7SChristina Quast #define AM335X_PIN_TCK				0x9dc
161*7ebd1ea7SChristina Quast #define AM335X_PIN_TRSTN			0x9e0
162*7ebd1ea7SChristina Quast #define AM335X_PIN_EMU0				0x9e4
163*7ebd1ea7SChristina Quast #define AM335X_PIN_EMU1				0x9e8
164*7ebd1ea7SChristina Quast #define AM335X_PIN_RTC_PWRONRSTN		0x9f8
165*7ebd1ea7SChristina Quast #define AM335X_PIN_PMIC_POWER_EN		0x9fc
166*7ebd1ea7SChristina Quast #define AM335X_PIN_EXT_WAKEUP			0xa00
167*7ebd1ea7SChristina Quast #define AM335X_PIN_USB0_DRVVBUS			0xa1c
168*7ebd1ea7SChristina Quast #define AM335X_PIN_USB1_DRVVBUS			0xa34
169*7ebd1ea7SChristina Quast 
170*7ebd1ea7SChristina Quast #define AM335X_PIN_OFFSET_MAX			0x0a34U
171*7ebd1ea7SChristina Quast 
172*7ebd1ea7SChristina Quast #endif
173