/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/ |
H A D | imx28-apf28.dts | 15 reg = <0x40000000 0x08000000>; 21 pinctrl-0 = <&duart_pins_a>; 27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; 30 partition@0 { 32 reg = <0x0 0x300000>; 37 reg = <0x300000 0x80000>; 42 reg = <0x380000 0x80000>; 47 reg = <0x400000 0x80000>; 52 reg = <0x480000 0x80000>; 57 reg = <0x500000 0x800000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx27-apf27.dts | 18 reg = <0xa0000000 0x04000000>; 23 clock-frequency = <0>; 30 MX27_PAD_SD3_CMD__FEC_TXD0 0x0 31 MX27_PAD_SD3_CLK__FEC_TXD1 0x0 32 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 33 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 34 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 35 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 36 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 37 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
H A D | ibm-power10-dual.dtsi | 8 #size-cells = <0>; 10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; 12 cfam@0,0 { 13 reg = <0 0>; 16 chip-id = <0>; 20 reg = <0x1000 0x400>; 25 reg = <0x1800 0x400>; 27 #size-cells = <0>; 29 cfam0_i2c0: i2c-bus@0 { 31 #size-cells = <0>; [all …]
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H A D | ibm-power11-quad.dtsi | 126 #size-cells = <0>; 129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; 131 cfam@0,0 { 132 reg = <0 0>; 135 chip-id = <0>; 139 reg = <0x1000 0x400>; 144 reg = <0x1800 0x400>; 146 #size-cells = <0>; 148 cfam0_i2c0: i2c-bus@0 { 149 reg = <0>; /* OMI01 */ [all …]
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/freebsd/contrib/libarchive/libarchive/test/ |
H A D | test_write_format_tar_sparse.c | 39 size_t buff2_size = 0x13000; in test_1() 74 archive_entry_set_size(ae, 0x81000); in test_1() 75 archive_entry_sparse_add_entry(ae, 0x10000, 0x1000); in test_1() 76 archive_entry_sparse_add_entry(ae, 0x80000, 0x1000); in test_1() 81 for (i = 0; i < 0x81000;) { in test_1() 83 if (i + ws > 0x8100 in test_1() [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7986a-bananapi-bpi-r3-nor.dtso | 16 #size-cells = <0>; 18 flash@0 { 20 reg = <0>; 28 partition@0 { 30 reg = <0x0 0x40000>; 36 reg = <0x40000 0x40000>; 41 reg = <0x80000 0x80000>; 46 reg = <0x100000 0x80000>; 52 reg = <0x180000 0xa80000>; 57 reg = <0xc00000 0x1400000>;
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3430-sdp.dts | 15 reg = <0x80000000 0x10000000>; /* 256 MB */ 23 reg = <0x48>; 50 ranges = <0 0 0x10000000 0x08000000>, 51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */ 52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */ 54 nor@0,0 { 59 reg = <0 0 0x08000000>; 63 gpmc,cs-on-ns = <0>; 84 partition@0 { 86 reg = <0 0x40000>; [all …]
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H A D | am57-pruss.dtsi | 11 reg = <0x4b226000 0x4>, 12 <0x4b226004 0x4>; 23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; 27 ranges = <0x00000000 0x4b200000 0x80000>; 29 pruss1: pruss@0 { 31 reg = <0x0 0x80000>; 36 pruss1_mem: memories@0 { 37 reg = <0x0 0x2000>, 38 <0x2000 0x2000>, 39 <0x10000 0x8000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amd/ |
H A D | amd-seattle-xgbe-b.dtsi | 10 #clock-cells = <0>; 17 #clock-cells = <0>; 24 #clock-cells = <0>; 31 #clock-cells = <0>; 38 reg = <0 0xe0700000 0 0x80000>, 39 <0 0xe0780000 0 0x80000>, 40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */ 41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */ 42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */ 43 interrupts = <0 325 4>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | qcs8550.dtsi | 40 * 0x80000000 +-------------------+ 44 * 0x8a800000 +-------------------+ 48 * 0xa7000000 +-------------------+ 52 * 0xd4d00000 +-------------------+ 56 * 0x100000000 +-------------------+ 60 reg = <0x0 0x81c00000 0x0 0x60000>; 66 reg = <0x0 0x81c60000 0x0 0x20000>; 72 reg = <0x0 0x81c80000 0x0 0x20000>; 77 reg = <0x0 0x81d00000 0x0 0x200000>; 83 reg = <0x0 0x81f00000 0x0 0x20000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm958625-meraki-mx6x-common.dtsi | 55 reg = <0x50>; 65 reg = <0x66 0x6>; 72 nand@0 { 74 reg = <0>; 85 partition@0 { 87 reg = <0x0 0x80000>; 93 reg = <0x80000 0x80000>; 99 reg = <0x100000 0x300000>; 104 reg = <0x400000 0x100000>; 109 reg = <0x500000 0x300000>; [all …]
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H A D | bcm7445.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 50 reg = <0x00 0xffd01000 0x00 0x1000>, 51 <0x00 0xffd02000 0x00 0x2000>, 52 <0x00 0xffd04000 0x00 0x2000>, 53 <0x00 0xffd06000 0x00 0x2000>; 70 ranges = <0 0x00 0xf0000000 0x1000000>; 74 reg = <0x40ab00 0x20>; 84 reg = <0x404000 0x51c>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | ti,pru-rproc.yaml | 19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary 21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two 46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs 90 pattern: "^rtu@[0-9a-f]+$" 102 pattern: "^txpru@[0-9a-f]+" 106 pattern: "^pru@[0-9a-f]+$" 119 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ 123 ranges = <0x0 0x30000 [all...] |
H A D | imx-rproc.txt | 21 reg = <0x80000000 0x80000>; 25 reg = <0x81000000 0x80000>;
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/ |
H A D | bcm2712.dtsi | 16 #clock-cells = <0>; 23 #clock-cells = <0>; 30 #clock-cells = <0>; 37 #clock-cells = <0>; 45 #size-cells = <0>; 54 cpu0: cpu@0 { 57 reg = <0x000>; 59 d-cache-size = <0x10000>; 62 i-cache-size = <0x10000>; 69 cache-size = <0x80000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
H A D | keystone-k2l-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 33 #clock-cells = <0>; 56 reg = <0x50>; 67 ti,cs-chipselect = <0>; 77 nand@0,0 { 81 reg = <0 0 0x4000000 82 1 0 0x0000100>; 84 ti,davinci-chipselect = <0>; 85 ti,davinci-mask-ale = <0x2000>; 86 ti,davinci-mask-cle = <0x4000>; [all …]
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H A D | keystone-k2e-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 34 #clock-cells = <0>; 41 #clock-cells = <0>; 48 #clock-cells = <0>; 83 reg = <0x50>; 94 ti,cs-chipselect = <0>; 104 nand@0,0 { 108 reg = <0 0 0x4000000 109 1 0 0x0000100>; 111 ti,davinci-chipselect = <0>; [all …]
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H A D | keystone-k2hk-evm.dts | 23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 56 #clock-cells = <0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 77 #clock-cells = <0>; 84 #clock-cells = <0>; 111 ti,cs-chipselect = <0>; 121 nand@0,0 { 125 reg = <0 0 0x4000000 126 1 0 0x0000100>; [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/ |
H A D | mcu.h | 12 #define MT_MCU_CPU_CTL 0x0704 13 #define MT_MCU_CLOCK_CTL 0x0708 14 #define MT_MCU_PCIE_REMAP_BASE1 0x0740 15 #define MT_MCU_PCIE_REMAP_BASE2 0x0744 16 #define MT_MCU_PCIE_REMAP_BASE3 0x0748 18 #define MT_MCU_ROM_PATCH_OFFSET 0x80000 19 #define MT_MCU_ROM_PATCH_ADDR 0x90000 21 #define MT_MCU_ILM_OFFSET 0x80000 23 #define MT_MCU_DLM_OFFSET 0x100000 24 #define MT_MCU_DLM_ADDR 0x90000 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | orion5x-lacie-ethernet-disk-mini-v2.dts | 24 reg = <0x00000000 0x4000000>; /* 64 MB */ 33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 34 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 35 <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>; 40 pinctrl-0 = <&pmx_power_button>; 52 pinctrl-0 = <&pmx_power_led>; 68 devbus,badr-skew-ps = <0>; 87 flash@0 { 89 reg = <0 0x80000>; 94 partition@0 { [all …]
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H A D | armada-380.dtsi | 20 #size-cells = <0>; 23 cpu@0 { 26 reg = <0>; 46 bus-range = <0x00 0xff>; 49 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 50 0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 51 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 52 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */ 54 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */ [all …]
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H A D | kirkwood-6282.dtsi | 12 bus-range = <0x00 0xff>; 15 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 16 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 17 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 19 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ 21 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; 23 pcie0: pcie@1,0 { 25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-sm-k26-revA.dts | 50 memory@0 { 52 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 61 reg = <0x0 0x7ff00000 0x0 0x100000>; 95 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, 110 pwms = <&ttc0 2 40000 0>; 144 &qspi { /* MIO 0-5 - U143 */ 146 spi_flash: flash@0 { /* MT25QU512A */ 148 reg = <0>; 158 partition@0 { 160 reg = <0x0 0x80000>; /* 512KB */ [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | c293si-post.dtsi | 39 interrupts = <19 2 0 0>; 42 /* controller at 0xa000 */ 48 bus-range = <0 255>; 50 interrupts = <16 2 0 0>; 52 pcie@0 { 53 reg = <0 0 0 0 0>; 58 interrupts = <16 2 0 0>; 59 interrupt-map-mask = <0xf800 0 0 7>; 61 /* IDSEL 0x0 */ 62 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | spear320-hmi.dts | 18 reg = <0 0x40000000>; 25 pinctrl-0 = <&state_default>; 102 partition@0 { 104 reg = <0x0 0x80000>; 108 reg = <0x80000 0x140000>; 112 reg = <0x1C0000 0x40000>; 116 reg = <0x200000 0x40000>; 120 reg = <0x240000 0xC00000>; 124 reg = <0xE40000 0x0>; 131 #size-cells = <0>; [all …]
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