1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*f126890aSEmmanuel Vadot/ { 3*f126890aSEmmanuel Vadot mbus@f1000000 { 4*f126890aSEmmanuel Vadot pciec: pcie@82000000 { 5*f126890aSEmmanuel Vadot compatible = "marvell,kirkwood-pcie"; 6*f126890aSEmmanuel Vadot status = "disabled"; 7*f126890aSEmmanuel Vadot device_type = "pci"; 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot #address-cells = <3>; 10*f126890aSEmmanuel Vadot #size-cells = <2>; 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot bus-range = <0x00 0xff>; 13*f126890aSEmmanuel Vadot 14*f126890aSEmmanuel Vadot ranges = 15*f126890aSEmmanuel Vadot <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 16*f126890aSEmmanuel Vadot 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 17*f126890aSEmmanuel Vadot 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 18*f126890aSEmmanuel Vadot 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 19*f126890aSEmmanuel Vadot 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 20*f126890aSEmmanuel Vadot 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ 21*f126890aSEmmanuel Vadot 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot pcie0: pcie@1,0 { 24*f126890aSEmmanuel Vadot device_type = "pci"; 25*f126890aSEmmanuel Vadot assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; 26*f126890aSEmmanuel Vadot reg = <0x0800 0 0 0 0>; 27*f126890aSEmmanuel Vadot #address-cells = <3>; 28*f126890aSEmmanuel Vadot #size-cells = <2>; 29*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 30*f126890aSEmmanuel Vadot ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 31*f126890aSEmmanuel Vadot 0x81000000 0 0 0x81000000 0x1 0 1 0>; 32*f126890aSEmmanuel Vadot bus-range = <0x00 0xff>; 33*f126890aSEmmanuel Vadot interrupt-names = "intx", "error"; 34*f126890aSEmmanuel Vadot interrupts = <9>, <44>; 35*f126890aSEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 36*f126890aSEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie0_intc 0>, 37*f126890aSEmmanuel Vadot <0 0 0 2 &pcie0_intc 1>, 38*f126890aSEmmanuel Vadot <0 0 0 3 &pcie0_intc 2>, 39*f126890aSEmmanuel Vadot <0 0 0 4 &pcie0_intc 3>; 40*f126890aSEmmanuel Vadot marvell,pcie-port = <0>; 41*f126890aSEmmanuel Vadot marvell,pcie-lane = <0>; 42*f126890aSEmmanuel Vadot clocks = <&gate_clk 2>; 43*f126890aSEmmanuel Vadot status = "disabled"; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot pcie0_intc: interrupt-controller { 46*f126890aSEmmanuel Vadot interrupt-controller; 47*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 48*f126890aSEmmanuel Vadot }; 49*f126890aSEmmanuel Vadot }; 50*f126890aSEmmanuel Vadot 51*f126890aSEmmanuel Vadot pcie1: pcie@2,0 { 52*f126890aSEmmanuel Vadot device_type = "pci"; 53*f126890aSEmmanuel Vadot assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>; 54*f126890aSEmmanuel Vadot reg = <0x1000 0 0 0 0>; 55*f126890aSEmmanuel Vadot #address-cells = <3>; 56*f126890aSEmmanuel Vadot #size-cells = <2>; 57*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 58*f126890aSEmmanuel Vadot ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 59*f126890aSEmmanuel Vadot 0x81000000 0 0 0x81000000 0x2 0 1 0>; 60*f126890aSEmmanuel Vadot bus-range = <0x00 0xff>; 61*f126890aSEmmanuel Vadot interrupt-names = "intx", "error"; 62*f126890aSEmmanuel Vadot interrupts = <10>, <45>; 63*f126890aSEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 64*f126890aSEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie1_intc 0>, 65*f126890aSEmmanuel Vadot <0 0 0 2 &pcie1_intc 1>, 66*f126890aSEmmanuel Vadot <0 0 0 3 &pcie1_intc 2>, 67*f126890aSEmmanuel Vadot <0 0 0 4 &pcie1_intc 3>; 68*f126890aSEmmanuel Vadot marvell,pcie-port = <1>; 69*f126890aSEmmanuel Vadot marvell,pcie-lane = <0>; 70*f126890aSEmmanuel Vadot clocks = <&gate_clk 18>; 71*f126890aSEmmanuel Vadot status = "disabled"; 72*f126890aSEmmanuel Vadot 73*f126890aSEmmanuel Vadot pcie1_intc: interrupt-controller { 74*f126890aSEmmanuel Vadot interrupt-controller; 75*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 76*f126890aSEmmanuel Vadot }; 77*f126890aSEmmanuel Vadot }; 78*f126890aSEmmanuel Vadot }; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot ocp@f1000000 { 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot pinctrl: pin-controller@10000 { 83*f126890aSEmmanuel Vadot compatible = "marvell,88f6282-pinctrl"; 84*f126890aSEmmanuel Vadot 85*f126890aSEmmanuel Vadot pmx_sata0: pmx-sata0 { 86*f126890aSEmmanuel Vadot marvell,pins = "mpp5", "mpp21", "mpp23"; 87*f126890aSEmmanuel Vadot marvell,function = "sata0"; 88*f126890aSEmmanuel Vadot }; 89*f126890aSEmmanuel Vadot pmx_sata1: pmx-sata1 { 90*f126890aSEmmanuel Vadot marvell,pins = "mpp4", "mpp20", "mpp22"; 91*f126890aSEmmanuel Vadot marvell,function = "sata1"; 92*f126890aSEmmanuel Vadot }; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot /* 95*f126890aSEmmanuel Vadot * Default I2C1 pinctrl setting on mpp36/mpp37, 96*f126890aSEmmanuel Vadot * overwrite marvell,pins on board level if required. 97*f126890aSEmmanuel Vadot */ 98*f126890aSEmmanuel Vadot pmx_twsi1: pmx-twsi1 { 99*f126890aSEmmanuel Vadot marvell,pins = "mpp36", "mpp37"; 100*f126890aSEmmanuel Vadot marvell,function = "twsi1"; 101*f126890aSEmmanuel Vadot }; 102*f126890aSEmmanuel Vadot 103*f126890aSEmmanuel Vadot pmx_sdio: pmx-sdio { 104*f126890aSEmmanuel Vadot marvell,pins = "mpp12", "mpp13", "mpp14", 105*f126890aSEmmanuel Vadot "mpp15", "mpp16", "mpp17"; 106*f126890aSEmmanuel Vadot marvell,function = "sdio"; 107*f126890aSEmmanuel Vadot }; 108*f126890aSEmmanuel Vadot }; 109*f126890aSEmmanuel Vadot 110*f126890aSEmmanuel Vadot thermal: thermal@10078 { 111*f126890aSEmmanuel Vadot compatible = "marvell,kirkwood-thermal"; 112*f126890aSEmmanuel Vadot reg = <0x10078 0x4>; 113*f126890aSEmmanuel Vadot status = "okay"; 114*f126890aSEmmanuel Vadot }; 115*f126890aSEmmanuel Vadot 116*f126890aSEmmanuel Vadot rtc: rtc@10300 { 117*f126890aSEmmanuel Vadot compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; 118*f126890aSEmmanuel Vadot reg = <0x10300 0x20>; 119*f126890aSEmmanuel Vadot interrupts = <53>; 120*f126890aSEmmanuel Vadot clocks = <&gate_clk 7>; 121*f126890aSEmmanuel Vadot }; 122*f126890aSEmmanuel Vadot 123*f126890aSEmmanuel Vadot i2c1: i2c@11100 { 124*f126890aSEmmanuel Vadot compatible = "marvell,mv64xxx-i2c"; 125*f126890aSEmmanuel Vadot reg = <0x11100 0x20>; 126*f126890aSEmmanuel Vadot #address-cells = <1>; 127*f126890aSEmmanuel Vadot #size-cells = <0>; 128*f126890aSEmmanuel Vadot interrupts = <32>; 129*f126890aSEmmanuel Vadot clock-frequency = <100000>; 130*f126890aSEmmanuel Vadot clocks = <&gate_clk 7>; 131*f126890aSEmmanuel Vadot pinctrl-0 = <&pmx_twsi1>; 132*f126890aSEmmanuel Vadot pinctrl-names = "default"; 133*f126890aSEmmanuel Vadot status = "disabled"; 134*f126890aSEmmanuel Vadot }; 135*f126890aSEmmanuel Vadot 136*f126890aSEmmanuel Vadot sata: sata@80000 { 137*f126890aSEmmanuel Vadot compatible = "marvell,orion-sata"; 138*f126890aSEmmanuel Vadot reg = <0x80000 0x5000>; 139*f126890aSEmmanuel Vadot interrupts = <21>; 140*f126890aSEmmanuel Vadot clocks = <&gate_clk 14>, <&gate_clk 15>; 141*f126890aSEmmanuel Vadot clock-names = "0", "1"; 142*f126890aSEmmanuel Vadot phys = <&sata_phy0>, <&sata_phy1>; 143*f126890aSEmmanuel Vadot phy-names = "port0", "port1"; 144*f126890aSEmmanuel Vadot status = "disabled"; 145*f126890aSEmmanuel Vadot }; 146*f126890aSEmmanuel Vadot 147*f126890aSEmmanuel Vadot sdio: mvsdio@90000 { 148*f126890aSEmmanuel Vadot compatible = "marvell,orion-sdio"; 149*f126890aSEmmanuel Vadot reg = <0x90000 0x200>; 150*f126890aSEmmanuel Vadot interrupts = <28>; 151*f126890aSEmmanuel Vadot clocks = <&gate_clk 4>; 152*f126890aSEmmanuel Vadot pinctrl-0 = <&pmx_sdio>; 153*f126890aSEmmanuel Vadot pinctrl-names = "default"; 154*f126890aSEmmanuel Vadot bus-width = <4>; 155*f126890aSEmmanuel Vadot cap-sdio-irq; 156*f126890aSEmmanuel Vadot cap-sd-highspeed; 157*f126890aSEmmanuel Vadot cap-mmc-highspeed; 158*f126890aSEmmanuel Vadot status = "disabled"; 159*f126890aSEmmanuel Vadot }; 160*f126890aSEmmanuel Vadot }; 161*f126890aSEmmanuel Vadot}; 162