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/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Dfvp-base-revc.dts15 /memreserve/ 0x80000000 0x00010000;
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x000>;
52 i-cache-size = <0x8000>;
55 d-cache-size = <0x8000>;
63 reg = <0x0 0x100>;
65 i-cache-size = <0x8000>;
68 d-cache-size = <0x8000>;
76 reg = <0x0 0x200>;
[all …]
H A Djuno-r1.dts38 #size-cells = <0>;
69 CPU_SLEEP_0: cpu-sleep-0 {
71 arm,psci-suspend-param = <0x0010000>;
78 CLUSTER_SLEEP_0: cluster-sleep-0 {
80 arm,psci-suspend-param = <0x1010000>;
88 A57_0: cpu@0 {
90 reg = <0x0 0x0>;
93 i-cache-size = <0xc000>;
96 d-cache-size = <0x8000>;
100 clocks = <&scpi_dvfs 0>;
[all …]
H A Djuno-r2.dts38 #size-cells = <0>;
69 CPU_SLEEP_0: cpu-sleep-0 {
71 arm,psci-suspend-param = <0x0010000>;
78 CLUSTER_SLEEP_0: cluster-sleep-0 {
80 arm,psci-suspend-param = <0x1010000>;
88 A72_0: cpu@0 {
90 reg = <0x0 0x0>;
93 i-cache-size = <0xc000>;
96 d-cache-size = <0x8000>;
100 clocks = <&scpi_dvfs 0>;
[all …]
H A Djuno.dts37 #size-cells = <0>;
68 CPU_SLEEP_0: cpu-sleep-0 {
70 arm,psci-suspend-param = <0x0010000>;
77 CLUSTER_SLEEP_0: cluster-sleep-0 {
79 arm,psci-suspend-param = <0x1010000>;
87 A57_0: cpu@0 {
89 reg = <0x0 0x0>;
92 i-cache-size = <0xc000>;
95 d-cache-size = <0x8000>;
99 clocks = <&scpi_dvfs 0>;
[all …]
/freebsd/sys/dev/mii/
H A De1000phyreg.h72 #define E1000_MAX_REG_ADDRESS 0x1F
74 #define E1000_CR 0x00 /* control register */
75 #define E1000_CR_SPEED_SELECT_MSB 0x0040
76 #define E1000_CR_COLL_TEST_ENABLE 0x0080
77 #define E1000_CR_FULL_DUPLEX 0x0100
78 #define E1000_CR_RESTART_AUTO_NEG 0x0200
79 #define E1000_CR_ISOLATE 0x0400
80 #define E1000_CR_POWER_DOWN 0x0800
81 #define E1000_CR_AUTO_NEG_ENABLE 0x1000
82 #define E1000_CR_SPEED_SELECT_LSB 0x2000
[all …]
H A Dip1000phyreg.h38 #define IP1000PHY_MII_BMCR 0x00
39 #define IP1000PHY_BMCR_FDX 0x0100
40 #define IP1000PHY_BMCR_STARTNEG 0x0200
41 #define IP1000PHY_BMCR_ISO 0x0400
42 #define IP1000PHY_BMCR_PDOWN 0x0800
43 #define IP1000PHY_BMCR_AUTOEN 0x1000
44 #define IP1000PHY_BMCR_LOOP 0x4000
45 #define IP1000PHY_BMCR_RESET 0x8000
47 #define IP1000PHY_BMCR_10 0x0000
48 #define IP1000PHY_BMCR_100 0x2000
[all …]
H A Dciphyreg.h44 #define CIPHY_MII_BMCR 0x00
45 #define CIPHY_BMCR_RESET 0x8000
46 #define CIPHY_BMCR_LOOP 0x4000
47 #define CIPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
48 #define CIPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
49 #define CIPHY_BMCR_PDOWN 0x0800 /* Power down */
50 #define CIPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
51 #define CIPHY_BMCR_FDX 0x0100 /* Duplex mode */
52 #define CIPHY_BMCR_CTEST 0x0080 /* Collision test enable */
53 #define CIPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */
[all …]
H A Dxmphyreg.h42 #define XMPHY_MII_BMCR 0x00
43 #define XMPHY_BMCR_RESET 0x8000
44 #define XMPHY_BMCR_LOOP 0x4000
45 #define XMPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
46 #define XMPHY_BMCR_PDOWN 0x0800 /* Power down */
47 #define XMPHY_BMCR_ISO 0x0400 /* Isolate */
48 #define XMPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
49 #define XMPHY_BMCR_FDX 0x0100 /* Duplex mode */
51 #define XMPHY_MII_BMSR 0x01
52 #define XMPHY_BMSR_EXTSTS 0x0100 /* Extended status present */
[all …]
H A Drgephyreg.h47 #define RGEPHY_MII_BMCR 0x00
48 #define RGEPHY_BMCR_RESET 0x8000
49 #define RGEPHY_BMCR_LOOP 0x4000
50 #define RGEPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
51 #define RGEPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
52 #define RGEPHY_BMCR_PDOWN 0x0800 /* Power down */
53 #define RGEPHY_BMCR_ISO 0x0400 /* Isolate */
54 #define RGEPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
55 #define RGEPHY_BMCR_FDX 0x0100 /* Duplex mode */
56 #define RGEPHY_BMCR_CTEST 0x0080 /* Collision test enable */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62a7.dtsi17 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0x8000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0x8000>;
61 d-cache-size = <0x8000>;
69 reg = <0x002>;
72 i-cache-size = <0x8000>;
[all …]
H A Dk3-am62p5.dtsi16 #size-cells = <0>;
38 cpu0: cpu@0 {
40 reg = <0x000>;
43 i-cache-size = <0x8000>;
46 d-cache-size = <0x8000>;
50 clocks = <&k3_clks 135 0>;
55 reg = <0x001>;
58 i-cache-size = <0x8000>;
61 d-cache-size = <0x8000>;
65 clocks = <&k3_clks 136 0>;
[all …]
H A Dk3-am654.dtsi13 #size-cells = <0>;
36 cpu0: cpu@0 {
38 reg = <0x000>;
41 i-cache-size = <0x8000>;
44 d-cache-size = <0x8000>;
52 reg = <0x001>;
55 i-cache-size = <0x8000>;
58 d-cache-size = <0x8000>;
66 reg = <0x100>;
69 i-cache-size = <0x8000>;
[all …]
H A Dk3-am625.dtsi17 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0x8000>;
47 d-cache-size = <0x8000>;
52 clocks = <&k3_clks 135 0>;
58 reg = <0x001>;
61 i-cache-size = <0x8000>;
64 d-cache-size = <0x8000>;
69 clocks = <&k3_clks 136 0>;
[all …]
H A Dk3-am642.dtsi15 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0x000>;
34 i-cache-size = <0x8000>;
37 d-cache-size = <0x8000>;
45 reg = <0x001>;
48 i-cache-size = <0x8000>;
51 d-cache-size = <0x8000>;
62 cache-size = <0x40000>;
H A Dk3-j722s.dtsi24 #size-cells = <0>;
46 cpu0: cpu@0 {
48 reg = <0x000>;
51 i-cache-size = <0x8000>;
54 d-cache-size = <0x8000>;
58 clocks = <&k3_clks 135 0>;
63 reg = <0x001>;
66 i-cache-size = <0x8000>;
69 d-cache-size = <0x8000>;
73 clocks = <&k3_clks 136 0>;
[all …]
H A Dk3-am652.dtsi13 #size-cells = <0>;
26 cpu0: cpu@0 {
28 reg = <0x000>;
31 i-cache-size = <0x8000>;
34 d-cache-size = <0x8000>;
42 reg = <0x001>;
45 i-cache-size = <0x8000>;
48 d-cache-size = <0x8000>;
59 cache-size = <0x80000>;
/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v3.dtsi21 #size-cells = <0>;
23 cpu@0 {
26 reg = <0x0>;
28 d-cache-size = <0x8000>;
31 i-cache-size = <0xc000>;
40 reg = <0x1>;
42 d-cache-size = <0x8000>;
45 i-cache-size = <0xc000>;
54 reg = <0x2>;
56 d-cache-size = <0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dpci-msi.txt13 * Bits [2:0] are the Function number.
67 reg = <0xa 0x1>;
74 reg = <0xf 0x1>;
82 msi-map = <0x0 &msi_a 0x0 0x10000>,
95 reg = <0xa 0x1>;
102 reg = <0xf 0x1>;
110 msi-map = <0x0 &msi_a 0x0 0x100>,
111 msi-map-mask = <0xff>
124 reg = <0xa 0x1>;
131 reg = <0xf 0x1>;
[all …]
H A Dpci-iommu.txt13 * Bits [2:0] are the Function number.
56 reg = <0xa 0x1>;
62 reg = <0xf 0x1>;
70 iommu-map = <0x0 &iommu 0x0 0x10000>;
83 reg = <0xa 0x1>;
89 reg = <0xf 0x1>;
97 iommu-map = <0x0 &iommu 0x0 0x10000>;
98 iommu-map-mask = <0xfff8>;
111 reg = <0xa 0x1>;
117 reg = <0xf 0x1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2837.dtsi8 ranges = <0x7e000000 0x3f000000 0x1000000>,
9 <0x40000000 0x40000000 0x00001000>;
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 reg = <0x40000000 0x100>;
30 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
39 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
54 cpu-release-addr = <0x0 0x000000d8>;
55 d-cache-size = <0x8000>;
[all …]
H A Dbcm2836.dtsi9 ranges = <0x7e000000 0x3f000000 0x1000000>,
10 <0x40000000 0x40000000 0x00001000>;
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
15 reg = <0x40000000 0x100>;
31 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
40 #size-cells = <0>;
51 v7_cpu0: cpu@0 {
54 reg = <0xf00>;
56 d-cache-size = <0x8000>;
59 i-cache-size = <0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-cpus.dtsi5 #address-cells = <0x1>;
6 #size-cells = <0x0>;
43 CPU0: cpu@0 {
46 reg = <0x0>;
49 i-cache-size = <0xC000>;
52 d-cache-size = <0x8000>;
62 reg = <0x1>;
65 i-cache-size = <0xC000>;
68 d-cache-size = <0x8000>;
77 reg = <0x100>;
[all …]
/freebsd/sys/dts/arm/
H A Dannapurna-alpine.dts41 #size-cells = <0>;
43 cpu@0 {
46 reg = <0x0>;
49 d-cache-size = <0x8000>; // L1, 32K
50 i-cache-size = <0x8000>; // L1, 32K
51 timebase-frequency = <0>;
53 clock-frequency = <0>;
59 reg = <0x0>;
62 d-cache-size = <0x8000>; // L1, 32K
63 i-cache-size = <0x8000>; // L1, 32K
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8qxp.dtsi55 #size-cells = <0>;
58 A35_0: cpu@0 {
61 reg = <0x0 0x0>;
63 i-cache-size = <0x8000>;
66 d-cache-size = <0x8000>;
78 reg = <0x0 0x1>;
80 i-cache-size = <0x8000>;
83 d-cache-size = <0x8000>;
95 reg = <0x0 0x2>;
97 i-cache-size = <0x8000>;
[all …]
/freebsd/sys/dev/ic/
H A Di82586.h64 #define IE_SCP_ADDR 0xfffff4
93 #define IE_RU_COMMAND 0x0070 /* mask for RU command */
94 #define IE_RU_NOP 0 /* for completeness */
95 #define IE_RU_START 0x0010 /* start receive unit command */
96 #define IE_RU_ENABLE 0x0020 /* enable receiver command */
97 #define IE_RU_DISABLE 0x0030 /* disable receiver command */
98 #define IE_RU_ABORT 0x0040 /* abort current receive operation */
100 #define IE_CU_COMMAND 0x0700 /* mask for CU command */
101 #define IE_CU_NOP 0 /* included for completeness */
102 #define IE_CU_START 0x0100 /* do-command command */
[all …]

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