| /linux/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| H A D | gaudi_blocks.h | 16 #define mmNIC0_PHY0_BASE 0x0ull
17 #define NIC0_PHY0_MAX_OFFSET 0x9F13
18 #define mmMME0_ACC_BASE 0x7FFC020000ull
19 #define MME0_ACC_MAX_OFFSET 0x5C00
20 #define MME0_ACC_SECTION 0x20000
21 #define mmMME0_SBAB_BASE 0x7FFC040000ull
22 #define MME0_SBAB_MAX_OFFSET 0x5800
23 #define MME0_SBAB_SECTION 0x1000
24 #define mmMME0_PRTN_BASE 0x7FFC041000ull
25 #define MME0_PRTN_MAX_OFFSET 0x5000
[all …]
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| /linux/drivers/power/supply/ |
| H A D | max17040_battery.c | 23 #define MAX17040_VCELL 0x02
24 #define MAX17040_SOC 0x04
25 #define MAX17040_MODE 0x06
26 #define MAX17040_VER 0x08
27 #define MAX17040_CONFIG 0x0C
28 #define MAX17040_STATUS 0x1A
29 #define MAX17040_CMD 0xFE
34 #define MAX17040_RCOMP_DEFAULT 0x9700
36 #define MAX17040_ATHD_MASK 0x3f
37 #define MAX17040_ALSC_MASK 0x40
[all …]
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| /linux/drivers/bus/ |
| H A D | omap_l3_smx.h | 14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | lgdt3305.h | 16 LGDT3305_MPEG_PARALLEL = 0,
21 LGDT3305_TPCLK_RISING_EDGE = 0,
26 LGDT3305_TPCLK_GATED = 0,
31 LGDT3305_TP_VALID_LOW = 0,
36 LGDT3305 = 0,
48 u16 usref_8vsb; /* default: 0x32c4 */
49 u16 usref_qam64; /* default: 0x5400 */
50 u16 usref_qam256; /* default: 0x2a80 */
52 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
55 /* spectral inversion - 0:disabled 1:enabled */
[all …]
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | amlogic,aiu.yaml | 95 reg = <0x5400 0x2ac>;
|
| /linux/drivers/media/usb/gspca/ |
| H A D | w996Xcf.c | 53 Return 0 on success, -1 otherwise.
61 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_fsb()
69 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0, in w9968cf_write_fsb()
71 value, 0x06, sd->gspca_dev.usb_buf, 6, 500); in w9968cf_write_fsb()
72 if (ret < 0) { in w9968cf_write_fsb()
80 Return 0 on success, a negative number otherwise.
86 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_sb()
95 usb_sndctrlpipe(sd->gspca_dev.dev, 0), in w9968cf_write_sb()
96 0, in w9968cf_write_sb()
98 value, 0x01, NULL, 0, 500); in w9968cf_write_sb()
[all …]
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| /linux/drivers/regulator/ |
| H A D | qcom_spmi-regulator.c | 25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]
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| /linux/drivers/cpufreq/ |
| H A D | sun50i-cpufreq-nvmem.c | 22 #define NVMEM_MASK 0x7
25 #define SUN50I_A100_NVMEM_MASK 0xf
48 return 0; in sun50i_h6_efuse_xlate()
59 case 0b100: in sun50i_a100_efuse_xlate()
61 case 0b010: in sun50i_a100_efuse_xlate()
64 return 0; in sun50i_a100_efuse_xlate()
79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
80 * 0 and 2 seem identical from the OPP tables' point of view.
85 u32 value = 0; in sun50i_h616_efuse_xlate()
87 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
[all …]
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| /linux/arch/mips/include/asm/ |
| H A D | cpu.h | 16 register 15, select 0) is defined in this (backwards compatible) way:
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
28 #define PRID_OPT_MASK 0xff000000
34 #define PRID_COMP_MASK 0xff0000
36 #define PRID_COMP_LEGACY 0x000000
37 #define PRID_COMP_MIPS 0x010000
38 #define PRID_COMP_BROADCOM 0x020000
39 #define PRID_COMP_ALCHEMY 0x030000
40 #define PRID_COMP_SIBYTE 0x040000
41 #define PRID_COMP_SANDCRAFT 0x050000
[all …]
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_ptp_consts.h | 14 .base_addr = 0x092000,
15 .step = 0x98,
18 .base_addr = 0x093000,
19 .step = 0x200,
22 .base_addr = 0x000000,
23 .step = 0x21000,
26 .base_addr = 0x085000,
27 .step = 0x1000,
30 .base_addr = 0x084000,
31 .step = 0x400,
[all …]
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| /linux/drivers/net/ethernet/amd/ |
| H A D | ariadne.h | 17 * Publication #16907, Rev. B, Amendment/0, May 1994
62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */
63 #define CSR1 0x0100 /* - IADR[15:0] */
64 #define CSR2 0x0200 /* - IADR[23:16] */
65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */
66 #define CSR4 0x0400 /* - Test and Features Control */
67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */
68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */
69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */
70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */
[all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vid.h | 26 #define SDMA0_REGISTER_OFFSET 0x0 /* not a register */
27 #define SDMA1_REGISTER_OFFSET 0x200 /* not a register */
30 #define KFD_VI_SDMA_QUEUE_OFFSET 0x80 /* not a register */
33 #define CRTC0_REGISTER_OFFSET (0x1b9c - 0x1b9c)
34 #define CRTC1_REGISTER_OFFSET (0x1d9c - 0x1b9c)
35 #define CRTC2_REGISTER_OFFSET (0x1f9c - 0x1b9c)
36 #define CRTC3_REGISTER_OFFSET (0x419c - 0x1b9c)
37 #define CRTC4_REGISTER_OFFSET (0x439c - 0x1b9c)
38 #define CRTC5_REGISTER_OFFSET (0x459c - 0x1b9c)
39 #define CRTC6_REGISTER_OFFSET (0x479c - 0x1b9c)
[all …]
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| /linux/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2.h | 28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
|
| /linux/drivers/net/wireless/intel/iwlwifi/pcie/ |
| H A D | drv.c | 25 0, _invalid_type))
36 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5000_mac_cfg)}, /* Mini Card */
37 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5000_mac_cfg)}, /* Half Mini Card */
38 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5000_mac_cfg)}, /* Mini Card */
39 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5000_mac_cfg)}, /* Half Mini Card */
40 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5000_mac_cfg)}, /* Mini Card */
41 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5000_mac_cfg)}, /* Half Mini Card */
42 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5000_mac_cfg)}, /* Mini Card */
43 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5000_mac_cfg)}, /* Half Mini Card */
44 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5000_mac_cfg)}, /* Mini Card */
[all …]
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| /linux/sound/hda/codecs/cirrus/ |
| H A D | cs8409-tables.c | 24 .index = 0,
37 .index = 0,
62 { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */
63 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */
64 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */
65 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */
66 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */
67 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */
72 { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
73 { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
[all …]
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| /linux/drivers/net/wireless/intersil/p54/ |
| H A D | p54usb.c | 45 {USB_DEVICE(0x0411, 0x0050)}, /* Buffalo WLI2-USB2-G54 */
46 {USB_DEVICE(0x045e, 0x00c2)}, /* Microsoft MN-710 */
47 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */
48 {USB_DEVICE(0x0675, 0x0530)}, /* DrayTek Vigor 530 */
49 {USB_DEVICE(0x06b9, 0x0120)}, /* Thomson SpeedTouch 120g */
50 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */
51 {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */
52 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */
53 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */
54 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */
[all …]
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| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_reg.h | 12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
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| /linux/drivers/scsi/ |
| H A D | sense_codes.h | 7 SENSE_CODE(0x0000, "No additional sense information")
8 SENSE_CODE(0x0001, "Filemark detected")
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
10 SENSE_CODE(0x0003, "Setmark detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
13 SENSE_CODE(0x0006, "I/O process terminated")
14 SENSE_CODE(0x0007, "Programmable early warning detected")
15 SENSE_CODE(0x0011, "Audio play operation in progress")
16 SENSE_CODE(0x0012, "Audio play operation paused")
[all …]
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| /linux/drivers/gpu/drm/tests/ |
| H A D | drm_format_helper_test.c | 21 #define TEST_USE_DEFAULT_PITCH 0
129 .clip = DRM_RECT_INIT(0, 0, 1, 1),
130 .xrgb8888 = { 0x01FF0000 },
133 .expected = { 0x4C },
137 .expected = { 0xE0 },
141 .expected = { 0xF800 },
142 .expected_swab = { 0x00F8 },
146 .expected = { 0x7C00 },
150 .expected = { 0xFC00 },
154 .expected = { 0xF801 },
[all …]
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| /linux/drivers/pci/switch/ |
| H A D | switchtec.c | 46 MRPC_IDLE = 0,
173 memset(stdev->dma_mrpc->data, 0xFF, SWITCHTEC_MRPC_PAYLOAD_SIZE); in mrpc_cmd_submit()
201 return 0; in mrpc_queue_cmd()
215 stdev->mrpc_busy = 0; in mrpc_cleanup_cmd()
241 stuser->return_code = 0; in mrpc_complete_cmd()
251 if (stuser->return_code != 0) in mrpc_complete_cmd()
355 buf[len + 1] = 0; in io_string_show()
357 for (i = len - 1; i > 0; i--) { in io_string_show()
361 buf[i + 1] = 0; in io_string_show()
482 return 0; in switchtec_dev_open()
[all …]
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| /linux/sound/pci/asihpi/ |
| H A D | hpi6205.c | 56 #define C6205_HSR_INTSRC 0x01
57 #define C6205_HSR_INTAVAL 0x02
58 #define C6205_HSR_INTAM 0x04
59 #define C6205_HSR_CFGERR 0x08
60 #define C6205_HSR_EEREAD 0x10
62 #define C6205_HDCR_WARMRESET 0x01
63 #define C6205_HDCR_DSPINT 0x02
64 #define C6205_HDCR_PCIBOOT 0x04
67 #define C6205_DSPP_MAP1 0x400
71 * of DSP memory mapped registers (starting at 0x01800000).
[all …]
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| /linux/drivers/net/dsa/microchip/ |
| H A D | ksz_common.c | 39 #define MIB_COUNTER_NUM 0x20
118 { 0x00, "rx" },
119 { 0x01, "rx_hi" },
120 { 0x02, "rx_undersize" },
121 { 0x03, "rx_fragments" },
122 { 0x04, "rx_oversize" },
123 { 0x05, "rx_jabbers" },
124 { 0x06, "rx_symbol_err" },
125 { 0x07, "rx_crc_err" },
126 { 0x08, "rx_align_err" },
[all …]
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| /linux/drivers/net/wireless/broadcom/b43legacy/ |
| H A D | phy.c | 33 0x4D, 0x4C, 0x4B, 0x4A,
34 0x4A, 0x49, 0x48, 0x47,
35 0x47, 0x46, 0x45, 0x45,
36 0x44, 0x43, 0x42, 0x42,
37 0x41, 0x40, 0x3F, 0x3E,
38 0x3D, 0x3C, 0x3B, 0x3A,
39 0x39, 0x38, 0x37, 0x36,
40 0x35, 0x34, 0x32, 0x31,
41 0x30, 0x2F, 0x2D, 0x2C,
42 0x2B, 0x29, 0x28, 0x26,
[all …]
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| /linux/drivers/hid/ |
| H A D | hid-nintendo.c | 51 #define JC_OUTPUT_RUMBLE_AND_SUBCMD 0x01
52 #define JC_OUTPUT_FW_UPDATE_PKT 0x03
53 #define JC_OUTPUT_RUMBLE_ONLY 0x10
54 #define JC_OUTPUT_MCU_DATA 0x11
55 #define JC_OUTPUT_USB_CMD 0x80
58 #define JC_SUBCMD_STATE 0x00
59 #define JC_SUBCMD_MANUAL_BT_PAIRING 0x01
60 #define JC_SUBCMD_REQ_DEV_INFO 0x02
61 #define JC_SUBCMD_SET_REPORT_MODE 0x03
62 #define JC_SUBCMD_TRIGGERS_ELAPSED 0x04
[all …]
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| /linux/drivers/pci/ |
| H A D | quirks.c | 92 * Return 0 if the link has been successfully retrained. Return an error
98 { PCI_VDEVICE(ASMEDIA, 0x2824) }, /* ASMedia ASM2824 */ in pcie_failed_link_retrain()
268 u8 cls = 0; in pci_apply_final_quirks()
302 return 0; in pci_apply_final_quirks()
340 pci_read_config_byte(d, 0x82, &dlc); in quirk_passive_release()
344 pci_write_config_byte(d, 0x82, dlc); in quirk_passive_release()
390 pci_read_config_dword(dev, 0x40, &pmbase); in quirk_tigerpoint_bm_sts()
391 pmbase = pmbase & 0xff80; in quirk_tigerpoint_bm_sts()
394 if (pm1a & 0x10) { in quirk_tigerpoint_bm_sts()
396 outw(0x10, pmbase); in quirk_tigerpoint_bm_sts()
[all …]
|