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/linux/drivers/gpu/host1x/hw/
H A Dhw_host1x08_common.h6 #define HOST1X_COMMON_OFA_MLOCK 0x4050
7 #define HOST1X_COMMON_NVJPG1_MLOCK 0x4070
8 #define HOST1X_COMMON_VIC_MLOCK 0x4078
9 #define HOST1X_COMMON_NVENC_MLOCK 0x407c
10 #define HOST1X_COMMON_NVDEC_MLOCK 0x4080
11 #define HOST1X_COMMON_NVJPG_MLOCK 0x4084
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,am654-serdes-ctrl.yaml36 reg = <0x4080 0x4>;
41 mux-reg-masks = <0x0 0x3>; /* lane select */
H A Dti,j721e-system-controller.yaml49 "^mux-controller@[0-9a-f]+$":
54 "^clock-controller@[0-9a-f]+$":
60 "phy@[0-9a-f]+$":
66 "^chipid@[0-9a-f]+$":
72 "^pcie-ctrl@[0-9a-f]+$":
77 "^clock@[0-9a-f]+$":
83 "^dss-oldi-io-ctrl@[0-9a-f]+$":
102 reg = <0x00100000 0x1c000>;
109 reg = <0x00004080 0x50>;
113 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
[all …]
/linux/drivers/ntb/hw/intel/
H A Dntb_hw_gen3.h50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0
51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1
52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2
53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3
54 #define GEN3_DEVCTRL_OFFSET 0x0098
55 #define GEN3_DEVSTS_OFFSET 0x009a
56 #define GEN3_UNCERRSTS_OFFSET 0x014c
57 #define GEN3_CORERRSTS_OFFSET 0x0158
58 #define GEN3_LINK_STATUS_OFFSET 0x01a2
60 #define GEN3_NTBCNTL_OFFSET 0x0000
[all …]
/linux/drivers/dma/xilinx/
H A Dxdma-regs.h32 #define XDMA_DESC_MAGIC 0xad4bUL
34 #define XDMA_DESC_FLAGS_BITS GENMASK(7, 0)
35 #define XDMA_DESC_STOPPED BIT(0)
75 #define XDMA_CHAN_IDENTIFIER 0x0
76 #define XDMA_CHAN_CONTROL 0x4
77 #define XDMA_CHAN_CONTROL_W1S 0x8
78 #define XDMA_CHAN_CONTROL_W1C 0xc
79 #define XDMA_CHAN_STATUS 0x40
80 #define XDMA_CHAN_STATUS_RC 0x44
81 #define XDMA_CHAN_COMPLETED_DESC 0x48
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-a5.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0x0 0x0>;
25 reg = <0x0 0x100>;
32 reg = <0x0 0x200>;
39 reg = <0x0 0x300>;
58 reg = <0x0 0x2000 0x0 0x98>;
67 ranges = <0x0 0x0 0x0 0x4000 0x0 0x300>;
70 reg = <0x0 0xc0 0x0 0x40>,
71 <0x0 0x18 0x0 0x8>;
[all …]
H A Damlogic-s7d.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0 0x0>;
27 reg = <0x0 0x100>;
34 reg = <0x0 0x200>;
41 reg = <0x0 0x300>;
73 #clock-cells = <0>;
85 #address-cells = <0>;
87 reg = <0x0 0xfff01000 0 0x1000>,
88 <0x0 0xfff02000 0 0x0100>;
[all …]
H A Damlogic-s6.dtsi14 #size-cells = <0>;
16 cpu0: cpu@0 {
19 reg = <0x0 0x0>;
26 reg = <0x0 0x100>;
33 reg = <0x0 0x200>;
40 reg = <0x0 0x300>;
71 #clock-cells = <0>;
83 #address-cells = <0>;
85 reg = <0x0 0xff200000 0 0x10000>,
86 <0x0 0xff240000 0 0x80000>;
[all …]
H A Damlogic-s7.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0 0x0>;
23 d-cache-size = <0x8000>;
26 i-cache-size = <0x8000>;
34 reg = <0x0 0x100>;
37 d-cache-size = <0x8000>;
40 i-cache-size = <0x8000>;
48 reg = <0x0 0x200>;
51 d-cache-size = <0x8000>;
[all …]
H A Dmeson-s4.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0x0 0x0>;
30 reg = <0x0 0x1>;
37 reg = <0x0 0x2>;
44 reg = <0x0 0x3>;
66 #clock-cells = <0>;
89 #address-cells = <0>;
91 reg = <0x0 0xfff01000 0 0x1000>,
92 <0x0 0xfff02000 0 0x2000>,
[all …]
/linux/drivers/net/ethernet/tehuti/
H A Dtn40_regs.h8 #define TN40_REGS_SIZE 0x10000
10 /* Registers from 0x0000-0x00fc were remapped to 0x4000-0x40fc */
11 #define TN40_REG_TXD_CFG1_0 0x4000
12 #define TN40_REG_TXD_CFG1_1 0x4004
13 #define TN40_REG_TXD_CFG1_2 0x4008
14 #define TN40_REG_TXD_CFG1_3 0x400C
16 #define TN40_REG_RXF_CFG1_0 0x4010
17 #define TN40_REG_RXF_CFG1_1 0x4014
18 #define TN40_REG_RXF_CFG1_2 0x4018
19 #define TN40_REG_RXF_CFG1_3 0x401C
[all …]
H A Dtehuti.h81 # define L32_64(x) (u32) ((u64)(x) & 0xffffffff)
83 # define H32_64(x) 0
105 # define NETDEV_TX_OK 0
134 #define GET_INT_COAL(x) GET_BITS_SHIFT(x, 15, 0)
189 * if len == 0 addr is dma
190 * if len != 0 addr is skb */
207 u64 InUCast; /* 0x7200 */
208 u64 InMCast; /* 0x7210 */
209 u64 InBCast; /* 0x7220 */
210 u64 InPkts; /* 0x7230 */
[all …]
/linux/drivers/gpu/drm/radeon/reg_srcs/
H A Drv5151 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/linux/arch/powerpc/include/asm/
H A Dspu.h23 #define MFC_PUT_CMD 0x20
24 #define MFC_PUTS_CMD 0x28
25 #define MFC_PUTR_CMD 0x30
26 #define MFC_PUTF_CMD 0x22
27 #define MFC_PUTB_CMD 0x21
28 #define MFC_PUTFS_CMD 0x2A
29 #define MFC_PUTBS_CMD 0x29
30 #define MFC_PUTRF_CMD 0x32
31 #define MFC_PUTRB_CMD 0x31
32 #define MFC_PUTL_CMD 0x24
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_pci_id_tbl.h46 * -- The PCI Function Number to use in the PCI Device ID Table. "0"
73 /* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
76 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
97 CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */
98 CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */
99 CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */
100 CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */
101 CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */
102 CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */
103 CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/linux/include/linux/mfd/wm831x/
H A Dcore.h25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]
/linux/sound/soc/codecs/
H A Dadau1781.c24 #define ADAU1781_DMIC_BEEP_CTRL 0x4008
25 #define ADAU1781_LEFT_PGA 0x400e
26 #define ADAU1781_RIGHT_PGA 0x400f
27 #define ADAU1781_LEFT_PLAYBACK_MIXER 0x401c
28 #define ADAU1781_RIGHT_PLAYBACK_MIXER 0x401e
29 #define ADAU1781_MONO_PLAYBACK_MIXER 0x401f
30 #define ADAU1781_LEFT_LINEOUT 0x4025
31 #define ADAU1781_RIGHT_LINEOUT 0x4026
32 #define ADAU1781_SPEAKER 0x4027
33 #define ADAU1781_BEEP_ZC 0x402
[all...]
/linux/drivers/video/fbdev/
H A Dhpfb.c34 #define TC_NBLANK 0x4080
35 #define TC_WEN 0x4088
36 #define TC_REN 0x408c
37 #define TC_FBEN 0x4090
38 #define TC_PRR 0x40ea
41 #define RR_CLEAR 0x0
42 #define RR_COPY 0x3
43 #define RR_NOOP 0x5
44 #define RR_XOR 0x6
45 #define RR_INVERT 0xa
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_mcpcia.h58 * 00 00 Byte 1110 0x000
59 * 01 00 Byte 1101 0x020
60 * 10 00 Byte 1011 0x040
61 * 11 00 Byte 0111 0x060
63 * 00 01 Word 1100 0x008
64 * 01 01 Word 1001 0x028 <= Not supported in this code.
65 * 10 01 Word 0011 0x048
67 * 00 10 Tribyte 1000 0x010
68 * 01 10 Tribyte 0001 0x030
70 * 10 11 Longword 0000 0x058
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s-main.dtsi12 serdes_refclk: clk-0 {
14 #clock-cells = <0>;
15 clock-frequency = <0>;
22 ranges = <0x0f000000 0x0 0x0f000000 0x00010000>;
26 clocks = <&k3_clks 279 0>, <&k3_clks 279 1>, <&serdes_refclk>;
39 reg = <0x0f000000 0x00010000>;
41 resets = <&serdes_wiz0 0>;
53 #size-cells = <0>;
60 ranges = <0x0f010000 0x0 0x0f010000 0x00010000>;
64 clocks = <&k3_clks 280 0>, <&k3_clks 280 1>, <&serdes_refclk>;
[all …]
/linux/drivers/net/ethernet/agere/
H A Det131x.h53 #define LBCIF_DWORD0_GROUP 0xAC
54 #define LBCIF_DWORD1_GROUP 0xB0
57 #define LBCIF_ADDRESS_REGISTER 0xAC
58 #define LBCIF_DATA_REGISTER 0xB0
59 #define LBCIF_CONTROL_REGISTER 0xB1
60 #define LBCIF_STATUS_REGISTER 0xB2
63 #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01
64 #define LBCIF_CONTROL_PAGE_WRITE 0x02
65 #define LBCIF_CONTROL_EEPROM_RELOAD 0x08
66 #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20
[all …]
/linux/tools/perf/pmu-events/arch/x86/westmereep-sp/
H A Dmemory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0xB7, 0xBB",
7 "MSRIndex": "0x1a6,0x1a7",
8 "MSRValue": "0x6011",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "EventCode": "0xB7, 0xBB",
17 "MSRIndex": "0x1a6,0x1a7",
18 "MSRValue": "0xF811",
20 "UMask": "0x1"
[all …]
/linux/tools/perf/pmu-events/arch/x86/westmereep-dp/
H A Dmemory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x5",
8 "UMask": "0x2"
12 "Counter": "0,1,2,3",
13 "EventCode": "0xB7, 0xBB",
15 "MSRIndex": "0x1a6,0x1a7",
16 "MSRValue": "0x3011",
18 "UMask": "0x1"
22 "Counter": "0,1,2,3",
23 "EventCode": "0xB7, 0xBB",
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_dbg.c13 * | Module Init and Probe | 0x0199 | |
14 * | Mailbox commands | 0x1206 | 0x11a5-0x11ff |
15 * | Device Discovery | 0x2134 | 0x2112-0x2115 |
16 * | | | 0x2127-0x2128 |
17 * | Queue Command and IO tracing | 0x3074 | 0x300b |
18 * | | | 0x3027-0x3028 |
19 * | | | 0x303d-0x3041 |
20 * | | | 0x302e,0x3033 |
21 * | | | 0x3036,0x3038 |
22 * | | | 0x303a |
[all …]

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