/linux/sound/soc/codecs/ |
H A D | adau17x1.h | 72 #define ADAU17X1_CLOCK_CONTROL 0x4000 73 #define ADAU17X1_PLL_CONTROL 0x4002 74 #define ADAU17X1_REC_POWER_MGMT 0x4009 75 #define ADAU17X1_MICBIAS 0x4010 76 #define ADAU17X1_SERIAL_PORT0 0x4015 77 #define ADAU17X1_SERIAL_PORT1 0x4016 78 #define ADAU17X1_CONVERTER0 0x4017 79 #define ADAU17X1_CONVERTER1 0x4018 80 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a 81 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b [all …]
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H A D | cx2072x.h | 19 #define CX2072X_REG_MAX 0x8a3c 21 #define CX2072X_VENDOR_ID 0x0200 22 #define CX2072X_REVISION_ID 0x0208 23 #define CX2072X_CURRENT_BCLK_FREQUENCY 0x00dc 24 #define CX2072X_AFG_POWER_STATE 0x0414 25 #define CX2072X_UM_RESPONSE 0x0420 26 #define CX2072X_GPIO_DATA 0x0454 27 #define CX2072X_GPIO_ENABLE 0x0458 28 #define CX2072X_GPIO_DIRECTION 0x045c 29 #define CX2072X_GPIO_WAKE 0x0460 [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | ti,am62-usb.yaml | 62 "^usb@[0-9a-f]+$": 88 reg = <0x00 0x0f910000 0x00 0x800>, 89 <0x00 0x0f918000 0x00 0x400>; 92 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; 99 reg = <0x00 0x31100000 0x00 0x50000>; 100 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ 101 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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/linux/arch/parisc/include/uapi/asm/ |
H A D | socket.h | 9 #define SOL_SOCKET 0xffff 11 #define SO_DEBUG 0x0001 12 #define SO_REUSEADDR 0x0004 13 #define SO_KEEPALIVE 0x0008 14 #define SO_DONTROUTE 0x0010 15 #define SO_BROADCAST 0x0020 16 #define SO_LINGER 0x0080 17 #define SO_OOBINLINE 0x0100 18 #define SO_REUSEPORT 0x0200 19 #define SO_SNDBUF 0x1001 [all …]
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/linux/drivers/ntb/hw/intel/ |
H A D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0 51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1 52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2 53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3 54 #define GEN3_DEVCTRL_OFFSET 0x0098 55 #define GEN3_DEVSTS_OFFSET 0x009a 56 #define GEN3_UNCERRSTS_OFFSET 0x014c 57 #define GEN3_CORERRSTS_OFFSET 0x0158 58 #define GEN3_LINK_STATUS_OFFSET 0x01a2 60 #define GEN3_NTBCNTL_OFFSET 0x0000 [all …]
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/linux/drivers/net/ethernet/tehuti/ |
H A D | tn40_regs.h | 8 #define TN40_REGS_SIZE 0x10000 10 /* Registers from 0x0000-0x00fc were remapped to 0x4000-0x40fc */ 11 #define TN40_REG_TXD_CFG1_0 0x4000 12 #define TN40_REG_TXD_CFG1_1 0x4004 13 #define TN40_REG_TXD_CFG1_2 0x4008 14 #define TN40_REG_TXD_CFG1_3 0x400C 16 #define TN40_REG_RXF_CFG1_0 0x4010 17 #define TN40_REG_RXF_CFG1_1 0x4014 18 #define TN40_REG_RXF_CFG1_2 0x4018 19 #define TN40_REG_RXF_CFG1_3 0x401C [all …]
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/linux/drivers/scsi/ |
H A D | hptiop.h | 30 #define IOPMU_QUEUE_EMPTY 0xffffffff 31 #define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000 32 #define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000 33 #define IOPMU_QUEUE_REQUEST_SIZE_BIT 0x40000000 34 #define IOPMU_QUEUE_REQUEST_RESULT_BIT 0x40000000 40 #define IOPMU_OUTBOUND_INT_PCI 0x10 46 #define IOPMU_INBOUND_INT_POSTQUEUE 0x10 63 __le32 reserved[0x20400 / 4]; 72 __le32 reserved0[(0x4000 - 0) / 4]; 75 __le32 reserved1[(0x4018 - 0x4008) / 4]; [all …]
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H A D | vmw_pvscsi.h | 33 #define PCI_DEVICE_ID_VMWARE_PVSCSI 0x07C0 39 BTSTAT_SUCCESS = 0x00, /* CCB complete normally with no errors */ 40 BTSTAT_LINKED_COMMAND_COMPLETED = 0x0a, 41 BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b, 42 BTSTAT_DATA_UNDERRUN = 0x0c, 43 BTSTAT_SELTIMEO = 0x11, /* SCSI selection timeout */ 44 BTSTAT_DATARUN = 0x12, /* data overrun/underrun */ 45 BTSTAT_BUSFREE = 0x13, /* unexpected bus free */ 46 BTSTAT_INVPHASE = 0x14, /* invalid bus phase or sequence 48 BTSTAT_LUNMISMATCH = 0x17, /* linked CCB has different LUN from [all …]
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/linux/drivers/net/fddi/skfp/h/ |
H A D | smt_p.h | 19 #define SMT_P0012 0x0012 21 #define SMT_P0015 0x0015 22 #define SMT_P0016 0x0016 23 #define SMT_P0017 0x0017 24 #define SMT_P0018 0x0018 25 #define SMT_P0019 0x0019 27 #define SMT_P001A 0x001a 28 #define SMT_P001B 0x001b 29 #define SMT_P001C 0x001c 30 #define SMT_P001D 0x001d [all …]
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/linux/include/video/ |
H A D | permedia2.h | 17 #define PM2_REGS_SIZE 0x10000 19 #define PM2TAG(r) (u32 )(((r)-0x8000)>>3) 25 #define PM2R_RESET_STATUS 0x0000 26 #define PM2R_IN_FIFO_SPACE 0x0018 27 #define PM2R_OUT_FIFO_WORDS 0x0020 28 #define PM2R_APERTURE_ONE 0x0050 29 #define PM2R_APERTURE_TWO 0x0058 30 #define PM2R_FIFO_DISCON 0x0068 31 #define PM2R_CHIP_CONFIG 0x0070 33 #define PM2R_REBOOT 0x1000 [all …]
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/linux/tools/include/perf/ |
H A D | arm_pmuv3.h | 18 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000 19 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001 20 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002 21 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003 22 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004 23 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005 24 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006 25 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007 26 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008 27 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009 [all …]
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/linux/include/linux/perf/ |
H A D | arm_pmuv3.h | 16 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000 17 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001 18 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002 19 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003 20 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004 21 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005 22 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006 23 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007 24 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008 25 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009 [all …]
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/linux/drivers/gpu/drm/radeon/ |
H A D | r520.c | 41 for (i = 0; i < rdev->usec_timeout; i++) { in r520_mc_wait_for_idle() 45 return 0; in r520_mc_wait_for_idle() 58 * DST_PIPE_CONFIG 0x170C in r520_gpu_init() 59 * GB_TILE_CONFIG 0x4018 in r520_gpu_init() 60 * GB_FIFO_SIZE 0x4024 in r520_gpu_init() 61 * GB_PIPE_SELECT 0x402C in r520_gpu_init() 62 * GB_PIPE_SELECT2 0x4124 in r520_gpu_init() 63 * Z_PIPE_SHIFT 0 in r520_gpu_init() 64 * Z_PIPE_MASK 0x000000003 in r520_gpu_init() 65 * GB_FIFO_SIZE2 0x4128 in r520_gpu_init() [all …]
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H A D | r500_reg.h | 32 #define R300_GA_POLY_MODE 0x4288 33 # define R300_FRONT_PTYPE_POINT (0 << 4) 36 # define R300_BACK_PTYPE_POINT (0 << 7) 39 #define R300_GA_ROUND_MODE 0x428c 40 # define R300_GEOMETRY_ROUND_TRUNC (0 << 0) 41 # define R300_GEOMETRY_ROUND_NEAREST (1 << 0) 42 # define R300_COLOR_ROUND_TRUNC (0 << 2) 44 #define R300_GB_MSPOS0 0x4010 45 # define R300_MS_X0_SHIFT 0 53 #define R300_GB_MSPOS1 0x4014 [all …]
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H A D | rv515d.h | 34 #define PCIE_INDEX 0x0030 35 #define PCIE_DATA 0x0034 36 #define MC_IND_INDEX 0x0070 38 #define MC_IND_DATA 0x0074 39 #define RBBM_SOFT_RESET 0x00F0 40 #define CONFIG_MEMSIZE 0x00F8 41 #define HDP_FB_LOCATION 0x0134 42 #define CP_CSQ_CNTL 0x0740 43 #define CP_CSQ_MODE 0x0744 44 #define CP_CSQ_ADDR 0x07F0 [all …]
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/linux/Documentation/scsi/ |
H A D | hptiop.rst | 16 0x11C5C Link Interface IRQ Set 17 0x11C60 Link Interface IRQ Clear 23 0x10 Inbound Message Register 0 24 0x14 Inbound Message Register 1 25 0x18 Outbound Message Register 0 26 0x1C Outbound Message Register 1 27 0x20 Inbound Doorbell Register 28 0x24 Inbound Interrupt Status Register 29 0x28 Inbound Interrupt Mask Register 30 0x30 Outbound Interrupt Status Register [all …]
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/linux/include/linux/mfd/wm831x/ |
H A D | core.h | 25 #define WM831X_RESET_ID 0x00 26 #define WM831X_REVISION 0x01 27 #define WM831X_PARENT_ID 0x4000 28 #define WM831X_SYSVDD_CONTROL 0x4001 29 #define WM831X_THERMAL_MONITORING 0x4002 30 #define WM831X_POWER_STATE 0x4003 31 #define WM831X_WATCHDOG 0x4004 32 #define WM831X_ON_PIN_CONTROL 0x4005 33 #define WM831X_RESET_CONTROL 0x4006 34 #define WM831X_CONTROL_INTERFACE 0x4007 [all …]
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H A D | irq.h | 14 #define WM831X_IRQ_TEMP_THW 0 75 * R16400 (0x4010) - System Interrupts 77 #define WM831X_PS_INT 0x8000 /* PS_INT */ 78 #define WM831X_PS_INT_MASK 0x8000 /* PS_INT */ 81 #define WM831X_TEMP_INT 0x4000 /* TEMP_INT */ 82 #define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */ 85 #define WM831X_GP_INT 0x2000 /* GP_INT */ 86 #define WM831X_GP_INT_MASK 0x2000 /* GP_INT */ 89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */ 90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */ [all …]
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/linux/drivers/net/ethernet/agere/ |
H A D | et131x.h | 53 #define LBCIF_DWORD0_GROUP 0xAC 54 #define LBCIF_DWORD1_GROUP 0xB0 57 #define LBCIF_ADDRESS_REGISTER 0xAC 58 #define LBCIF_DATA_REGISTER 0xB0 59 #define LBCIF_CONTROL_REGISTER 0xB1 60 #define LBCIF_STATUS_REGISTER 0xB2 63 #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 64 #define LBCIF_CONTROL_PAGE_WRITE 0x02 65 #define LBCIF_CONTROL_EEPROM_RELOAD 0x08 66 #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 [all …]
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/linux/drivers/net/wireless/ath/ath9k/ |
H A D | reg.h | 22 #define AR_CR 0x0008 23 #define AR_CR_RXE(_ah) (AR_SREV_9300_20_OR_LATER(_ah) ? 0x0000000c : 0x00000004) 24 #define AR_CR_RXD 0x00000020 25 #define AR_CR_SWI 0x00000040 27 #define AR_RXDP 0x000C 29 #define AR_CFG 0x0014 30 #define AR_CFG_SWTD 0x00000001 31 #define AR_CFG_SWTB 0x00000002 32 #define AR_CFG_SWRD 0x00000004 33 #define AR_CFG_SWRB 0x00000008 [all …]
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/linux/arch/powerpc/include/asm/ |
H A D | spu.h | 23 #define MFC_PUT_CMD 0x20 24 #define MFC_PUTS_CMD 0x28 25 #define MFC_PUTR_CMD 0x30 26 #define MFC_PUTF_CMD 0x22 27 #define MFC_PUTB_CMD 0x21 28 #define MFC_PUTFS_CMD 0x2A 29 #define MFC_PUTBS_CMD 0x29 30 #define MFC_PUTRF_CMD 0x32 31 #define MFC_PUTRB_CMD 0x31 32 #define MFC_PUTL_CMD 0x24 [all …]
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/linux/tools/perf/pmu-events/arch/arm64/ |
H A D | common-and-microarch.json | 4 "EventCode": "0x00", 10 "EventCode": "0x01", 16 "EventCode": "0x02", 22 "EventCode": "0x03", 28 "EventCode": "0x04", 34 "EventCode": "0x05", 40 "EventCode": "0x06", 46 "EventCode": "0x07", 52 "EventCode": "0x08", 58 "EventCode": "0x09", [all …]
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/linux/drivers/net/ethernet/hisilicon/hns/ |
H A D | hns_dsaf_reg.h | 10 #define HNS_DEBUG_RING_IRQ_IDX 0 46 #define DSAF_SUB_SC_NT_SRAM_CLK_SEL_REG 0x100 47 #define DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG 0x180 48 #define DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG 0x184 49 #define DSAF_SUB_SC_HILINK3_CRG_CTRL2_REG 0x188 50 #define DSAF_SUB_SC_HILINK3_CRG_CTRL3_REG 0x18C 51 #define DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG 0x190 52 #define DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG 0x194 53 #define DSAF_SUB_SC_DSAF_CLK_EN_REG 0x300 54 #define DSAF_SUB_SC_DSAF_CLK_DIS_REG 0x304 [all …]
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/linux/drivers/hid/ |
H A D | hid-ids.h | 17 #define USB_VENDOR_ID_258A 0x258a 18 #define USB_DEVICE_ID_258A_6A88 0x6a88 20 #define USB_VENDOR_ID_3M 0x0596 21 #define USB_DEVICE_ID_3M1968 0x0500 22 #define USB_DEVICE_ID_3M2256 0x0502 23 #define USB_DEVICE_ID_3M3266 0x0506 25 #define USB_VENDOR_ID_A4TECH 0x09da 26 #define USB_DEVICE_ID_A4TECH_WCP32PU 0x0006 27 #define USB_DEVICE_ID_A4TECH_X5_005D 0x000a 28 #define USB_DEVICE_ID_A4TECH_RP_649 0x001a [all …]
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/linux/drivers/net/ethernet/renesas/ |
H A D | rswitch.h | 17 for (i = 0; i < RSWITCH_NUM_PORTS; i++) \ 23 for (; i-- > 0; ) \ 44 #define RSWITCH_TOP_OFFSET 0x00008000 45 #define RSWITCH_COMA_OFFSET 0x00009000 46 #define RSWITCH_ETHA_OFFSET 0x0000a000 /* with RMAC */ 47 #define RSWITCH_ETHA_SIZE 0x00002000 /* with RMAC */ 48 #define RSWITCH_GWCA0_OFFSET 0x00010000 49 #define RSWITCH_GWCA1_OFFSET 0x00012000 55 #define GWCA_INDEX 0 57 #define GWCA_IPV_NUM 0 [all …]
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