Lines Matching +full:0 +full:x4018
19 #define CX2072X_REG_MAX 0x8a3c
21 #define CX2072X_VENDOR_ID 0x0200
22 #define CX2072X_REVISION_ID 0x0208
23 #define CX2072X_CURRENT_BCLK_FREQUENCY 0x00dc
24 #define CX2072X_AFG_POWER_STATE 0x0414
25 #define CX2072X_UM_RESPONSE 0x0420
26 #define CX2072X_GPIO_DATA 0x0454
27 #define CX2072X_GPIO_ENABLE 0x0458
28 #define CX2072X_GPIO_DIRECTION 0x045c
29 #define CX2072X_GPIO_WAKE 0x0460
30 #define CX2072X_GPIO_UM_ENABLE 0x0464
31 #define CX2072X_GPIO_STICKY_MASK 0x0468
32 #define CX2072X_AFG_FUNCTION_RESET 0x07fc
33 #define CX2072X_DAC1_CONVERTER_FORMAT 0x43c8
34 #define CX2072X_DAC1_AMP_GAIN_RIGHT 0x41c0
35 #define CX2072X_DAC1_AMP_GAIN_LEFT 0x41e0
36 #define CX2072X_DAC1_POWER_STATE 0x4014
37 #define CX2072X_DAC1_CONVERTER_STREAM_CHANNEL 0x4018
38 #define CX2072X_DAC1_EAPD_ENABLE 0x4030
39 #define CX2072X_DAC2_CONVERTER_FORMAT 0x47c8
40 #define CX2072X_DAC2_AMP_GAIN_RIGHT 0x45c0
41 #define CX2072X_DAC2_AMP_GAIN_LEFT 0x45e0
42 #define CX2072X_DAC2_POWER_STATE 0x4414
43 #define CX2072X_DAC2_CONVERTER_STREAM_CHANNEL 0x4418
44 #define CX2072X_ADC1_CONVERTER_FORMAT 0x4fc8
45 #define CX2072X_ADC1_AMP_GAIN_RIGHT_0 0x4d80
46 #define CX2072X_ADC1_AMP_GAIN_LEFT_0 0x4da0
47 #define CX2072X_ADC1_AMP_GAIN_RIGHT_1 0x4d84
48 #define CX2072X_ADC1_AMP_GAIN_LEFT_1 0x4da4
49 #define CX2072X_ADC1_AMP_GAIN_RIGHT_2 0x4d88
50 #define CX2072X_ADC1_AMP_GAIN_LEFT_2 0x4da8
51 #define CX2072X_ADC1_AMP_GAIN_RIGHT_3 0x4d8c
52 #define CX2072X_ADC1_AMP_GAIN_LEFT_3 0x4dac
53 #define CX2072X_ADC1_AMP_GAIN_RIGHT_4 0x4d90
54 #define CX2072X_ADC1_AMP_GAIN_LEFT_4 0x4db0
55 #define CX2072X_ADC1_AMP_GAIN_RIGHT_5 0x4d94
56 #define CX2072X_ADC1_AMP_GAIN_LEFT_5 0x4db4
57 #define CX2072X_ADC1_AMP_GAIN_RIGHT_6 0x4d98
58 #define CX2072X_ADC1_AMP_GAIN_LEFT_6 0x4db8
59 #define CX2072X_ADC1_CONNECTION_SELECT_CONTROL 0x4c04
60 #define CX2072X_ADC1_POWER_STATE 0x4c14
61 #define CX2072X_ADC1_CONVERTER_STREAM_CHANNEL 0x4c18
62 #define CX2072X_ADC2_CONVERTER_FORMAT 0x53c8
63 #define CX2072X_ADC2_AMP_GAIN_RIGHT_0 0x5180
64 #define CX2072X_ADC2_AMP_GAIN_LEFT_0 0x51a0
65 #define CX2072X_ADC2_AMP_GAIN_RIGHT_1 0x5184
66 #define CX2072X_ADC2_AMP_GAIN_LEFT_1 0x51a4
67 #define CX2072X_ADC2_AMP_GAIN_RIGHT_2 0x5188
68 #define CX2072X_ADC2_AMP_GAIN_LEFT_2 0x51a8
69 #define CX2072X_ADC2_CONNECTION_SELECT_CONTROL 0x5004
70 #define CX2072X_ADC2_POWER_STATE 0x5014
71 #define CX2072X_ADC2_CONVERTER_STREAM_CHANNEL 0x5018
72 #define CX2072X_PORTA_CONNECTION_SELECT_CTRL 0x5804
73 #define CX2072X_PORTA_POWER_STATE 0x5814
74 #define CX2072X_PORTA_PIN_CTRL 0x581c
75 #define CX2072X_PORTA_UNSOLICITED_RESPONSE 0x5820
76 #define CX2072X_PORTA_PIN_SENSE 0x5824
77 #define CX2072X_PORTA_EAPD_BTL 0x5830
78 #define CX2072X_PORTB_POWER_STATE 0x6014
79 #define CX2072X_PORTB_PIN_CTRL 0x601c
80 #define CX2072X_PORTB_UNSOLICITED_RESPONSE 0x6020
81 #define CX2072X_PORTB_PIN_SENSE 0x6024
82 #define CX2072X_PORTB_EAPD_BTL 0x6030
83 #define CX2072X_PORTB_GAIN_RIGHT 0x6180
84 #define CX2072X_PORTB_GAIN_LEFT 0x61a0
85 #define CX2072X_PORTC_POWER_STATE 0x6814
86 #define CX2072X_PORTC_PIN_CTRL 0x681c
87 #define CX2072X_PORTC_GAIN_RIGHT 0x6980
88 #define CX2072X_PORTC_GAIN_LEFT 0x69a0
89 #define CX2072X_PORTD_POWER_STATE 0x6414
90 #define CX2072X_PORTD_PIN_CTRL 0x641c
91 #define CX2072X_PORTD_UNSOLICITED_RESPONSE 0x6420
92 #define CX2072X_PORTD_PIN_SENSE 0x6424
93 #define CX2072X_PORTD_GAIN_RIGHT 0x6580
94 #define CX2072X_PORTD_GAIN_LEFT 0x65a0
95 #define CX2072X_PORTE_CONNECTION_SELECT_CTRL 0x7404
96 #define CX2072X_PORTE_POWER_STATE 0x7414
97 #define CX2072X_PORTE_PIN_CTRL 0x741c
98 #define CX2072X_PORTE_UNSOLICITED_RESPONSE 0x7420
99 #define CX2072X_PORTE_PIN_SENSE 0x7424
100 #define CX2072X_PORTE_EAPD_BTL 0x7430
101 #define CX2072X_PORTE_GAIN_RIGHT 0x7580
102 #define CX2072X_PORTE_GAIN_LEFT 0x75a0
103 #define CX2072X_PORTF_POWER_STATE 0x7814
104 #define CX2072X_PORTF_PIN_CTRL 0x781c
105 #define CX2072X_PORTF_UNSOLICITED_RESPONSE 0x7820
106 #define CX2072X_PORTF_PIN_SENSE 0x7824
107 #define CX2072X_PORTF_GAIN_RIGHT 0x7980
108 #define CX2072X_PORTF_GAIN_LEFT 0x79a0
109 #define CX2072X_PORTG_POWER_STATE 0x5c14
110 #define CX2072X_PORTG_PIN_CTRL 0x5c1c
111 #define CX2072X_PORTG_CONNECTION_SELECT_CTRL 0x5c04
112 #define CX2072X_PORTG_EAPD_BTL 0x5c30
113 #define CX2072X_PORTM_POWER_STATE 0x8814
114 #define CX2072X_PORTM_PIN_CTRL 0x881c
115 #define CX2072X_PORTM_CONNECTION_SELECT_CTRL 0x8804
116 #define CX2072X_PORTM_EAPD_BTL 0x8830
117 #define CX2072X_MIXER_POWER_STATE 0x5414
118 #define CX2072X_MIXER_GAIN_RIGHT_0 0x5580
119 #define CX2072X_MIXER_GAIN_LEFT_0 0x55a0
120 #define CX2072X_MIXER_GAIN_RIGHT_1 0x5584
121 #define CX2072X_MIXER_GAIN_LEFT_1 0x55a4
122 #define CX2072X_EQ_ENABLE_BYPASS 0x6d00
123 #define CX2072X_EQ_B0_COEFF 0x6d02
124 #define CX2072X_EQ_B1_COEFF 0x6d04
125 #define CX2072X_EQ_B2_COEFF 0x6d06
126 #define CX2072X_EQ_A1_COEFF 0x6d08
127 #define CX2072X_EQ_A2_COEFF 0x6d0a
128 #define CX2072X_EQ_G_COEFF 0x6d0c
129 #define CX2072X_EQ_BAND 0x6d0d
130 #define CX2072X_SPKR_DRC_ENABLE_STEP 0x6d10
131 #define CX2072X_SPKR_DRC_CONTROL 0x6d14
132 #define CX2072X_SPKR_DRC_TEST 0x6d18
133 #define CX2072X_DIGITAL_BIOS_TEST0 0x6d80
134 #define CX2072X_DIGITAL_BIOS_TEST2 0x6d84
135 #define CX2072X_I2SPCM_CONTROL1 0x6e00
136 #define CX2072X_I2SPCM_CONTROL2 0x6e04
137 #define CX2072X_I2SPCM_CONTROL3 0x6e08
138 #define CX2072X_I2SPCM_CONTROL4 0x6e0c
139 #define CX2072X_I2SPCM_CONTROL5 0x6e10
140 #define CX2072X_I2SPCM_CONTROL6 0x6e18
141 #define CX2072X_UM_INTERRUPT_CRTL_E 0x6e14
142 #define CX2072X_CODEC_TEST2 0x7108
143 #define CX2072X_CODEC_TEST9 0x7124
144 #define CX2072X_CODEC_TESTXX 0x7290
145 #define CX2072X_CODEC_TEST20 0x7310
146 #define CX2072X_CODEC_TEST24 0x731c
147 #define CX2072X_CODEC_TEST26 0x7328
148 #define CX2072X_ANALOG_TEST3 0x718c
149 #define CX2072X_ANALOG_TEST4 0x7190
150 #define CX2072X_ANALOG_TEST5 0x7194
151 #define CX2072X_ANALOG_TEST6 0x7198
152 #define CX2072X_ANALOG_TEST7 0x719c
153 #define CX2072X_ANALOG_TEST8 0x71a0
154 #define CX2072X_ANALOG_TEST9 0x71a4
155 #define CX2072X_ANALOG_TEST10 0x71a8
156 #define CX2072X_ANALOG_TEST11 0x71ac
157 #define CX2072X_ANALOG_TEST12 0x71b0
158 #define CX2072X_ANALOG_TEST13 0x71b4
159 #define CX2072X_DIGITAL_TEST0 0x7200
160 #define CX2072X_DIGITAL_TEST1 0x7204
161 #define CX2072X_DIGITAL_TEST11 0x722c
162 #define CX2072X_DIGITAL_TEST12 0x7230
163 #define CX2072X_DIGITAL_TEST15 0x723c
164 #define CX2072X_DIGITAL_TEST16 0x7080
165 #define CX2072X_DIGITAL_TEST17 0x7084
166 #define CX2072X_DIGITAL_TEST18 0x7088
167 #define CX2072X_DIGITAL_TEST19 0x708c
168 #define CX2072X_DIGITAL_TEST20 0x7090
186 CX2072X_SAMPLE_SIZE_8_BITS = 0,