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Searched +full:0 +full:x401000 (Results 1 – 9 of 9) sorted by relevance

/freebsd/stand/kboot/kboot/arch/amd64/
H A Damd64.ldscript7 . = 0x401000;
21 } =0xCCCCCCCC
/freebsd/stand/kboot/kboot/arch/aarch64/
H A Daarch64.ldscript7 . = 0x401000;
21 } =0xCCCCCCCC
/freebsd/sys/contrib/dev/iwlwifi/cfg/
H A Dsc.c19 #define IWL_SC_NVM_VERSION 0x0a1d
22 #define IWL_SC_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_SC_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_SC_DCCM2_OFFSET 0x880000
25 #define IWL_SC_DCCM2_LEN 0x8000
26 #define IWL_SC_SMEM_OFFSET 0x400000
27 #define IWL_SC_SMEM_LEN 0xD0000
91 .mac_addr_from_csr = 0x30, \
97 .min_umac_error_event_table = 0xD0000, \
98 .d3_debug_data_base_addr = 0x40100
[all...]
H A Dbz.c19 #define IWL_BZ_NVM_VERSION 0x0a1d
22 #define IWL_BZ_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_BZ_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_BZ_DCCM2_OFFSET 0x880000
25 #define IWL_BZ_DCCM2_LEN 0x8000
26 #define IWL_BZ_SMEM_OFFSET 0x400000
27 #define IWL_BZ_SMEM_LEN 0xD0000
82 .mac_addr_from_csr = 0x30, \
88 .min_umac_error_event_table = 0xD0000, \
89 .d3_debug_data_base_addr = 0x40100
[all...]
H A D9000.c19 #define IWL9000_NVM_VERSION 0x0a1d
22 #define IWL9000_DCCM_OFFSET 0x800000
23 #define IWL9000_DCCM_LEN 0x18000
24 #define IWL9000_DCCM2_OFFSET 0x880000
25 #define IWL9000_DCCM2_LEN 0x8000
26 #define IWL9000_SMEM_OFFSET 0x400000
27 #define IWL9000_SMEM_LEN 0x68000
92 .mac_addr_from_csr = 0x380, \
95 .min_umac_error_event_table = 0x800000, \
96 .d3_debug_data_base_addr = 0x401000, \
[all …]
H A Dax210.c19 #define IWL_AX210_NVM_VERSION 0x0a1d
22 #define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_AX210_DCCM2_OFFSET 0x880000
25 #define IWL_AX210_DCCM2_LEN 0x8000
26 #define IWL_AX210_SMEM_OFFSET 0x400000
27 #define IWL_AX210_SMEM_LEN 0xD0000
96 .mac_addr_from_csr = 0x380, \
103 .min_umac_error_event_table = 0x400000, \
104 .d3_debug_data_base_addr = 0x40100
[all...]
H A D22000.c19 #define IWL_22000_NVM_VERSION 0x0a1d
22 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_22000_DCCM2_OFFSET 0x880000
25 #define IWL_22000_DCCM2_LEN 0x8000
26 #define IWL_22000_SMEM_OFFSET 0x400000
27 #define IWL_22000_SMEM_LEN 0xD0000
84 .mac_addr_from_csr = 0x380, \
91 .min_umac_error_event_table = 0x400000, \
92 .d3_debug_data_base_addr = 0x40100
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrochip,sparx5-switch.yaml34 pattern: "^switch@[0-9a-f]+$"
83 const: 0
86 "^port@[0-9a-f]+$":
111 minimum: 0
142 reg = <0 0x401000>,
143 <0x10004000 0x7fc000>,
144 <0x11010000 0xaf0000>;
148 resets = <&reset 0>;
152 #size-cells = <0>;
154 port0: port@0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5.dtsi28 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0x0>;
49 reg = <0x1>;
81 #clock-cells = <0>;
89 reg = <0x6 0x1110000c 0x24>;
94 #clock-cells = <0>;
100 #clock-cells = <0>;
[all...]