19af1bba4SBjoern A. Zeeb // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 29af1bba4SBjoern A. Zeeb /* 39af1bba4SBjoern A. Zeeb * Copyright (C) 2015-2017 Intel Deutschland GmbH 4*a4128aadSBjoern A. Zeeb * Copyright (C) 2018-2024 Intel Corporation 59af1bba4SBjoern A. Zeeb */ 69af1bba4SBjoern A. Zeeb #include <linux/module.h> 79af1bba4SBjoern A. Zeeb #include <linux/stringify.h> 89af1bba4SBjoern A. Zeeb #include "iwl-config.h" 99af1bba4SBjoern A. Zeeb #include "iwl-prph.h" 109af1bba4SBjoern A. Zeeb #include "fw/api/txq.h" 119af1bba4SBjoern A. Zeeb 129af1bba4SBjoern A. Zeeb /* Highest firmware API version supported */ 13*a4128aadSBjoern A. Zeeb #define IWL_BZ_UCODE_API_MAX 92 149af1bba4SBjoern A. Zeeb 159af1bba4SBjoern A. Zeeb /* Lowest firmware API version supported */ 16*a4128aadSBjoern A. Zeeb #define IWL_BZ_UCODE_API_MIN 90 179af1bba4SBjoern A. Zeeb 189af1bba4SBjoern A. Zeeb /* NVM versions */ 199af1bba4SBjoern A. Zeeb #define IWL_BZ_NVM_VERSION 0x0a1d 209af1bba4SBjoern A. Zeeb 219af1bba4SBjoern A. Zeeb /* Memory offsets and lengths */ 229af1bba4SBjoern A. Zeeb #define IWL_BZ_DCCM_OFFSET 0x800000 /* LMAC1 */ 239af1bba4SBjoern A. Zeeb #define IWL_BZ_DCCM_LEN 0x10000 /* LMAC1 */ 249af1bba4SBjoern A. Zeeb #define IWL_BZ_DCCM2_OFFSET 0x880000 259af1bba4SBjoern A. Zeeb #define IWL_BZ_DCCM2_LEN 0x8000 269af1bba4SBjoern A. Zeeb #define IWL_BZ_SMEM_OFFSET 0x400000 279af1bba4SBjoern A. Zeeb #define IWL_BZ_SMEM_LEN 0xD0000 289af1bba4SBjoern A. Zeeb 299af1bba4SBjoern A. Zeeb #define IWL_BZ_A_HR_B_FW_PRE "iwlwifi-bz-a0-hr-b0" 309af1bba4SBjoern A. Zeeb #define IWL_BZ_A_GF_A_FW_PRE "iwlwifi-bz-a0-gf-a0" 319af1bba4SBjoern A. Zeeb #define IWL_BZ_A_GF4_A_FW_PRE "iwlwifi-bz-a0-gf4-a0" 329af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM_B_FW_PRE "iwlwifi-bz-a0-fm-b0" 339af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM_C_FW_PRE "iwlwifi-bz-a0-fm-c0" 349af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM4_B_FW_PRE "iwlwifi-bz-a0-fm4-b0" 359af1bba4SBjoern A. Zeeb #define IWL_GL_B_FM_B_FW_PRE "iwlwifi-gl-b0-fm-b0" 369af1bba4SBjoern A. Zeeb #define IWL_GL_C_FM_C_FW_PRE "iwlwifi-gl-c0-fm-c0" 379af1bba4SBjoern A. Zeeb 389af1bba4SBjoern A. Zeeb #define IWL_BZ_A_HR_B_MODULE_FIRMWARE(api) \ 399af1bba4SBjoern A. Zeeb IWL_BZ_A_HR_B_FW_PRE "-" __stringify(api) ".ucode" 409af1bba4SBjoern A. Zeeb #define IWL_BZ_A_GF_A_MODULE_FIRMWARE(api) \ 419af1bba4SBjoern A. Zeeb IWL_BZ_A_GF_A_FW_PRE "-" __stringify(api) ".ucode" 429af1bba4SBjoern A. Zeeb #define IWL_BZ_A_GF4_A_MODULE_FIRMWARE(api) \ 439af1bba4SBjoern A. Zeeb IWL_BZ_A_GF4_A_FW_PRE "-" __stringify(api) ".ucode" 449af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM_B_MODULE_FIRMWARE(api) \ 459af1bba4SBjoern A. Zeeb IWL_BZ_A_FM_B_FW_PRE "-" __stringify(api) ".ucode" 469af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM_C_MODULE_FIRMWARE(api) \ 479af1bba4SBjoern A. Zeeb IWL_BZ_A_FM_C_FW_PRE "-" __stringify(api) ".ucode" 489af1bba4SBjoern A. Zeeb #define IWL_BZ_A_FM4_B_MODULE_FIRMWARE(api) \ 499af1bba4SBjoern A. Zeeb IWL_BZ_A_FM4_B_FW_PRE "-" __stringify(api) ".ucode" 509af1bba4SBjoern A. Zeeb #define IWL_GL_B_FM_B_MODULE_FIRMWARE(api) \ 519af1bba4SBjoern A. Zeeb IWL_GL_B_FM_B_FW_PRE "-" __stringify(api) ".ucode" 529af1bba4SBjoern A. Zeeb #define IWL_GL_C_FM_C_MODULE_FIRMWARE(api) \ 539af1bba4SBjoern A. Zeeb IWL_GL_C_FM_C_FW_PRE "-" __stringify(api) ".ucode" 549af1bba4SBjoern A. Zeeb 559af1bba4SBjoern A. Zeeb static const struct iwl_base_params iwl_bz_base_params = { 569af1bba4SBjoern A. Zeeb .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 579af1bba4SBjoern A. Zeeb .num_of_queues = 512, 589af1bba4SBjoern A. Zeeb .max_tfd_queue_size = 65536, 599af1bba4SBjoern A. Zeeb .shadow_ram_support = true, 609af1bba4SBjoern A. Zeeb .led_compensation = 57, 619af1bba4SBjoern A. Zeeb .wd_timeout = IWL_LONG_WD_TIMEOUT, 629af1bba4SBjoern A. Zeeb .max_event_log_size = 512, 639af1bba4SBjoern A. Zeeb .shadow_reg_enable = true, 649af1bba4SBjoern A. Zeeb .pcie_l1_allowed = true, 659af1bba4SBjoern A. Zeeb }; 669af1bba4SBjoern A. Zeeb 679af1bba4SBjoern A. Zeeb #define IWL_DEVICE_BZ_COMMON \ 689af1bba4SBjoern A. Zeeb .ucode_api_max = IWL_BZ_UCODE_API_MAX, \ 699af1bba4SBjoern A. Zeeb .ucode_api_min = IWL_BZ_UCODE_API_MIN, \ 709af1bba4SBjoern A. Zeeb .led_mode = IWL_LED_RF_STATE, \ 719af1bba4SBjoern A. Zeeb .nvm_hw_section_num = 10, \ 729af1bba4SBjoern A. Zeeb .non_shared_ant = ANT_B, \ 739af1bba4SBjoern A. Zeeb .dccm_offset = IWL_BZ_DCCM_OFFSET, \ 749af1bba4SBjoern A. Zeeb .dccm_len = IWL_BZ_DCCM_LEN, \ 759af1bba4SBjoern A. Zeeb .dccm2_offset = IWL_BZ_DCCM2_OFFSET, \ 769af1bba4SBjoern A. Zeeb .dccm2_len = IWL_BZ_DCCM2_LEN, \ 779af1bba4SBjoern A. Zeeb .smem_offset = IWL_BZ_SMEM_OFFSET, \ 789af1bba4SBjoern A. Zeeb .smem_len = IWL_BZ_SMEM_LEN, \ 799af1bba4SBjoern A. Zeeb .apmg_not_supported = true, \ 809af1bba4SBjoern A. Zeeb .trans.mq_rx_supported = true, \ 819af1bba4SBjoern A. Zeeb .vht_mu_mimo_supported = true, \ 829af1bba4SBjoern A. Zeeb .mac_addr_from_csr = 0x30, \ 839af1bba4SBjoern A. Zeeb .nvm_ver = IWL_BZ_NVM_VERSION, \ 849af1bba4SBjoern A. Zeeb .trans.rf_id = true, \ 859af1bba4SBjoern A. Zeeb .trans.gen2 = true, \ 869af1bba4SBjoern A. Zeeb .nvm_type = IWL_NVM_EXT, \ 879af1bba4SBjoern A. Zeeb .dbgc_supported = true, \ 889af1bba4SBjoern A. Zeeb .min_umac_error_event_table = 0xD0000, \ 899af1bba4SBjoern A. Zeeb .d3_debug_data_base_addr = 0x401000, \ 909af1bba4SBjoern A. Zeeb .d3_debug_data_length = 60 * 1024, \ 919af1bba4SBjoern A. Zeeb .mon_smem_regs = { \ 929af1bba4SBjoern A. Zeeb .write_ptr = { \ 939af1bba4SBjoern A. Zeeb .addr = LDBG_M2S_BUF_WPTR, \ 949af1bba4SBjoern A. Zeeb .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 959af1bba4SBjoern A. Zeeb }, \ 969af1bba4SBjoern A. Zeeb .cycle_cnt = { \ 979af1bba4SBjoern A. Zeeb .addr = LDBG_M2S_BUF_WRAP_CNT, \ 989af1bba4SBjoern A. Zeeb .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 999af1bba4SBjoern A. Zeeb }, \ 1009af1bba4SBjoern A. Zeeb }, \ 1019af1bba4SBjoern A. Zeeb .trans.umac_prph_offset = 0x300000, \ 1029af1bba4SBjoern A. Zeeb .trans.device_family = IWL_DEVICE_FAMILY_BZ, \ 1039af1bba4SBjoern A. Zeeb .trans.base_params = &iwl_bz_base_params, \ 1049af1bba4SBjoern A. Zeeb .min_txq_size = 128, \ 1059af1bba4SBjoern A. Zeeb .gp2_reg_addr = 0xd02c68, \ 1069af1bba4SBjoern A. Zeeb .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_EHT, \ 1079af1bba4SBjoern A. Zeeb .mon_dram_regs = { \ 1089af1bba4SBjoern A. Zeeb .write_ptr = { \ 1099af1bba4SBjoern A. Zeeb .addr = DBGC_CUR_DBGBUF_STATUS, \ 1109af1bba4SBjoern A. Zeeb .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 1119af1bba4SBjoern A. Zeeb }, \ 1129af1bba4SBjoern A. Zeeb .cycle_cnt = { \ 1139af1bba4SBjoern A. Zeeb .addr = DBGC_DBGBUF_WRAP_AROUND, \ 1149af1bba4SBjoern A. Zeeb .mask = 0xffffffff, \ 1159af1bba4SBjoern A. Zeeb }, \ 1169af1bba4SBjoern A. Zeeb .cur_frag = { \ 1179af1bba4SBjoern A. Zeeb .addr = DBGC_CUR_DBGBUF_STATUS, \ 1189af1bba4SBjoern A. Zeeb .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 1199af1bba4SBjoern A. Zeeb }, \ 1209af1bba4SBjoern A. Zeeb }, \ 1219af1bba4SBjoern A. Zeeb .mon_dbgi_regs = { \ 1229af1bba4SBjoern A. Zeeb .write_ptr = { \ 1239af1bba4SBjoern A. Zeeb .addr = DBGI_SRAM_FIFO_POINTERS, \ 1249af1bba4SBjoern A. Zeeb .mask = DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK, \ 1259af1bba4SBjoern A. Zeeb }, \ 1269af1bba4SBjoern A. Zeeb } 1279af1bba4SBjoern A. Zeeb 1289af1bba4SBjoern A. Zeeb #define IWL_DEVICE_BZ \ 1299af1bba4SBjoern A. Zeeb IWL_DEVICE_BZ_COMMON, \ 1309af1bba4SBjoern A. Zeeb .ht_params = &iwl_22000_ht_params 1319af1bba4SBjoern A. Zeeb 1329af1bba4SBjoern A. Zeeb /* 133*a4128aadSBjoern A. Zeeb * This size was picked according to 8 MSDUs inside 512 A-MSDUs in an 1349af1bba4SBjoern A. Zeeb * A-MPDU, with additional overhead to account for processing time. 1359af1bba4SBjoern A. Zeeb */ 136*a4128aadSBjoern A. Zeeb #define IWL_NUM_RBDS_BZ_EHT (512 * 16) 1379af1bba4SBjoern A. Zeeb 1389af1bba4SBjoern A. Zeeb const struct iwl_cfg_trans_params iwl_bz_trans_cfg = { 1399af1bba4SBjoern A. Zeeb .device_family = IWL_DEVICE_FAMILY_BZ, 1409af1bba4SBjoern A. Zeeb .base_params = &iwl_bz_base_params, 1419af1bba4SBjoern A. Zeeb .mq_rx_supported = true, 1429af1bba4SBjoern A. Zeeb .rf_id = true, 1439af1bba4SBjoern A. Zeeb .gen2 = true, 1449af1bba4SBjoern A. Zeeb .integrated = true, 1459af1bba4SBjoern A. Zeeb .umac_prph_offset = 0x300000, 1469af1bba4SBjoern A. Zeeb .xtal_latency = 12000, 1479af1bba4SBjoern A. Zeeb .low_latency_xtal = true, 1489af1bba4SBjoern A. Zeeb .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 1499af1bba4SBjoern A. Zeeb }; 1509af1bba4SBjoern A. Zeeb 1519af1bba4SBjoern A. Zeeb const char iwl_bz_name[] = "Intel(R) TBD Bz device"; 152*a4128aadSBjoern A. Zeeb const char iwl_fm_name[] = "Intel(R) Wi-Fi 7 BE201 320MHz"; 153*a4128aadSBjoern A. Zeeb const char iwl_gl_name[] = "Intel(R) Wi-Fi 7 BE200 320MHz"; 154*a4128aadSBjoern A. Zeeb const char iwl_mtp_name[] = "Intel(R) Wi-Fi 7 BE202 160MHz"; 1559af1bba4SBjoern A. Zeeb 1569af1bba4SBjoern A. Zeeb const struct iwl_cfg iwl_cfg_bz = { 1579af1bba4SBjoern A. Zeeb .fw_name_mac = "bz", 1589af1bba4SBjoern A. Zeeb .uhb_supported = true, 1599af1bba4SBjoern A. Zeeb IWL_DEVICE_BZ, 160*a4128aadSBjoern A. Zeeb .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, 161*a4128aadSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_BZ_EHT, 1629af1bba4SBjoern A. Zeeb }; 1639af1bba4SBjoern A. Zeeb 1649af1bba4SBjoern A. Zeeb const struct iwl_cfg iwl_cfg_gl = { 1659af1bba4SBjoern A. Zeeb .fw_name_mac = "gl", 1669af1bba4SBjoern A. Zeeb .uhb_supported = true, 1679af1bba4SBjoern A. Zeeb IWL_DEVICE_BZ, 168*a4128aadSBjoern A. Zeeb .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, 169*a4128aadSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_BZ_EHT, 1709af1bba4SBjoern A. Zeeb }; 1719af1bba4SBjoern A. Zeeb 1729af1bba4SBjoern A. Zeeb 1739af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1749af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1759af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1769af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1779af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1789af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_BZ_A_FM4_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1799af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_GL_B_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 1809af1bba4SBjoern A. Zeeb MODULE_FIRMWARE(IWL_GL_C_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX)); 181*a4128aadSBjoern A. Zeeb 182*a4128aadSBjoern A. Zeeb MODULE_FIRMWARE("iwlwifi-gl-c0-fm-c0.pnvm"); 183