1bfcc09ddSBjoern A. Zeeb // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2bfcc09ddSBjoern A. Zeeb /* 3bfcc09ddSBjoern A. Zeeb * Copyright (C) 2015-2017 Intel Deutschland GmbH 4*a4128aadSBjoern A. Zeeb * Copyright (C) 2018-2024 Intel Corporation 5bfcc09ddSBjoern A. Zeeb */ 6bfcc09ddSBjoern A. Zeeb #include <linux/module.h> 7bfcc09ddSBjoern A. Zeeb #include <linux/stringify.h> 8bfcc09ddSBjoern A. Zeeb #include "iwl-config.h" 9bfcc09ddSBjoern A. Zeeb #include "iwl-prph.h" 10d9836fb4SBjoern A. Zeeb #include "fw/api/txq.h" 11bfcc09ddSBjoern A. Zeeb 12bfcc09ddSBjoern A. Zeeb /* Highest firmware API version supported */ 139af1bba4SBjoern A. Zeeb #define IWL_22000_UCODE_API_MAX 77 14bfcc09ddSBjoern A. Zeeb 15bfcc09ddSBjoern A. Zeeb /* Lowest firmware API version supported */ 16*a4128aadSBjoern A. Zeeb #define IWL_22000_UCODE_API_MIN 77 17bfcc09ddSBjoern A. Zeeb 18bfcc09ddSBjoern A. Zeeb /* NVM versions */ 19bfcc09ddSBjoern A. Zeeb #define IWL_22000_NVM_VERSION 0x0a1d 20bfcc09ddSBjoern A. Zeeb 21bfcc09ddSBjoern A. Zeeb /* Memory offsets and lengths */ 22bfcc09ddSBjoern A. Zeeb #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */ 23bfcc09ddSBjoern A. Zeeb #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */ 24bfcc09ddSBjoern A. Zeeb #define IWL_22000_DCCM2_OFFSET 0x880000 25bfcc09ddSBjoern A. Zeeb #define IWL_22000_DCCM2_LEN 0x8000 26bfcc09ddSBjoern A. Zeeb #define IWL_22000_SMEM_OFFSET 0x400000 27bfcc09ddSBjoern A. Zeeb #define IWL_22000_SMEM_LEN 0xD0000 28bfcc09ddSBjoern A. Zeeb 299af1bba4SBjoern A. Zeeb #define IWL_QU_B_HR_B_FW_PRE "iwlwifi-Qu-b0-hr-b0" 309af1bba4SBjoern A. Zeeb #define IWL_QU_C_HR_B_FW_PRE "iwlwifi-Qu-c0-hr-b0" 319af1bba4SBjoern A. Zeeb #define IWL_QU_B_JF_B_FW_PRE "iwlwifi-Qu-b0-jf-b0" 329af1bba4SBjoern A. Zeeb #define IWL_QU_C_JF_B_FW_PRE "iwlwifi-Qu-c0-jf-b0" 339af1bba4SBjoern A. Zeeb #define IWL_QUZ_A_HR_B_FW_PRE "iwlwifi-QuZ-a0-hr-b0" 349af1bba4SBjoern A. Zeeb #define IWL_QUZ_A_JF_B_FW_PRE "iwlwifi-QuZ-a0-jf-b0" 359af1bba4SBjoern A. Zeeb #define IWL_CC_A_FW_PRE "iwlwifi-cc-a0" 36bfcc09ddSBjoern A. Zeeb 37bfcc09ddSBjoern A. Zeeb #define IWL_QU_B_HR_B_MODULE_FIRMWARE(api) \ 389af1bba4SBjoern A. Zeeb IWL_QU_B_HR_B_FW_PRE "-" __stringify(api) ".ucode" 39bfcc09ddSBjoern A. Zeeb #define IWL_QUZ_A_HR_B_MODULE_FIRMWARE(api) \ 409af1bba4SBjoern A. Zeeb IWL_QUZ_A_HR_B_FW_PRE "-" __stringify(api) ".ucode" 41bfcc09ddSBjoern A. Zeeb #define IWL_QUZ_A_JF_B_MODULE_FIRMWARE(api) \ 429af1bba4SBjoern A. Zeeb IWL_QUZ_A_JF_B_FW_PRE "-" __stringify(api) ".ucode" 43bfcc09ddSBjoern A. Zeeb #define IWL_QU_C_HR_B_MODULE_FIRMWARE(api) \ 449af1bba4SBjoern A. Zeeb IWL_QU_C_HR_B_FW_PRE "-" __stringify(api) ".ucode" 45bfcc09ddSBjoern A. Zeeb #define IWL_QU_B_JF_B_MODULE_FIRMWARE(api) \ 469af1bba4SBjoern A. Zeeb IWL_QU_B_JF_B_FW_PRE "-" __stringify(api) ".ucode" 47bfcc09ddSBjoern A. Zeeb #define IWL_CC_A_MODULE_FIRMWARE(api) \ 489af1bba4SBjoern A. Zeeb IWL_CC_A_FW_PRE "-" __stringify(api) ".ucode" 49bfcc09ddSBjoern A. Zeeb 50bfcc09ddSBjoern A. Zeeb static const struct iwl_base_params iwl_22000_base_params = { 51bfcc09ddSBjoern A. Zeeb .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 52bfcc09ddSBjoern A. Zeeb .num_of_queues = 512, 53bfcc09ddSBjoern A. Zeeb .max_tfd_queue_size = 256, 54bfcc09ddSBjoern A. Zeeb .shadow_ram_support = true, 55bfcc09ddSBjoern A. Zeeb .led_compensation = 57, 56bfcc09ddSBjoern A. Zeeb .wd_timeout = IWL_LONG_WD_TIMEOUT, 57bfcc09ddSBjoern A. Zeeb .max_event_log_size = 512, 58bfcc09ddSBjoern A. Zeeb .shadow_reg_enable = true, 59bfcc09ddSBjoern A. Zeeb .pcie_l1_allowed = true, 60bfcc09ddSBjoern A. Zeeb }; 61bfcc09ddSBjoern A. Zeeb 629af1bba4SBjoern A. Zeeb const struct iwl_ht_params iwl_22000_ht_params = { 63bfcc09ddSBjoern A. Zeeb .stbc = true, 64bfcc09ddSBjoern A. Zeeb .ldpc = true, 65bfcc09ddSBjoern A. Zeeb .ht40_bands = BIT(NL80211_BAND_2GHZ) | BIT(NL80211_BAND_5GHZ) | 66bfcc09ddSBjoern A. Zeeb BIT(NL80211_BAND_6GHZ), 67bfcc09ddSBjoern A. Zeeb }; 68bfcc09ddSBjoern A. Zeeb 69bfcc09ddSBjoern A. Zeeb #define IWL_DEVICE_22000_COMMON \ 70bfcc09ddSBjoern A. Zeeb .ucode_api_min = IWL_22000_UCODE_API_MIN, \ 71bfcc09ddSBjoern A. Zeeb .led_mode = IWL_LED_RF_STATE, \ 72bfcc09ddSBjoern A. Zeeb .nvm_hw_section_num = 10, \ 73bfcc09ddSBjoern A. Zeeb .non_shared_ant = ANT_B, \ 74bfcc09ddSBjoern A. Zeeb .dccm_offset = IWL_22000_DCCM_OFFSET, \ 75bfcc09ddSBjoern A. Zeeb .dccm_len = IWL_22000_DCCM_LEN, \ 76bfcc09ddSBjoern A. Zeeb .dccm2_offset = IWL_22000_DCCM2_OFFSET, \ 77bfcc09ddSBjoern A. Zeeb .dccm2_len = IWL_22000_DCCM2_LEN, \ 78bfcc09ddSBjoern A. Zeeb .smem_offset = IWL_22000_SMEM_OFFSET, \ 79bfcc09ddSBjoern A. Zeeb .smem_len = IWL_22000_SMEM_LEN, \ 80bfcc09ddSBjoern A. Zeeb .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 81bfcc09ddSBjoern A. Zeeb .apmg_not_supported = true, \ 82bfcc09ddSBjoern A. Zeeb .trans.mq_rx_supported = true, \ 83bfcc09ddSBjoern A. Zeeb .vht_mu_mimo_supported = true, \ 84bfcc09ddSBjoern A. Zeeb .mac_addr_from_csr = 0x380, \ 85bfcc09ddSBjoern A. Zeeb .ht_params = &iwl_22000_ht_params, \ 86bfcc09ddSBjoern A. Zeeb .nvm_ver = IWL_22000_NVM_VERSION, \ 87bfcc09ddSBjoern A. Zeeb .trans.rf_id = true, \ 88bfcc09ddSBjoern A. Zeeb .trans.gen2 = true, \ 89bfcc09ddSBjoern A. Zeeb .nvm_type = IWL_NVM_EXT, \ 90bfcc09ddSBjoern A. Zeeb .dbgc_supported = true, \ 91bfcc09ddSBjoern A. Zeeb .min_umac_error_event_table = 0x400000, \ 92bfcc09ddSBjoern A. Zeeb .d3_debug_data_base_addr = 0x401000, \ 93bfcc09ddSBjoern A. Zeeb .d3_debug_data_length = 60 * 1024, \ 94bfcc09ddSBjoern A. Zeeb .mon_smem_regs = { \ 95bfcc09ddSBjoern A. Zeeb .write_ptr = { \ 96bfcc09ddSBjoern A. Zeeb .addr = LDBG_M2S_BUF_WPTR, \ 97bfcc09ddSBjoern A. Zeeb .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 98bfcc09ddSBjoern A. Zeeb }, \ 99bfcc09ddSBjoern A. Zeeb .cycle_cnt = { \ 100bfcc09ddSBjoern A. Zeeb .addr = LDBG_M2S_BUF_WRAP_CNT, \ 101bfcc09ddSBjoern A. Zeeb .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 102bfcc09ddSBjoern A. Zeeb }, \ 103bfcc09ddSBjoern A. Zeeb } 104bfcc09ddSBjoern A. Zeeb 105bfcc09ddSBjoern A. Zeeb #define IWL_DEVICE_22500 \ 106bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22000_COMMON, \ 1079af1bba4SBjoern A. Zeeb .ucode_api_max = IWL_22000_UCODE_API_MAX, \ 108bfcc09ddSBjoern A. Zeeb .trans.device_family = IWL_DEVICE_FAMILY_22000, \ 109bfcc09ddSBjoern A. Zeeb .trans.base_params = &iwl_22000_base_params, \ 110bfcc09ddSBjoern A. Zeeb .gp2_reg_addr = 0xa02c68, \ 111bfcc09ddSBjoern A. Zeeb .mon_dram_regs = { \ 112bfcc09ddSBjoern A. Zeeb .write_ptr = { \ 113bfcc09ddSBjoern A. Zeeb .addr = MON_BUFF_WRPTR_VER2, \ 114bfcc09ddSBjoern A. Zeeb .mask = 0xffffffff, \ 115bfcc09ddSBjoern A. Zeeb }, \ 116bfcc09ddSBjoern A. Zeeb .cycle_cnt = { \ 117bfcc09ddSBjoern A. Zeeb .addr = MON_BUFF_CYCLE_CNT_VER2, \ 118bfcc09ddSBjoern A. Zeeb .mask = 0xffffffff, \ 119bfcc09ddSBjoern A. Zeeb }, \ 120bfcc09ddSBjoern A. Zeeb } 121bfcc09ddSBjoern A. Zeeb 122bfcc09ddSBjoern A. Zeeb const struct iwl_cfg_trans_params iwl_qu_trans_cfg = { 123bfcc09ddSBjoern A. Zeeb .mq_rx_supported = true, 124bfcc09ddSBjoern A. Zeeb .rf_id = true, 125bfcc09ddSBjoern A. Zeeb .gen2 = true, 126bfcc09ddSBjoern A. Zeeb .device_family = IWL_DEVICE_FAMILY_22000, 127bfcc09ddSBjoern A. Zeeb .base_params = &iwl_22000_base_params, 128bfcc09ddSBjoern A. Zeeb .integrated = true, 129bfcc09ddSBjoern A. Zeeb .xtal_latency = 500, 130bfcc09ddSBjoern A. Zeeb .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 131bfcc09ddSBjoern A. Zeeb }; 132bfcc09ddSBjoern A. Zeeb 133bfcc09ddSBjoern A. Zeeb const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg = { 134bfcc09ddSBjoern A. Zeeb .mq_rx_supported = true, 135bfcc09ddSBjoern A. Zeeb .rf_id = true, 136bfcc09ddSBjoern A. Zeeb .gen2 = true, 137bfcc09ddSBjoern A. Zeeb .device_family = IWL_DEVICE_FAMILY_22000, 138bfcc09ddSBjoern A. Zeeb .base_params = &iwl_22000_base_params, 139bfcc09ddSBjoern A. Zeeb .integrated = true, 140bfcc09ddSBjoern A. Zeeb .xtal_latency = 1820, 141bfcc09ddSBjoern A. Zeeb .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_1820US, 142bfcc09ddSBjoern A. Zeeb }; 143bfcc09ddSBjoern A. Zeeb 144bfcc09ddSBjoern A. Zeeb const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg = { 145bfcc09ddSBjoern A. Zeeb .mq_rx_supported = true, 146bfcc09ddSBjoern A. Zeeb .rf_id = true, 147bfcc09ddSBjoern A. Zeeb .gen2 = true, 148bfcc09ddSBjoern A. Zeeb .device_family = IWL_DEVICE_FAMILY_22000, 149bfcc09ddSBjoern A. Zeeb .base_params = &iwl_22000_base_params, 150bfcc09ddSBjoern A. Zeeb .integrated = true, 151bfcc09ddSBjoern A. Zeeb .xtal_latency = 12000, 152bfcc09ddSBjoern A. Zeeb .low_latency_xtal = true, 153bfcc09ddSBjoern A. Zeeb .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 154bfcc09ddSBjoern A. Zeeb }; 155bfcc09ddSBjoern A. Zeeb 156bfcc09ddSBjoern A. Zeeb /* 157bfcc09ddSBjoern A. Zeeb * If the device doesn't support HE, no need to have that many buffers. 158bfcc09ddSBjoern A. Zeeb * 22000 devices can split multiple frames into a single RB, so fewer are 159bfcc09ddSBjoern A. Zeeb * needed; AX210 cannot (but use smaller RBs by default) - these sizes 160bfcc09ddSBjoern A. Zeeb * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 161bfcc09ddSBjoern A. Zeeb * additional overhead to account for processing time. 162bfcc09ddSBjoern A. Zeeb */ 163bfcc09ddSBjoern A. Zeeb #define IWL_NUM_RBDS_NON_HE 512 164bfcc09ddSBjoern A. Zeeb #define IWL_NUM_RBDS_22000_HE 2048 165bfcc09ddSBjoern A. Zeeb 166bfcc09ddSBjoern A. Zeeb /* 167bfcc09ddSBjoern A. Zeeb * All JF radio modules are part of the 9000 series, but the MAC part 168bfcc09ddSBjoern A. Zeeb * looks more like 22000. That's why this device is here, but called 169bfcc09ddSBjoern A. Zeeb * 9560 nevertheless. 170bfcc09ddSBjoern A. Zeeb */ 171bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg = { 172bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_JF_B_FW_PRE, 173bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 174bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_NON_HE, 175bfcc09ddSBjoern A. Zeeb }; 176bfcc09ddSBjoern A. Zeeb 177bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg = { 178bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_JF_B_FW_PRE, 179bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 180bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_NON_HE, 181bfcc09ddSBjoern A. Zeeb }; 182bfcc09ddSBjoern A. Zeeb 183bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg = { 184bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_JF_B_FW_PRE, 185bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 186bfcc09ddSBjoern A. Zeeb /* 187bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 188bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 189bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 190bfcc09ddSBjoern A. Zeeb */ 191bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 192bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_NON_HE, 193bfcc09ddSBjoern A. Zeeb }; 194bfcc09ddSBjoern A. Zeeb 195bfcc09ddSBjoern A. Zeeb const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 196bfcc09ddSBjoern A. Zeeb .device_family = IWL_DEVICE_FAMILY_22000, 197bfcc09ddSBjoern A. Zeeb .base_params = &iwl_22000_base_params, 198bfcc09ddSBjoern A. Zeeb .mq_rx_supported = true, 199bfcc09ddSBjoern A. Zeeb .rf_id = true, 200bfcc09ddSBjoern A. Zeeb .gen2 = true, 201bfcc09ddSBjoern A. Zeeb .bisr_workaround = 1, 202bfcc09ddSBjoern A. Zeeb }; 203bfcc09ddSBjoern A. Zeeb 204bfcc09ddSBjoern A. Zeeb const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; 205bfcc09ddSBjoern A. Zeeb const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 206bfcc09ddSBjoern A. Zeeb const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; 207bfcc09ddSBjoern A. Zeeb const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; 208d9836fb4SBjoern A. Zeeb const char iwl_ax204_name[] = "Intel(R) Wi-Fi 6 AX204 160MHz"; 209bfcc09ddSBjoern A. Zeeb 210bfcc09ddSBjoern A. Zeeb const char iwl_ax200_killer_1650w_name[] = 211bfcc09ddSBjoern A. Zeeb "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 212bfcc09ddSBjoern A. Zeeb const char iwl_ax200_killer_1650x_name[] = 213bfcc09ddSBjoern A. Zeeb "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 214bfcc09ddSBjoern A. Zeeb const char iwl_ax201_killer_1650s_name[] = 215bfcc09ddSBjoern A. Zeeb "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)"; 216bfcc09ddSBjoern A. Zeeb const char iwl_ax201_killer_1650i_name[] = 217bfcc09ddSBjoern A. Zeeb "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)"; 218bfcc09ddSBjoern A. Zeeb 219bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_qu_b0_hr1_b0 = { 220bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 221bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 222bfcc09ddSBjoern A. Zeeb /* 223bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 224bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 225bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 226bfcc09ddSBjoern A. Zeeb */ 227bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 228bfcc09ddSBjoern A. Zeeb .tx_with_siso_diversity = true, 229bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 230bfcc09ddSBjoern A. Zeeb }; 231bfcc09ddSBjoern A. Zeeb 232bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_qu_b0_hr_b0 = { 233bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 234bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 235bfcc09ddSBjoern A. Zeeb /* 236bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 237bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 238bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 239bfcc09ddSBjoern A. Zeeb */ 240bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 241bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 242bfcc09ddSBjoern A. Zeeb }; 243bfcc09ddSBjoern A. Zeeb 244bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax201_cfg_qu_hr = { 245bfcc09ddSBjoern A. Zeeb .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 246bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 247bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 248bfcc09ddSBjoern A. Zeeb /* 249bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 250bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 251bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 252bfcc09ddSBjoern A. Zeeb */ 253bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 254bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 255bfcc09ddSBjoern A. Zeeb }; 256bfcc09ddSBjoern A. Zeeb 257bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_qu_c0_hr1_b0 = { 258bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 259bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 260bfcc09ddSBjoern A. Zeeb /* 261bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 262bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 263bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 264bfcc09ddSBjoern A. Zeeb */ 265bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 266bfcc09ddSBjoern A. Zeeb .tx_with_siso_diversity = true, 267bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 268bfcc09ddSBjoern A. Zeeb }; 269bfcc09ddSBjoern A. Zeeb 270bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_qu_c0_hr_b0 = { 271bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 272bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 273bfcc09ddSBjoern A. Zeeb /* 274bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 275bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 276bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 277bfcc09ddSBjoern A. Zeeb */ 278bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 279bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 280bfcc09ddSBjoern A. Zeeb }; 281bfcc09ddSBjoern A. Zeeb 282bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0 = { 283bfcc09ddSBjoern A. Zeeb .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 284bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 285bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 286bfcc09ddSBjoern A. Zeeb /* 287bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 288bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 289bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 290bfcc09ddSBjoern A. Zeeb */ 291bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 292bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 293bfcc09ddSBjoern A. Zeeb }; 294bfcc09ddSBjoern A. Zeeb 295bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_quz_a0_hr1_b0 = { 296bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 297bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 298bfcc09ddSBjoern A. Zeeb /* 299bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 300bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 301bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 302bfcc09ddSBjoern A. Zeeb */ 303bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 304bfcc09ddSBjoern A. Zeeb .tx_with_siso_diversity = true, 305bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 306bfcc09ddSBjoern A. Zeeb }; 307bfcc09ddSBjoern A. Zeeb 308bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax201_cfg_quz_hr = { 309bfcc09ddSBjoern A. Zeeb .name = "Intel(R) Wi-Fi 6 AX201 160MHz", 310bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 311bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 312bfcc09ddSBjoern A. Zeeb /* 313bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 314bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 315bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 316bfcc09ddSBjoern A. Zeeb */ 317bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 318bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 319bfcc09ddSBjoern A. Zeeb }; 320bfcc09ddSBjoern A. Zeeb 321bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = { 322bfcc09ddSBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)", 323bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 324bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 325bfcc09ddSBjoern A. Zeeb /* 326bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 327bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 328bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 329bfcc09ddSBjoern A. Zeeb */ 330bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 331bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 332bfcc09ddSBjoern A. Zeeb }; 333bfcc09ddSBjoern A. Zeeb 334bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = { 335bfcc09ddSBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)", 336bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 337bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 338bfcc09ddSBjoern A. Zeeb /* 339bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 340bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 341bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 342bfcc09ddSBjoern A. Zeeb */ 343bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 344bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 345bfcc09ddSBjoern A. Zeeb }; 346bfcc09ddSBjoern A. Zeeb 347bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_ax200_cfg_cc = { 348bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_CC_A_FW_PRE, 349bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 350bfcc09ddSBjoern A. Zeeb /* 351bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 352bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 353bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 354bfcc09ddSBjoern A. Zeeb */ 355bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 356bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 357bfcc09ddSBjoern A. Zeeb }; 358bfcc09ddSBjoern A. Zeeb 359bfcc09ddSBjoern A. Zeeb const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0 = { 360d9836fb4SBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201NGW)", 361bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 362bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 363bfcc09ddSBjoern A. Zeeb /* 364bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 365bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 366bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 367bfcc09ddSBjoern A. Zeeb */ 368bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 369bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 370bfcc09ddSBjoern A. Zeeb }; 371bfcc09ddSBjoern A. Zeeb 372bfcc09ddSBjoern A. Zeeb const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0 = { 373d9836fb4SBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201D2W)", 374bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_B_HR_B_FW_PRE, 375bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 376bfcc09ddSBjoern A. Zeeb /* 377bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 378bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 379bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 380bfcc09ddSBjoern A. Zeeb */ 381bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 382bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 383bfcc09ddSBjoern A. Zeeb }; 384bfcc09ddSBjoern A. Zeeb 385bfcc09ddSBjoern A. Zeeb const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0 = { 386d9836fb4SBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201NGW)", 387bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 388bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 389bfcc09ddSBjoern A. Zeeb /* 390bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 391bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 392bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 393bfcc09ddSBjoern A. Zeeb */ 394bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 395bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 396bfcc09ddSBjoern A. Zeeb }; 397bfcc09ddSBjoern A. Zeeb 398bfcc09ddSBjoern A. Zeeb const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0 = { 399d9836fb4SBjoern A. Zeeb .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201D2W)", 400bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QU_C_HR_B_FW_PRE, 401bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 402bfcc09ddSBjoern A. Zeeb /* 403bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 404bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 405bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 406bfcc09ddSBjoern A. Zeeb */ 407bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 408bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 409bfcc09ddSBjoern A. Zeeb }; 410bfcc09ddSBjoern A. Zeeb 411bfcc09ddSBjoern A. Zeeb const struct iwl_cfg iwl_cfg_quz_a0_hr_b0 = { 412bfcc09ddSBjoern A. Zeeb .fw_name_pre = IWL_QUZ_A_HR_B_FW_PRE, 413bfcc09ddSBjoern A. Zeeb IWL_DEVICE_22500, 414bfcc09ddSBjoern A. Zeeb /* 415bfcc09ddSBjoern A. Zeeb * This device doesn't support receiving BlockAck with a large bitmap 416bfcc09ddSBjoern A. Zeeb * so we need to restrict the size of transmitted aggregation to the 417bfcc09ddSBjoern A. Zeeb * HT size; mac80211 would otherwise pick the HE max (256) by default. 418bfcc09ddSBjoern A. Zeeb */ 419bfcc09ddSBjoern A. Zeeb .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 420bfcc09ddSBjoern A. Zeeb .num_rbds = IWL_NUM_RBDS_22000_HE, 421bfcc09ddSBjoern A. Zeeb }; 422bfcc09ddSBjoern A. Zeeb 423bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_QU_B_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 424bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_QU_C_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 425bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_QU_B_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 426bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_QUZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 427bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_QUZ_A_JF_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 428bfcc09ddSBjoern A. Zeeb MODULE_FIRMWARE(IWL_CC_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX)); 429