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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dti,am3359-adc.yaml27 description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and
37 the start of ADC conversion. Maximum value is 0x3FFFF.
45 to sample (to hold start of conversion high). Maximum value is 0xFF.
72 ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>;
73 ti,chan-step-sampledelay = <0xff 0x0 0xf 0x0>;
/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dti-tsc-adc.txt30 AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
31 XP = 0, XN = 1, YP = 2, YN = 3.
37 AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
46 event. Start from a lower value, say 0x400, and
60 Maximum value is 0x3FFFF.
66 Maximum value is 0xFF.
71 by ADC to generate a sample. Valid range is 0
81 ti,wire-config = <0x00 0x11 0x22 0x33>;
82 ti,charge-delay = <0x400>;
87 ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>;
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300phy.h55 #define AR_PHY_TIMING11_SPUR_FREQ_SD 0x3FF00000
58 #define AR_PHY_TIMING11_SPUR_DELTA_PHASE 0x000FFFFF
59 #define AR_PHY_TIMING11_SPUR_DELTA_PHASE_S 0
61 #define AR_PHY_TIMING11_USE_SPUR_FILTER_IN_AGC 0x40000000
64 #define AR_PHY_TIMING11_USE_SPUR_FILTER_IN_SELFCOR 0x80000000
68 #define AR_PHY_SPUR_REG_ENABLE_NF_RSSI_SPUR_MIT 0x4000000
71 #define AR_PHY_SPUR_REG_ENABLE_MASK_PPM 0x20000 /* bins move with freq offset */
73 #define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH 0x000000FF
74 #define AR_PHY_SPUR_REG_SPUR_RSSI_THRESH_S 0
75 #define AR_PHY_SPUR_REG_EN_VIT_SPUR_RSSI 0x00000100
[all …]
/freebsd/sys/dev/ath/
H A Dif_ath_pci.c89 #define PCI_VENDOR_ID_ATHEROS 0x168c
90 #define PCI_VENDOR_ID_SAMSUNG 0x144d
91 #define PCI_VENDOR_ID_AZWAVE 0x1a3b
92 #define PCI_VENDOR_ID_FOXCONN 0x105b
93 #define PCI_VENDOR_ID_ATTANSIC 0x1969
94 #define PCI_VENDOR_ID_ASUSTEK 0x1043
95 #define PCI_VENDOR_ID_DELL 0x1028
96 #define PCI_VENDOR_ID_QMI 0x1a32
97 #define PCI_VENDOR_ID_LENOVO 0x17aa
98 #define PCI_VENDOR_ID_HP 0x103c
[all …]
/freebsd/crypto/heimdal/lib/wind/
H A Dtest-prohibited.c41 0x00A0, 0x3000,
42 0x0080, 0x009F, 0x206A, 0x206F, 0xFEFF,
43 0xFFF9, 0xFFFD, 0xFFFE, 0xFFFF,
44 0x1D173, 0x1D17A,
45 0xE000, 0xF8FF, 0xF0000, 0xFFFFD,
46 0x100000, 0x10FFFD,
47 0xFDD0, 0xFDEF,
48 0xFFFE, 0xFFFF,
49 0x1FFFE, 0x1FFFF,
50 0x2FFFE, 0x2FFFF,
[all …]
/freebsd/sys/powerpc/include/
H A Dopenpicreg.h34 #define OPENPIC_SIZE 0x40000
37 * Per Processor Registers [private access] (0x00000 - 0x00fff)
41 #define OPENPIC_IPI_DISPATCH(ipi) (0x40 + (ipi) * 0x10)
44 #define OPENPIC_TPR 0x80
45 #define OPENPIC_TPR_MASK 0x0000000f
47 #define OPENPIC_WHOAMI 0x90
50 #define OPENPIC_IACK 0xa0
53 #define OPENPIC_EOI 0xb0
56 * Global registers (0x01000-0x0ffff)
59 /* feature reporting reg 0 */
[all …]
/freebsd/sys/dev/hyperv/utilities/
H A Dunicode.h34 #define UNICODE_DECOMPOSE 0x01
35 #define UNICODE_PRECOMPOSE 0x02
36 #define UNICODE_UTF8_LATIN1_FALLBACK 0x03
51 #define IS_CONT(c) (((c)&0xc0) == 0x80) in utf8_to_utf16()
53 error = 0; in utf8_to_utf16()
55 spos = dpos = 0; in utf8_to_utf16()
57 if (s[spos] < 0x80) in utf8_to_utf16()
61 && s[spos]>=0xa0) { in utf8_to_utf16()
65 else if (s[spos] < 0xc0 || s[spos] >= 0xf5) { in utf8_to_utf16()
67 or lead byte for codepoint above 0x10ffff */ in utf8_to_utf16()
[all …]
/freebsd/bin/pax/
H A Dcpio.h75 #define CPIO_MASK 0x3ffff /* bits valid in the dev/ino fields */
106 #define SHRT_EXT(ch) ((((unsigned)(ch)[0])<<8) | (((unsigned)(ch)[1])&0xff))
107 #define RSHRT_EXT(ch) ((((unsigned)(ch)[1])<<8) | (((unsigned)(ch)[0])&0xff))
108 #define CHR_WR_0(val) ((char)(((val) >> 24) & 0xff))
109 #define CHR_WR_1(val) ((char)(((val) >> 16) & 0xff))
110 #define CHR_WR_2(val) ((char)(((val) >> 8) & 0xff))
111 #define CHR_WR_3(val) ((char)((val) & 0xff))
117 #define BCPIO_MASK 0xffff /* mask for dev/ino fields */
137 char c_chksum[8]; /* 0 OR CRC of bytes of FILE data */
146 #define VCPIO_MASK 0xffffffff /* mask for dev/ino fields */
/freebsd/sys/dev/sound/pci/
H A Dvia82c686.c42 #define VIA_PCI_ID 0x30581106
48 #define VIA_DEFAULT_BUFSZ 0x1000
57 #define VIA_DMAOP_EOL 0x80000000
58 #define VIA_DMAOP_FLAG 0x40000000
59 #define VIA_DMAOP_STOP 0x20000000
60 #define VIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF)
97 SND_FORMAT(AFMT_U8, 1, 0),
98 SND_FORMAT(AFMT_U8, 2, 0),
99 SND_FORMAT(AFMT_S16_LE, 1, 0),
100 SND_FORMAT(AFMT_S16_LE, 2, 0),
[all …]
H A Dich.c53 #define INTEL_VENDORID 0x8086
54 #define SIS_VENDORID 0x1039
55 #define NVIDIA_VENDORID 0x10de
56 #define AMD_VENDORID 0x1022
58 #define INTEL_82440MX 0x7195
59 #define INTEL_82801AA 0x2415
60 #define INTEL_82801AB 0x2425
61 #define INTEL_82801BA 0x2445
62 #define INTEL_82801CA 0x2485
63 #define INTEL_82801DB 0x24c5 /* ICH4 needs special handling */
[all …]
H A Datiixp.c81 #define ATI_IXP_CHN_RUNNING 0x00000001
82 #define ATI_IXP_CHN_SUSPEND 0x00000002
147 SND_FORMAT(AFMT_S16_LE, 2, 0),
148 SND_FORMAT(AFMT_S32_LE, 2, 0),
149 0
153 SND_FORMAT(AFMT_S16_LE, 2, 0),
154 0
160 atiixp_fmt_32bit, 0
166 atiixp_fmt, 0
223 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff); in atiixp_enable_interrupts()
[all …]
H A Dvia8233.c53 #define VIA8233_PCI_ID 0x30591106
55 #define VIA8233_REV_ID_8233PRE 0x10
56 #define VIA8233_REV_ID_8233C 0x20
57 #define VIA8233_REV_ID_8233 0x30
58 #define VIA8233_REV_ID_8233A 0x40
59 #define VIA8233_REV_ID_8235 0x50
60 #define VIA8233_REV_ID_8237 0x60
61 #define VIA8233_REV_ID_8251 0x70
75 #define VIA_DEFAULT_BUFSZ 0x1000
81 #define VIA_DMAOP_EOL 0x80000000
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaAsmBackend.cpp5 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
61 {"fixup_xtensa_branch_6", 0, 16, MCFixupKindInfo::FKF_IsPCRel}, in getFixupKindInfo()
94 unsigned Hi2 = (Value >> 4) & 0x3; in adjustFixupValue()
95 unsigned Lo4 = Value & 0xf; in adjustFixupValue()
102 return (Value & 0xff); in adjustFixupValue()
107 return (Value & 0xfff); in adjustFixupValue()
112 return (Value & 0x3ffff); in adjustFixupValue()
117 if (Value & 0x3) in adjustFixupValue()
119 return (Value & 0xffffc) >> 2; in adjustFixupValue()
122 if (Offset & 0x3) in adjustFixupValue()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldELFMips.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
57 LLVM_DEBUG(dbgs() << "evaluateMIPS32Relocation, LocalAddress: 0x" in evaluateMIPS32Relocation()
59 << " FinalAddress: 0x" in evaluateMIPS32Relocation()
61 << " Value: 0x" << format("%llx", Value) << " Type: 0x" in evaluateMIPS32Relocation()
74 return (Value + 0x8000) >> 16; in evaluateMIPS32Relocation()
87 return (Value - (FinalAddress & ~0x3)) >> 2; in evaluateMIPS32Relocation()
99 return (Value - FinalAddress + 0x8000) >> 16; in evaluateMIPS32Relocation()
112 LLVM_DEBUG(dbgs() << "evaluateMIPS64Relocation, LocalAddress: 0x" in evaluateMIPS64Relocation()
114 << " FinalAddress: 0x" in evaluateMIPS64Relocation()
116 << " Value: 0x" << format("%llx", Value) << " Type: 0x" in evaluateMIPS64Relocation()
[all …]
/freebsd/sys/dev/dc/
H A Ddcphy.c81 #define MIIF_AUTOTIMEOUT 0x0004
88 #define COMPAQ_PRESARIO_ID 0xb0bb0e11
108 DRIVER_MODULE(dcphy, miibus, dcphy_driver, 0, 0);
151 &dcphy_funcs, 0); in dcphy_attach()
155 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0); in dcphy_attach()
156 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0); in dcphy_attach()
181 return (0); in dcphy_attach()
202 if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0) in dcphy_service()
220 if ((ife->ifm_media & IFM_FDX) != 0) in dcphy_service()
228 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF); in dcphy_service()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
36 SI = 0,
55 SALU = 1 << 0,
109 // Reserved, must be 0.
115 // Reserved, must be 0.
184 S_NAN = 1 << 0, // Signaling NaN
275 INT = 0,
287 NONE = 0,
288 NEG = 1 << 0, // Floating-point negate modifier
290 SEXT = 1 << 0, // Integer sign-extend modifier
[all …]
/freebsd/sys/dev/ice/
H A Dice_hw_autogen.h43 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE(_i) (0x000FD000 + ((_i) * 64)) /* _i=0...7 */ /* Reset Source: CORER */
45 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_S 0
46 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_M MAKEMASK(0x3F, 0)
48 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_END_M MAKEMASK(0x3F, 6)
50 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_TYPE_M MAKEMASK(0x3, 12)
52 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_NUM_M MAKEMASK(0x3FF, 14)
54 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_PF_NUM_M MAKEMASK(0x7, 24)
57 #define GL_HIDA(_i) (0x0008200
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYAsmBackend.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
31 {CSKY::Fixups::fixup_csky_addr32, {"fixup_csky_addr32", 0, 32, 0}}, in getFixupKindInfo()
32 {CSKY::Fixups::fixup_csky_addr_hi16, {"fixup_csky_addr_hi16", 0, 32, 0}}, in getFixupKindInfo()
33 {CSKY::Fixups::fixup_csky_addr_lo16, {"fixup_csky_addr_lo16", 0, 32, 0}}, in getFixupKindInfo()
35 {"fixup_csky_pcrel_imm16_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}}, in getFixupKindInfo()
37 {"fixup_csky_pcrel_uimm16_scale4", 0, 32, in getFixupKindInfo()
41 {"fixup_csky_pcrel_uimm8_scale4", 0, 32, in getFixupKindInfo()
45 {"fixup_csky_pcrel_imm26_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}}, in getFixupKindInfo()
47 {"fixup_csky_pcrel_imm18_scale2", 0, 32, MCFixupKindInfo::FKF_IsPCRel}}, in getFixupKindInfo()
48 {CSKY::Fixups::fixup_csky_got32, {"fixup_csky_got32", 0, 32, 0}}, in getFixupKindInfo()
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Dmac.c15 u8 txsc40 = 0, txsc20 = 0; in rtw_set_channel_mac()
68 rtw_write8(rtwdev, REG_RSV_CTRL, 0); in rtw_mac_pre_system_cfg()
75 return 0; in rtw_mac_pre_system_cfg()
85 for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) { in rtw_mac_pre_system_cfg()
136 return 0; in rtw_mac_pre_system_cfg()
147 rtwdev, addr) == 0; in do_pwr_poll_cmd()
162 return 0; in rtw_pwr_cmd_polling()
177 return 0; in rtw_pwr_cmd_polling()
180 rtw_err(rtwdev, "failed to poll offset=0 in rtw_pwr_cmd_polling()
[all...]
H A Dreg.h8 #define REG_SYS_FUNC_EN 0x0002
13 #define BIT_FEN_BB_RSTB BIT(0)
16 #define REG_SYS_PW_CTRL 0x0004
18 #define REG_SYS_CLK_CTRL 0x0008
21 #define REG_SYS_CLKR 0x0008
26 #define REG_RSV_CTRL 0x001C
27 #define DISABLE_PI 0x3
28 #define ENABLE_PI 0x2
30 #define BIT_WLMCU_IOIF BIT(0)
31 #define REG_RF_CTRL 0x001
[all...]
/freebsd/sys/contrib/openzfs/include/os/freebsd/spl/sys/
H A Dsysmacros.h63 #define ABS(a) ((a) < 0 ? -(a) : (a))
66 #define SIGNOF(a) ((a) < 0 ? -1 : (a) > 0)
69 #define ARRAY_SIZE(a) (sizeof (a) / sizeof (a[0]))
84 #define is_system_labeled() 0
91 #define BYTE_TO_BCD(x) byte_to_bcd[(x) & 0xff]
92 #define BCD_TO_BYTE(x) bcd_to_byte[(x) & 0xff]
108 #define O_MAXMAJ 0x7f /* SVR3 max major value */
109 #define O_MAXMIN 0xff /* SVR3 max minor value */
114 #define L_MAXMAJ32 0x3fff /* SVR4 max major value */
115 #define L_MAXMIN32 0x3ffff /* MAX minor for 3b2 software drivers. */
[all …]
/freebsd/contrib/tcpdump/
H A Dparsenfsfh.c67 #define FHT_UNKNOWN 0
133 else if ((GET_U_1(fhp) == 0) && (GET_U_1(fhp + 1) == 0)) { in Parse_fh()
134 /* bytes[0,1] == (0,0); rules out Ultrix, IRIX5, SUNOS5 */ in Parse_fh()
135 /* probably rules out HP-UX, AIX unless they allow major=0 */ in Parse_fh()
136 if ((GET_U_1(fhp + 2) == 0) && (GET_U_1(fhp + 3) == 0)) { in Parse_fh()
137 /* bytes[2,3] == (0,0); must be Auspex */ in Parse_fh()
142 * bytes[2,3] != (0,0); rules out Auspex, could be in Parse_fh()
145 if ((GET_U_1(fhp + 4) != 0) && (GET_U_1(fhp + 5) == 0) && in Parse_fh()
146 (GET_U_1(fhp + 8) == 12) && (GET_U_1(fhp + 9) == 0)) { in Parse_fh()
147 /* seems to be DECOSF, with minor == 0 */ in Parse_fh()
[all …]
/freebsd/sys/cddl/contrib/opensolaris/uts/common/sys/
H A Dsysmacros.h66 #define ABS(a) ((a) < 0 ? -(a) : (a))
69 #define SIGNOF(a) ((a) < 0 ? -1 : (a) > 0)
80 #define BYTE_TO_BCD(x) byte_to_bcd[(x) & 0xff]
81 #define BCD_TO_BYTE(x) bcd_to_byte[(x) & 0xff]
99 #define O_MAXMAJ 0x7f /* SVR3 max major value */
100 #define O_MAXMIN 0xff /* SVR3 max minor value */
105 #define L_MAXMAJ32 0x3fff /* SVR4 max major value */
106 #define L_MAXMIN32 0x3ffff /* MAX minor for 3b2 software drivers. */
108 /* restricted to 256 (0-255) */
113 #define L_MAXMAJ 0xfffffffful /* max major value */
[all …]
/freebsd/contrib/tcsh/
H A Dsh.hist.c40 Char HistLit = 0;
45 #define HIST_ONLY 0x01
46 #define HIST_SAVE 0x02
47 #define HIST_LOAD 0x04
48 #define HIST_REV 0x08
49 #define HIST_CLEAR 0x10
50 #define HIST_MERGE 0x20
51 #define HIST_TIME 0x40
68 static unsigned histCount = 0; /* number elements on history list */
69 static int histlen = 0;
[all …]
/freebsd/sys/dev/hifn/
H A Dhifn7751reg.h53 #define HIFN_BAR0 PCIR_BAR(0) /* PUC register map */
55 #define HIFN_TRDY_TIMEOUT 0x40
56 #define HIFN_RETRY_TIMEOUT 0x41
62 #define PCI_VENDOR_HIFN 0x13a3 /* Hifn */
63 #define PCI_PRODUCT_HIFN_7751 0x0005 /* 7751 */
64 #define PCI_PRODUCT_HIFN_6500 0x0006 /* 6500 */
65 #define PCI_PRODUCT_HIFN_7811 0x0007 /* 7811 */
66 #define PCI_PRODUCT_HIFN_7951 0x0012 /* 7951 */
67 #define PCI_PRODUCT_HIFN_7955 0x0020 /* 7954/7955 */
68 #define PCI_PRODUCT_HIFN_7956 0x001d /* 7956 */
[all …]

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