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Searched +full:0 +full:x34000000 (Results 1 – 15 of 15) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-cm40.dtsi11 #clock-cells = <0>;
20 ranges = <0x34000000 0x0 0x34000000 0x4000000>;
25 reg = <0x37220000 0x1000>;
37 reg = <0x37230000 0x1000>;
50 reg = <0x37400000 0x1000>;
70 reg = <0x37620000 0x1000>;
82 reg = <0x37630000 0x1000>;
/linux/arch/sh/include/mach-se/mach/
H A Dse7206.h5 #define PA_SMSC 0x30000000
6 #define PA_MRSHPC 0x34000000
7 #define PA_LED 0x31400000
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-nhk15.dts40 ste,input = <0>;
52 ste,input = <0>;
64 ste,input = <0>;
78 reg = <0x34000000 0x1000000>;
81 ranges = <0 0x34000000 0x1000000>;
84 reg = <0x300 0x0fd00>;
98 pinctrl-0 = <&lis3lv02dl_nhk_mode>;
100 reg = <0x1d>;
104 reg = <0x43>;
110 pinctrl-0 = <&stmpe2401_1_nhk_mode>;
[all …]
/linux/Documentation/devicetree/bindings/dma/ti/
H A Dk3-udma.yaml56 for source thread IDs (rx): 0 - 0x7fff
57 for destination thread IDs (tx): 0x8000 - 0xffff
164 ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>;
170 reg = <0x0 0x31150000 0x0 0x100>,
171 <0x0 0x34000000 0x0 0x100000>,
172 <0x0 0x35000000 0x0 0x100000>,
173 <0x0 0x30b00000 0x0 0x20000>,
174 <0x0 0x30c00000 0x0 0x8000>,
175 <0x0 0x30d00000 0x0 0x4000>;
186 ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6c 0x00300000 0x0 0x00004000>,
39 <0x48 0x00000000 0x0 0x00001000>,
40 <0x6c 0x000c0000 0x0 0x00001000>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
50 <0 0 0 2 &pcie_intc0 1>,
51 <0 0 0 3 &pcie_intc0 2>,
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2166x-common.dtsi22 ranges = <0 0x34000000 0x102f83ac>;
28 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
33 reg = <0x01001f00 0x24>;
38 reg = <0x01003000 0x524>;
51 reg = <0x01004800 0x7f4>;
56 reg = <0x01006000 0x1c>;
65 ranges = <0 0x3e000000 0x0001c070>;
69 uartb: serial@0 {
71 reg = <0x00000000 0x118>;
81 reg = <0x00001000 0x118>;
[all …]
H A Dbcm11351.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 secondary-boot-reg = <0x3500417c>;
41 #address-cells = <0>;
43 reg = <0x3ff01000 0x1000>,
44 <0x3ff00100 0x100>;
49 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
54 reg = <0x3e000000 0x1000>;
64 reg = <0x3e001000 0x1000>;
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dversatile-ab.dts24 reg = <0x0 0x08000000>;
28 #clock-cells = <0>;
38 #size-cells = <0>;
40 port@0 {
41 reg = <0>;
71 reg = <0x10000000 0x200>;
72 ranges = <0x0 0x10000000 0x200>;
76 led@8,0 {
78 reg = <0x08 0x04>;
79 offset = <0x08>;
[all …]
/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgk104.c144 u32 addr = 0x110974, i; in gk104_ram_train()
146 ram_mask(fuc, 0x10f910, mask, data); in gk104_ram_train()
147 ram_mask(fuc, 0x10f914, mask, data); in gk104_ram_train()
149 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train()
152 ram_wait(fuc, addr, 0x0000000f, 0x00000000, 500000); in gk104_ram_train()
166 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00001100); in r1373f4_init()
167 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00000010); in r1373f4_init()
169 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010); in r1373f4_init()
172 ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000); in r1373f4_init()
173 ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000); in r1373f4_init()
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]
H A Dtegra234.dtsi31 bus@0 {
36 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
40 reg = <0x0 0x00100000 0x0 0xf000>,
41 <0x0 0x0010f000 0x0 0x1000>;
47 reg = <0x0 0x02080000 0x0 0x00121000>;
48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
70 reg = <0x0 0x02200000 0x0 0x10000>,
71 <0x0 0x02210000 0x0 0x10000>;
124 gpio-ranges = <&pinmux 0 0 164>;
129 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]