| /linux/sound/isa/gus/ |
| H A D | gusextreme.c | 31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 34 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 35 static long gf1_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x210,0x220,0x230,0x24 [all...] |
| H A D | gusclassic.c | 27 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 30 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */ 34 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29}; 35 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */ 36 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24}; 37 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 69 static const long possible_ports[] = {0x220, 0x230, 0x240, 0x250, 0x260}; in snd_gusclassic_create() 77 if (irq[n] < 0) { in snd_gusclassic_create() 84 if (dma1[n] < 0) { in snd_gusclassic_create() 91 if (dma2[n] < 0) { in snd_gusclassic_create() [all …]
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| H A D | gusmax.c | 25 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 28 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x230,0x240,0x250,0x260 */ 32 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29}; 33 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */ 34 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24}; 35 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2}; 71 snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 0); /* reset GF1 */ in snd_gusmax_detect() 73 if ((d & 0x07) != 0) { in snd_gusmax_detect() 74 dev_dbg(gus->card->dev, "[0x%lx] check 1 failed - 0x%x\n", gus->gf1.port, d); in snd_gusmax_detect() 81 if ((d & 0x07) != 1) { in snd_gusmax_detect() [all …]
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| /linux/Documentation/translations/zh_CN/dev-tools/ |
| H A D | kcsan.rst | 35 write to 0xffffffffc009a628 of 8 bytes by task 487 on cpu 0: 36 test_kernel_write+0x1d/0x30 37 access_thread+0x89/0xd0 38 kthread+0x23e/0x260 39 ret_from_fork+0x22/0x30 41 read to 0xffffffffc009a628 of 8 bytes by task 488 on cpu 6: 42 test_kernel_read+0x10/0x20 43 access_thread+0x89/0xd0 44 kthread+0x23e/0x260 45 ret_from_fork+0x22/0x30 [all …]
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| /linux/drivers/gpu/drm/i915/pxp/ |
| H A D | intel_pxp_regs.h | 12 #define GEN12_KCR_BASE 0x32000 13 #define MTL_KCR_BASE 0x386000 16 #define KCR_INIT(base) _MMIO((base) + 0xf0) 21 /* KCR hwdrm session in play status 0-31 */ 22 #define KCR_SIP(base) _MMIO((base) + 0x260) 25 #define KCR_GLOBAL_TERMINATE(base) _MMIO((base) + 0xf8)
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-apmixedsys.c | 15 #define REG_REF2USB 0x8 16 #define REG_AP_PLL_CON7 0x1c 17 #define MD1_MTCMOS_OFF BIT(0) 23 #define MT6795_CON0_EN BIT(0) 43 .pll_en_bit = 0, \ 47 PLL(CLK_APMIXED_ARMCA53PLL, "armca53pll", 0x200, 0x20c, 0, PLL_AO, 48 21, 0x204, 24, 0x0, 0x204, 0), 49 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000101, HAVE_RST_BAR, 50 21, 0x220, 4, 0x0, 0x224, 0), 51 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR, [all …]
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| H A D | clk-mt8173-apmixedsys.c | 17 #define REGOFF_REF2USB 0x8 18 #define REGOFF_HDMI_REF 0x40 52 { .div = 0, .freq = MT8173_PLL_FMAX }, 61 PLL(CLK_APMIXED_ARMCA15PLL, "armca15pll", 0x200, 0x20c, 0, PLL_AO, 62 21, 0x204, 24, 0x0, 0x204, 0), 63 PLL(CLK_APMIXED_ARMCA7PLL, "armca7pll", 0x210, 0x21c, 0, PLL_AO, 64 21, 0x214, 24, 0x0, 0x214, 0), 65 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x220, 0x22c, 0xf0000100, HAVE_RST_BAR, 21, 66 0x220, 4, 0x0, 0x224, 0), 67 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7, [all …]
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| /linux/sound/isa/sb/ |
| H A D | sb8.c | 22 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 25 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 61 return 0; in snd_sb8_match() 64 return 0; in snd_sb8_match() 68 return 0; in snd_sb8_match() 83 if (err < 0) in snd_sb8_probe() 88 * Block the 0x388 port to avoid PnP conflicts. in snd_sb8_probe() 92 acard->fm_res = devm_request_region(card->dev, 0x388, 4, in snd_sb8_probe() 99 if (err < 0) in snd_sb8_probe() 104 0x220, 0x240, 0x260, in snd_sb8_probe() [all …]
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| /linux/drivers/media/platform/mediatek/mdp3/ |
| H A D | mdp_reg_tdshp.h | 10 #define MDP_HIST_CFG_00 (0x064) 11 #define MDP_HIST_CFG_01 (0x068) 12 #define MDP_TDSHP_CTRL (0x100) 13 #define MDP_TDSHP_CFG (0x110) 14 #define MDP_TDSHP_INPUT_SIZE (0x120) 15 #define MDP_TDSHP_OUTPUT_OFFSET (0x124) 16 #define MDP_TDSHP_OUTPUT_SIZE (0x128) 17 #define MDP_LUMA_HIST_INIT (0x200) 18 #define MDP_DC_TWO_D_W1_RESULT_INIT (0x260) 19 #define MDP_CONTOUR_HIST_INIT (0x398) [all …]
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| H A D | mdp_reg_rdma.h | 10 #define MDP_RDMA_EN 0x000 11 #define MDP_RDMA_RESET 0x008 12 #define MDP_RDMA_CON 0x020 13 #define MDP_RDMA_GMCIF_CON 0x028 14 #define MDP_RDMA_SRC_CON 0x030 15 #define MDP_RDMA_MF_BKGD_SIZE_IN_BYTE 0x060 16 #define MDP_RDMA_MF_BKGD_SIZE_IN_PXL 0x068 17 #define MDP_RDMA_MF_SRC_SIZE 0x070 18 #define MDP_RDMA_MF_CLIP_SIZE 0x078 19 #define MDP_RDMA_MF_OFFSET_1 0x080 [all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sm8250-mdss.yaml | 47 "^display-controller@[0-9a-f]+$": 55 "^displayport-controller@[0-9a-f]+$": 65 "^dsi@[0-9a-f]+$": 75 "^phy@[0-9a-f]+$": 99 reg = <0x0ae00000 0x1000>; 118 iommus = <&apps_smmu 0x820 0x402>; 126 reg = <0x0ae01000 0x8f000>, 127 <0x0aeb0000 0x2008>; 143 interrupts = <0>; 147 #size-cells = <0>; [all …]
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| H A D | qcom,sm8150-mdss.yaml | 48 "^display-controller@[0-9a-f]+$": 56 "^displayport-controller@[0-9a-f]+$": 65 "^dsi@[0-9a-f]+$": 75 "^phy@[0-9a-f]+$": 96 reg = <0x0ae00000 0x1000>; 115 iommus = <&apps_smmu 0x800 0x420>; 123 reg = <0x0ae01000 0x8f000>, 124 <0x0aeb0000 0x2008>; 140 interrupts = <0>; 144 #size-cells = <0>; [all …]
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| H A D | qcom,sm8450-mdss.yaml | 39 "^display-controller@[0-9a-f]+$": 47 "^displayport-controller@[0-9a-f]+$": 57 "^dsi@[0-9a-f]+$": 67 "^phy@[0-9a-f]+$": 91 reg = <0x0ae00000 0x1000>; 115 iommus = <&apps_smmu 0x2800 0x402>; 123 reg = <0x0ae01000 0x8f000>, 124 <0x0aeb0000 0x2008>; 147 interrupts = <0>; 151 #size-cells = <0>; [all …]
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| /linux/drivers/pinctrl/samsung/ |
| H A D | pinctrl-exynos-arm.c | 27 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 32 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 36 #define S5P_OTHERS 0xE000 43 #define S5P_PIN_PULL_DISABLE 0 86 clk_base = of_iomap(np, 0); in s5pv210_retention_init() 106 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), 107 EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04), 108 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), 109 EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), 110 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), [all …]
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| /linux/Documentation/sound/ |
| H A D | alsa-configuration.rst | 57 (0 = disable debug prints, 1 = normal debug messages, 71 Default: 0 80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped 81 to PCM #0 of the card #0. 83 commas, such like ``dsp_map=0,1``. 98 Default: 0 119 Values: 0 through 31 or negative; 142 appearing card. They can do it by specifying "index=1,0" module 158 the port must be specified. For actual AdLib FM cards it will be 0x388. 170 64:0 OPL2 FM synth OPL2 FM Port [all …]
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| /linux/drivers/ufs/host/ |
| H A D | ufs-rockchip.h | 11 #define SEL_TX_LANE0 0x0 12 #define SEL_TX_LANE1 0x1 13 #define SEL_TX_LANE2 0x2 14 #define SEL_TX_LANE3 0x3 15 #define SEL_RX_LANE0 0x4 16 #define SEL_RX_LANE1 0x5 17 #define SEL_RX_LANE2 0x6 18 #define SEL_RX_LANE3 0x7 20 #define VND_TX_CLK_PRD 0xAA 21 #define VND_TX_CLK_PRD_EN 0xA9 [all …]
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| /linux/sound/isa/es1688/ |
| H A D | es1688.c | 31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 37 static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x220,0x240,0x260 */ 38 static long fm_port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* Usually 0x388 */ 39 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1}; 42 static int dma8[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0,1,3 */ 70 #define is_isapnp_selected(dev) 0 82 static const long possible_ports[] = {0x220, 0x240, 0x260}; in snd_es1688_legacy_create() 84 static const int possible_dmas[] = {1, 3, 0, -1}; in snd_es1688_legacy_create() 90 if (irq[n] < 0) { in snd_es1688_legacy_create() 97 if (dma8[n] < 0) { in snd_es1688_legacy_create() [all …]
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| /linux/Documentation/sound/cards/ |
| H A D | multisound.sh | 77 # 0x250, 0x260 or 0x270. This port can be disabled to have the card 96 # to obtain one with the command `pnpdump 1 0x203' -- this may vary 107 # io base 0x210, irq 5 and mem 0xd8000, and also sets the Kurzweil 108 # synth to 0x330 and irq 9 (may need editing for your system): 110 # (READPORT 0x0203) 115 # (CONFIGURE BVJ0440/-1 (LD 0 116 # (INT 0 (IRQ 5 (MODE +E))) (IO 0 (BASE 0x0210)) (MEM 0 (BASE 0x0d8000)) 121 # (IO 0 (BASE 0x0330)) (INT 0 (IRQ 9 (MODE +E))) 140 # If you specify cfg=0x250 for the snd-msnd-pinnacle module, it 143 # on the card to 0x250, 0x260 or 0x270). [all …]
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-pic32.h | 12 #define ANSEL_REG 0x00 13 #define TRIS_REG 0x10 14 #define PORT_REG 0x20 15 #define LAT_REG 0x30 16 #define ODCU_REG 0x40 17 #define CNPU_REG 0x50 18 #define CNPD_REG 0x60 19 #define CNCON_REG 0x70 20 #define CNEN_REG 0x80 21 #define CNSTAT_REG 0x90 [all …]
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| /linux/drivers/devfreq/event/ |
| H A D | exynos-ppmu.h | 13 PPMU_DISABLE = 0, 18 PPMU_PMNCNT0 = 0, 30 PPMU_RO_BUSY_CYCLE_CNT = 0x0, 31 PPMU_WO_BUSY_CYCLE_CNT = 0x1, 32 PPMU_RW_BUSY_CYCLE_CNT = 0x2, 33 PPMU_RO_REQUEST_CNT = 0x3, 34 PPMU_WO_REQUEST_CNT = 0x4, 35 PPMU_RO_DATA_CNT = 0x5, 36 PPMU_WO_DATA_CNT = 0x6, 37 PPMU_RO_LATENCY = 0x12, [all …]
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| /linux/arch/arm/include/asm/ |
| H A D | v7m.h | 5 #define V7M_SCS_ICTR IOMEM(0xe000e004) 6 #define V7M_SCS_ICTR_INTLINESNUM_MASK 0x0000000f 8 #define BASEADDR_V7M_SCB IOMEM(0xe000ed00) 10 #define V7M_SCB_CPUID 0x00 12 #define V7M_SCB_ICSR 0x04 16 #define V7M_SCB_ICSR_VECTACTIVE 0x000001ff 18 #define V7M_SCB_VTOR 0x08 20 #define V7M_SCB_AIRCR 0x0c 21 #define V7M_SCB_AIRCR_VECTKEY (0x05fa << 16) 24 #define V7M_SCB_SCR 0x10 [all …]
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| /linux/fs/udf/ |
| H A D | udf_sb.h | 10 * Even UDF 2.6 media should have version <= 0x250 but apparently there are 11 * some broken filesystems with version set to 0x260. Accommodate those. 13 #define UDF_MAX_READ_VERSION 0x0260 14 #define UDF_MAX_WRITE_VERSION 0x0201 16 #define UDF_FLAG_USE_EXTENDED_FE 0 17 #define UDF_VERS_USE_EXTENDED_FE 0x0200 19 #define UDF_VERS_USE_STREAMS 0x0200 38 #define UDF_PART_FLAG_UNALLOC_BITMAP 0x0001 39 #define UDF_PART_FLAG_UNALLOC_TABLE 0x0002 40 #define UDF_PART_FLAG_READ_ONLY 0x0010 [all …]
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| /linux/tools/perf/arch/powerpc/util/ |
| H A D | book3s_hcalls.h | 9 {0x4, "H_REMOVE"}, \ 10 {0x8, "H_ENTER"}, \ 11 {0xc, "H_READ"}, \ 12 {0x10, "H_CLEAR_MOD"}, \ 13 {0x14, "H_CLEAR_REF"}, \ 14 {0x18, "H_PROTECT"}, \ 15 {0x1c, "H_GET_TCE"}, \ 16 {0x20, "H_PUT_TCE"}, \ 17 {0x24, "H_SET_SPRG0"}, \ 18 {0x28, "H_SET_DABR"}, \ [all …]
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imxrt1050-pinfunc.h | 10 #define IMX_PAD_SION 0x40000000 17 #define MXRT1050_IOMUXC_GPIO_EMC_00_SEMC_DA00 0x014 0x204 0x000 0x0 0x0 18 #define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXPWM4_PWM0_A 0x014 0x204 0x494 0x1 0x0 19 #define MXRT1050_IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x014 0x204 0x500 0x2 0x1 20 #define MXRT1050_IOMUXC_GPIO_EMC_00_XBAR_INOUT2 0x014 0x204 0x60C 0x3 0x0 21 #define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXIO1_D00 0x014 0x204 0x000 0x4 0x0 22 #define MXRT1050_IOMUXC_GPIO_EMC_00_GPIO4_IO00 0x014 0x204 0x000 0x5 0x0 24 #define MXRT1050_IOMUXC_GPIO_EMC_01_SEMC_DA01 0x018 0x208 0x000 0x0 0x0 25 #define MXRT1050_IOMUXC_GPIO_EMC_01_FLEXPWM4_PWM0_B 0x018 0x208 0x000 0x1 0x0 26 #define MXRT1050_IOMUXC_GPIO_EMC_01_LPSPI2_PCS0 0x018 0x208 0x4FC 0x2 0x1 [all …]
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| /linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3660.c | 14 { HI3660_CLKIN_SYS, "clkin_sys", NULL, 0, 19200000, }, 15 { HI3660_CLKIN_REF, "clkin_ref", NULL, 0, 32764, }, 16 { HI3660_CLK_FLL_SRC, "clk_fll_src", NULL, 0, 128000000, }, 17 { HI3660_CLK_PPLL0, "clk_ppll0", NULL, 0, 1600000000, }, 18 { HI3660_CLK_PPLL1, "clk_ppll1", NULL, 0, 1866000000, }, 19 { HI3660_CLK_PPLL2, "clk_ppll2", NULL, 0, 2880000000UL, }, 20 { HI3660_CLK_PPLL3, "clk_ppll3", NULL, 0, 1290000000, }, 21 { HI3660_CLK_SCPLL, "clk_scpll", NULL, 0, 245760000, }, 22 { HI3660_PCLK, "pclk", NULL, 0, 20000000, }, 23 { HI3660_CLK_UART0_DBG, "clk_uart0_dbg", NULL, 0, 19200000, }, [all …]
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