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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-pinctrl.h17 #define PULL_ENABLE (0 << PULLUDEN_SHIFT)
20 #define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
23 #define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
33 #define PIN_DEBOUNCE_DISABLE (0 << DEBOUNCE_SHIFT)
44 #define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
45 #define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
47 #define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
48 #define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
50 #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
51 #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
[all …]
/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Dk3.h23 #define PULL_ENABLE (0 << PULLUDEN_SHIFT)
26 #define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE)
29 #define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
39 #define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
40 #define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
42 #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
43 #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
45 #define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
46 #define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
48 #define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dsbc8548.dts20 reg = <0xe0000000 0x5000>;
23 ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
24 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
25 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
26 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
27 0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
30 flash@0,0 {
34 reg = <0x0 0x0 0x800000>;
37 partition@0 {
40 reg = <0x00000000 0x007a0000>;
[all …]
H A Dsbc8548-altflash.dts23 reg = <0xe0000000 0x5000>;
26 ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
27 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
28 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
29 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
30 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
32 flash@0,0 {
35 reg = <0x0 0x0 0x04000000>;
39 partition@0 {
42 reg = <0x00000000 0x03f00000>;
[all …]
/freebsd/contrib/bearssl/src/symcipher/
H A Dpoly1305_ctmul32.c43 * is extended to the 0..18 range. in poly1305_inner()
51 while (len > 0) { in poly1305_inner()
61 memset(tmp, 0, sizeof tmp); in poly1305_inner()
72 a[0] += v & 0x01FFF; in poly1305_inner()
76 a[1] += v & 0x01FFF; in poly1305_inner()
79 a[2] += v & 0x01FFF; in poly1305_inner()
83 a[3] += v & 0x01FFF; in poly1305_inner()
87 a[4] += v & 0x01FFF; in poly1305_inner()
90 a[5] += v & 0x01FFF; in poly1305_inner()
94 a[6] += v & 0x01FFF; in poly1305_inner()
[all …]
/freebsd/sys/arm/nvidia/drm2/
H A Dtegra_dc_reg.h37 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
38 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
40 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
42 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
43 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
44 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
45 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
46 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
47 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
48 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]
/freebsd/contrib/bearssl/src/ec/
H A Dec_p256_m15.c28 * If BR_NO_ARITH_SHIFT is undefined, or defined to 0, then we _assume_
55 acc = 0; in be8_to_le13()
56 acc_len = 0; in be8_to_le13()
57 while (len -- > 0) { in be8_to_le13()
61 *dst ++ = acc & 0x1FFF; in be8_to_le13()
80 acc = 0; in le13_to_be8()
81 acc_len = 0; in le13_to_be8()
82 while (len -- > 0) { in le13_to_be8()
104 cc = 0; in norm13()
105 for (u = 0; u < len; u ++) { in norm13()
[all …]
H A Dec_c25519_m15.c37 for (u = 0; u < 20; u ++) {
38 if (x[u] > 0x1FFF) {
40 for (u = 0; u < 20; u ++) {
47 memset(tmp, 0, sizeof tmp);
48 for (u = 0; u < 20; u ++) {
55 if (k != 0) {
73 * If BR_NO_ARITH_SHIFT is undefined, or defined to 0, then we _assume_
100 acc = 0; in le8_to_le13()
101 acc_len = 0; in le8_to_le13()
102 while (len -- > 0) { in le8_to_le13()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DPseudoProbe.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
27 enum class PseudoProbeReservedId { Invalid = 0, Last = Invalid };
29 enum class PseudoProbeType { Block = 0, IndirectCall, DirectCall };
32 Reserved = 0x1,
33 Sentinel = 0x2, // A place holder for split function entry address.
34 HasDiscriminator = 0x4, // for probes with a discriminator
45 // [2:0] - 0x7, this is reserved for regular discriminator,
58 assert(Index <= 0xFFFF && "Probe index too big to encode, exceeding 2^16"); in packProbeData()
59 assert(Type <= 0x3 && "Probe type too big to encode, exceeding 3"); in packProbeData()
60 assert(Flags <= 0x7); in packProbeData()
[all …]
/freebsd/tests/sys/netinet/
H A Dip_reass_test.c65 ip->ip_sum = 0; in update_cksum()
67 for (cksum = 0, i = 0; i < sizeof(*ip) / sizeof(*cksump); cksump++, i++) in update_cksum()
69 cksum = (cksum >> 16) + (cksum & 0xffff); in update_cksum()
85 memset(packet, 0, pktlen); in alloc_lopacket()
91 ip->ip_tos = 0; in alloc_lopacket()
93 ip->ip_id = 0; in alloc_lopacket()
94 ip->ip_off = 0; in alloc_lopacket()
97 ip->ip_sum = 0; in alloc_lopacket()
121 ATF_REQUIRE_MSG(n >= 0, "packet write failed: %s", strerror(errno)); in write_lopacket()
129 ts.tv_sec = 0; in write_lopacket()
[all …]
/freebsd/tests/sys/netinet6/frag6/
H A Dfrag6_07.py43 oip6 = sp.IPv6(src=args.src[0], dst=args.to[0])
49 # ICMP6_PARAMPROB_HEADER 0
50 if icmp6.code != 0:
62 oip6 = sp.IPv6(src=args.src[0], dst=args.to[0])
112 # R: ICMPv6 timeout (1st frag, off=0)
117 sp.IPv6(src=args.src[0], dst=args.to[0]) / \
118 sp.IPv6ExtHdrFragment(offset=0, m=1, id=7) / \
123 sp.IPv6(src=args.src[0], dst=args.to[0]) / \
124 sp.IPv6ExtHdrFragment(offset=0x1fff, m=1, id=7) / \
130 sp.sendp(ip6f01, iface=args.sendif[0], verbose=False)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dqcom,qfprom.yaml93 reg = <0 0x00784000 0 0x8ff>,
94 <0 0x00780000 0 0x7a0>,
95 <0 0x00782000 0 0x100>,
96 <0 0x00786000 0 0x1fff>;
105 reg = <0x25b 0x1>;
118 reg = <0 0x00784000 0 0x8ff>;
123 reg = <0x1eb 0x1>;
/freebsd/sys/powerpc/mpc85xx/
H A Dds1553_reg.h33 #define DS1553_NVRAM_SIZE 0x1ff0
34 #define DS1553_OFF_FLAGS 0x1ff0
35 #define DS1553_OFF_ALARM_SECONDS 0x1ff2
36 #define DS1553_OFF_ALARM_MINUTES 0x1ff3
37 #define DS1553_OFF_ALARM_HOURS 0x1ff4
38 #define DS1553_OFF_ALARM_DATE 0x1ff5
39 #define DS1553_OFF_INTERRUPTS 0x1ff6
40 #define DS1553_OFF_WATCHDOG 0x1ff7
41 #define DS1553_OFF_CONTROL 0x1ff8
42 #define DS1553_OFF_SECONDS 0x1ff9
[all …]
/freebsd/sys/i386/include/
H A Dsegments.h76 #define SEGEX_EXT 0x01 /* recursive or externally induced */
77 #define SEGEX_IDT 0x02 /* interrupt descriptor table */
78 #define SEGEX_TI 0x04 /* local descriptor table */
80 #define SEGEX_IDX(s) (((s)>>3)&0x1fff)
/freebsd/sbin/ipf/ipsend/
H A Dresend.c40 if (ip->ip_off & 0x3fff) in dumppacket()
41 printf("frag @%#x ", (ip->ip_off & 0x1fff) << 3); in dumppacket()
53 for (j = 0, i = 1; i < TH_FLAGS; i <<= 1, j++) in dumppacket()
79 if (fd < 0) in ip_resend()
98 while ((i = (*r->r_readip)(&mb, NULL, NULL)) > 0) in ip_resend()
132 return (0); in ip_resend()
/freebsd/contrib/tcpdump/
H A Dip.h54 #define IP_V(ip) ((GET_U_1((ip)->ip_vhl) & 0xf0) >> 4)
55 #define IP_HL(ip) (GET_U_1((ip)->ip_vhl) & 0x0f)
60 #define IP_DF 0x4000 /* don't fragment flag */
61 #define IP_MF 0x2000 /* more fragments flag */
62 #define IP_OFFMASK 0x1fff /* mask for fragmenting bits */
74 #define IPTOS_LOWDELAY 0x10
75 #define IPTOS_THROUGHPUT 0x08
76 #define IPTOS_RELIABILITY 0x04
81 #define IPTOS_PREC_NETCONTROL 0xe0
82 #define IPTOS_PREC_INTERNETCONTROL 0xc0
[all …]
/freebsd/sys/netinet/
H A Dip.h61 #define IP_RF 0x8000 /* reserved fragment flag */
62 #define IP_DF 0x4000 /* dont fragment flag */
63 #define IP_MF 0x2000 /* more fragments flag */
64 #define IP_OFFMASK 0x1fff /* mask for fragmenting bits */
76 #define IPTOS_LOWDELAY 0x10
77 #define IPTOS_THROUGHPUT 0x08
78 #define IPTOS_RELIABILITY 0x04
101 #define IPTOS_DSCP_CS0 0x00
102 #define IPTOS_DSCP_CS1 0x20
103 #define IPTOS_DSCP_AF11 0x28
[all …]
/freebsd/usr.sbin/bhyve/amd64/
H A Dpci_gvt-d-opregion.h41 /// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
43 /// Offset 0x0, Size 0x100
46 int8_t sign[0x10]; ///< Offset 0x00 OpRegion Signature
47 uint32_t size; ///< Offset 0x10 OpRegion Size
48 uint32_t over; ///< Offset 0x14 OpRegion Structure Version
49 uint8_t sver[0x20]; ///< Offset 0x18 System BIOS Build Version
50 uint8_t vver[0x10]; ///< Offset 0x38 Video BIOS Build Version
51 uint8_t gver[0x10]; ///< Offset 0x48 Graphic Driver Build Version
52 uint32_t mbox; ///< Offset 0x58 Supported Mailboxes
53 uint32_t dmod; ///< Offset 0x5C Driver Model
[all …]
/freebsd/sys/dev/usb/controller/
H A Dohci.h47 #define OHCI_PAGE_SIZE 0x1000
48 #define OHCI_PAGE(x) ((x) &~ 0xfff)
49 #define OHCI_PAGE_OFFSET(x) ((x) & 0xfff)
50 #define OHCI_PAGE_MASK(x) ((x) & 0xfff)
52 #if ((USB_PAGE_SIZE < OHCI_ED_ALIGN) || (OHCI_ED_ALIGN == 0) || \
53 (USB_PAGE_SIZE < OHCI_TD_ALIGN) || (OHCI_TD_ALIGN == 0) || \
54 (USB_PAGE_SIZE < OHCI_ITD_ALIGN) || (OHCI_ITD_ALIGN == 0) || \
55 (USB_PAGE_SIZE < OHCI_PAGE_SIZE) || (OHCI_PAGE_SIZE == 0))
76 #define OHCI_ED_GET_FA(s) ((s) & 0x7f)
77 #define OHCI_ED_ADDRMASK 0x0000007f
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_recv.c69 for (i = 0; i < 1000; i++) { in ar5210StopDmaReceive()
70 if ((OS_REG_READ(ah, AR_CR) & AR_CR_RXE) == 0) in ar5210StopDmaReceive()
76 ath_hal_printf(ah, "AR_CR=0x%x\n", OS_REG_READ(ah, AR_CR)); in ar5210StopDmaReceive()
77 ath_hal_printf(ah, "AR_DIAG_SW=0x%x\n", OS_REG_READ(ah, AR_DIAG_SW)); in ar5210StopDmaReceive()
103 * Set multicast filter 0 (lower 32-bits)
189 ads->ds_ctl0 = 0; in ar5210SetupRxDesc()
198 ads->ds_status0 = ads->ds_status1 = 0; in ar5210SetupRxDesc()
220 if ((ads->ds_status1 & AR_Done) == 0) in ar5210ProcRxDesc()
227 if ((ands->ds_status1 & AR_Done) == 0 && OS_REG_READ(ah, AR_RXDP) == pa) in ar5210ProcRxDesc()
236 now = (OS_REG_READ(ah, AR_TSF_L32) >> 10) & 0xffff; in ar5210ProcRxDesc()
[all …]
/freebsd/sys/dev/sound/pci/
H A Des137x.h34 #define ES1370_REG_CONTROL 0x00
35 #define ES1370_REG_STATUS 0x04
36 #define ES1370_REG_UART_DATA 0x08
37 #define ES1370_REG_UART_STATUS 0x09
38 #define ES1370_REG_UART_CONTROL 0x09
39 #define ES1370_REG_UART_TEST 0x0a
40 #define ES1370_REG_MEMPAGE 0x0c
41 #define ES1370_REG_CODEC 0x10
43 #define ES1370_REG_SERIAL_CONTROL 0x20
44 #define ES1370_REG_DAC1_SCOUNT 0x24
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-geam.dts19 reg = <0x80000000 0x08000000>;
24 pwms = <&pwm8 0 100000 0>;
25 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
90 pinctrl-0 = <&pinctrl_flexcan1>;
97 pinctrl-0 = <&pinctrl_flexcan2>;
104 pinctrl-0 = <&pinctrl_enet1>;
112 pinctrl-0 = <&pinctrl_enet2>;
119 #size-cells = <0>;
121 ethphy0: ethernet-phy@0 {
123 reg = <0>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMWinCOFFStreamer.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
127 if (Size / 4 > 0xffff) in emitARMWinCFIAllocStack()
129 else if (Size / 4 > 0x7f) in emitARMWinCFIAllocStack()
133 if (Size / 4 > 0xffff) in emitARMWinCFIAllocStack()
135 else if (Size / 4 > 0x3ff) in emitARMWinCFIAllocStack()
143 assert(Mask != 0); in emitARMWinCFISaveRegMask()
144 int Lr = (Mask & 0x4000) ? 1 : 0; in emitARMWinCFISaveRegMask()
145 Mask &= ~0x4000; in emitARMWinCFISaveRegMask()
147 assert((Mask & ~0x1fff) == 0); in emitARMWinCFISaveRegMask()
149 assert((Mask & ~0x00ff) == 0); in emitARMWinCFISaveRegMask()
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dpci.h10 #define MDIO_PG0_G1 0
14 #define RAC_CTRL_PPR 0x00
15 #define RAC_ANA03 0x03
17 #define RAC_ANA09 0x09
19 #define RAC_ANA0A 0x0A
21 #define RAC_ANA0C 0x0C
23 #define RAC_ANA0D 0x0D
25 #define RAC_ANA10 0x10
26 #define ADDR_SEL_PINOUT_DIS_VAL 0x3C4
28 #define RAC_REG_REV2 0x1
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