Lines Matching +full:0 +full:x1fff
19 reg = <0x80000000 0x08000000>;
24 pwms = <&pwm8 0 100000 0>;
25 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
90 pinctrl-0 = <&pinctrl_flexcan1>;
97 pinctrl-0 = <&pinctrl_flexcan2>;
104 pinctrl-0 = <&pinctrl_enet1>;
112 pinctrl-0 = <&pinctrl_enet2>;
119 #size-cells = <0>;
121 ethphy0: ethernet-phy@0 {
123 reg = <0>;
135 pinctrl-0 = <&pinctrl_gpmi_nand>;
143 pinctrl-0 = <&pinctrl_i2c1>;
148 reg = <0x0a>;
149 #sound-dai-cells = <0>;
160 pinctrl-0 = <&pinctrl_i2c2>;
166 pinctrl-0 = <&pinctrl_lcdif_dat
187 hsync-active = <0>;
188 vsync-active = <0>;
190 pixelclk-active = <0>;
198 pinctrl-0 = <&pinctrl_pwm8>;
204 pinctrl-0 = <&pinctrl_tsc>;
210 pinctrl-0 = <&pinctrl_sai2>;
215 measure-delay-time = <0x1ffff>;
216 pre-charge-time = <0x1fff>;
222 pinctrl-0 = <&pinctrl_uart1>;
228 pinctrl-0 = <&pinctrl_uart2>;
244 pinctrl-0 = <&pinctrl_usdhc1>;
256 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
257 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
258 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
259 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
260 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
261 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
262 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
268 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
269 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
270 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
271 MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
272 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
273 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
274 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
275 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
276 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
277 MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
283 MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
284 MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
290 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
291 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
297 MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
298 MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
299 MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
300 MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
301 MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
302 MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
303 MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
304 MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
305 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
306 MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
307 MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
308 MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
309 MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
310 MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
311 MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
317 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
318 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
324 MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
325 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
331 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
332 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
333 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
334 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
340 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
341 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
342 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
343 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
344 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
345 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
346 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
347 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
348 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
349 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
350 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
351 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
352 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
353 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
354 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
355 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
356 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
357 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
363 MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
369 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
370 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
371 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
372 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
378 MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
379 MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031
380 MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
381 MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
382 MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
388 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
389 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
395 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
396 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
397 MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
398 MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
404 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
405 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
406 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
407 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
408 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
409 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
415 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
416 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
417 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
418 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
419 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
420 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
426 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
427 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
428 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
429 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
430 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
431 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
437 MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
438 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
439 MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
440 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
441 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
442 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070