/linux/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_dump.h | 22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80 23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80 24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80 25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80 45 #define BNX2X_DUMP_VERSION 0x61111111 65 static const u32 page_vals_e2[] = {0, 128}; 68 {0x58000, 4608, DUMP_CHIP_E2, 0x30} 74 static const u32 page_vals_e3[] = {0, 128}; 77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30} 81 { 0x2000, 1, 0x1f, 0xfff}, [all …]
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H A D | bnx2x_self_test.c | 6 #define NA 0xCD 8 #define IDLE_CHK_E1 0x01 9 #define IDLE_CHK_E1H 0x02 10 #define IDLE_CHK_E2 0x04 11 #define IDLE_CHK_E3A0 0x08 12 #define IDLE_CHK_E3B0 0x10 118 /*line 2*/{(0x3), 1, 0x2114, 119 NA, 1, 0, pand_neq, 121 "PCIE: ucorr_err_status is not 0", 122 {NA, NA, 0x0FF010, 0, NA, NA} }, [all …]
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/linux/drivers/media/platform/verisilicon/ |
H A D | hantro_g2_regs.h | 22 #define G2_REG_VERSION G2_SWREG(0) 28 #define G2_REG_INTERRUPT_DEC_E BIT(0) 30 #define HEVC_DEC_MODE 0xc 31 #define VP9_DEC_MODE 0xd 33 #define BUS_WIDTH_32 0 38 #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) 39 #define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f) 40 #define g2_pic_swap G2_DEC_REG(2, 22, 0x1f) 41 #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf) 42 #define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f) [all …]
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H A D | hantro_g1_regs.h | 15 #define G1_REG_INTERRUPT 0x004 26 #define G1_REG_INTERRUPT_DEC_E BIT(0) 27 #define G1_REG_CONFIG 0x008 28 #define G1_REG_CONFIG_DEC_AXI_RD_ID(x) (((x) & 0xff) << 24) 37 #define G1_REG_CONFIG_DEC_LATENCY(x) (((x) & 0x3f) << 11) 41 #define G1_REG_CONFIG_PRIORITY_MODE(x) (((x) & 0x7) << 5) 45 #define G1_REG_CONFIG_DEC_MAX_BURST(x) (((x) & 0x1f) << 0) 46 #define G1_REG_DEC_CTRL0 0x00c 47 #define G1_REG_DEC_CTRL0_DEC_MODE(x) (((x) & 0xf) << 28) 70 #define G1_REG_DEC_CTRL0_DEC_AXI_WR_ID(x) (((x) & 0xff) << 0) [all …]
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H A D | rockchip_vpu2_regs.h | 13 #define VEPU_REG_VP8_QUT_1ST(i) (0x000 + ((i) * 0x24)) 14 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) 15 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) 16 #define VEPU_REG_VP8_QUT_2ND(i) (0x004 + ((i) * 0x24)) 17 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) 18 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) 19 #define VEPU_REG_VP8_QUT_3RD(i) (0x008 + ((i) * 0x24)) 20 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) 21 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) 22 #define VEPU_REG_VP8_QUT_4TH(i) (0x00c + ((i) * 0x24)) [all …]
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/linux/sound/soc/codecs/ |
H A D | es8326.c | 58 crosstalk_h &= 0x20; in es8326_crosstalk1_get() 59 crosstalk_l &= 0xf0; in es8326_crosstalk1_get() 61 ucontrol->value.integer.value[0] = crosstalk; in es8326_crosstalk1_get() 63 return 0; in es8326_crosstalk1_get() 74 crosstalk = ucontrol->value.integer.value[0]; in es8326_crosstalk1_set() 76 crosstalk_h = (crosstalk & 0x10) << 1; in es8326_crosstalk1_set() 77 crosstalk_l &= 0x0f; in es8326_crosstalk1_set() 78 crosstalk_l |= (crosstalk & 0x0f) << 4; in es8326_crosstalk1_set() 80 0x20, crosstalk_h); in es8326_crosstalk1_set() 83 return 0; in es8326_crosstalk1_set() [all …]
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H A D | da7218.h | 21 #define DA7218_SYSTEM_ACTIVE 0x0 22 #define DA7218_CIF_CTRL 0x1 23 #define DA7218_CHIP_ID1 0x4 24 #define DA7218_CHIP_ID2 0x5 25 #define DA7218_CHIP_REVISION 0x6 26 #define DA7218_SPARE1 0x7 27 #define DA7218_STATUS1 0x8 28 #define DA7218_SOFT_RESET 0x9 29 #define DA7218_SR 0xB 30 #define DA7218_PC_COUNT 0xC [all …]
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/linux/drivers/gpu/drm/panel/ |
H A D | panel-samsung-s6e8aa0.c | 34 #define PANELCTL_SS_1_800 (0 << 5) 41 #define PANELCTL_CLK1_000 (0 << 3) 43 #define PANELCTL_CLK2_CON_MASK (7 << 0) 44 #define PANELCTL_CLK2_000 (0 << 0) 45 #define PANELCTL_CLK2_001 (1 << 0) 48 #define PANELCTL_INT1_000 (0 << 3) 50 #define PANELCTL_INT2_CON_MASK (7 << 0) 51 #define PANELCTL_INT2_000 (0 << 0) 52 #define PANELCTL_INT2_001 (1 << 0) 55 #define PANELCTL_BICTL_000 (0 << 3) [all …]
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H A D | panel-jadard-jd9365da-h3.c | 48 #define JD9365DA_DCS_SWITCH_PAGE 0xe0 55 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93); in jadard_enable_standard_cmds() 56 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65); in jadard_enable_standard_cmds() 57 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8); in jadard_enable_standard_cmds() 58 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); in jadard_enable_standard_cmds() 112 gpiod_set_value(jadard->reset, 0); in jadard_prepare() 118 gpiod_set_value(jadard->reset, 0); in jadard_prepare() 125 return 0; in jadard_prepare() 136 gpiod_set_value(jadard->reset, 0); in jadard_unprepare() 144 return 0; in jadard_unprepare() [all …]
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H A D | panel-feixin-k101-im2ba02.c | 42 /* Switch to page 0 */ 43 { .data = { 0xE0, 0x00 } }, 46 { .data = { 0xE1, 0x93} }, 47 { .data = { 0xE2, 0x65 } }, 48 { .data = { 0xE3, 0xF8 } }, 50 /* Lane number, 0x02 - 3 lanes, 0x03 - 4 lanes */ 51 { .data = { 0x80, 0x03 } }, 54 { .data = { 0x70, 0x02 } }, 55 { .data = { 0x71, 0x23 } }, 56 { .data = { 0x72, 0x06 } }, [all …]
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/linux/sound/soc/amd/include/ |
H A D | acp_2_2_sh_mask.h | 27 #define ACP_DMA_CNTL_0__DMAChRst_MASK 0x1 28 #define ACP_DMA_CNTL_0__DMAChRst__SHIFT 0x0 29 #define ACP_DMA_CNTL_0__DMAChRun_MASK 0x2 30 #define ACP_DMA_CNTL_0__DMAChRun__SHIFT 0x1 31 #define ACP_DMA_CNTL_0__DMAChIOCEn_MASK 0x4 32 #define ACP_DMA_CNTL_0__DMAChIOCEn__SHIFT 0x2 33 #define ACP_DMA_CNTL_0__Circular_DMA_En_MASK 0x8 34 #define ACP_DMA_CNTL_0__Circular_DMA_En__SHIFT 0x3 35 #define ACP_DMA_CNTL_0__DMAChGracefulRstEn_MASK 0x10 36 #define ACP_DMA_CNTL_0__DMAChGracefulRstEn__SHIFT 0x4 [all …]
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/linux/drivers/media/platform/ti/vpe/ |
H A D | vpe_regs.h | 16 #define VPE_PID 0x0000 17 #define VPE_PID_MINOR_MASK 0x3f 18 #define VPE_PID_MINOR_SHIFT 0 19 #define VPE_PID_CUSTOM_MASK 0x03 21 #define VPE_PID_MAJOR_MASK 0x07 23 #define VPE_PID_RTL_MASK 0x1f 25 #define VPE_PID_FUNC_MASK 0xfff 27 #define VPE_PID_SCHEME_MASK 0x03 30 #define VPE_SYSCONFIG 0x0010 31 #define VPE_SYSCONFIG_IDLE_MASK 0x03 [all …]
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/linux/arch/powerpc/math-emu/ |
H A D | math.c | 29 void *op4) { return 0; } 80 #define OP31 0x1f /* 31 */ 81 #define LFS 0x30 /* 48 */ 82 #define LFSU 0x31 /* 49 */ 83 #define LFD 0x32 /* 50 */ 84 #define LFDU 0x33 /* 51 */ 85 #define STFS 0x34 /* 52 */ 86 #define STFSU 0x35 /* 53 */ 87 #define STFD 0x36 /* 54 */ 88 #define STFDU 0x37 /* 55 */ [all …]
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/linux/drivers/staging/sm750fb/ |
H A D | ddk750_reg.h | 6 #define DE_STATE1 0x100054 7 #define DE_STATE1_DE_ABORT BIT(0) 9 #define DE_STATE2 0x100058 14 #define SYSTEM_CTRL 0x000000 15 #define SYSTEM_CTRL_DPMS_MASK (0x3 << 30) 16 #define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30) 17 #define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30) 18 #define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30) 19 #define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30) 35 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4) [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/athub/ |
H A D | athub_2_0_0_sh_mask.h | 27 …S_CNTL__DISABLE_ATC__SHIFT 0x0 28 …S_CNTL__DISABLE_PRI__SHIFT 0x1 29 …S_CNTL__DISABLE_PASID__SHIFT 0x2 30 …S_CNTL__CREDITS_ATS_RPB__SHIFT 0x8 31 …_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14 32 …_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15 33 …_CNTL__TRANS_EXE_RETURN__SHIFT 0x16 34 …DISABLE_ATC_MASK 0x00000001L 35 …DISABLE_PRI_MASK 0x00000002L 36 …DISABLE_PASID_MASK 0x00000004L [all …]
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H A D | athub_2_1_0_sh_mask.h | 27 …ATS_MODE_CNTL__HOST_TRANS_ENABLE__SHIFT 0x0 28 …ATS_MODE_CNTL__CONSOLE_IOV_ENABLE__SHIFT 0x1 29 …_CNTL__HOST_TRANS_ENABLE_MASK 0x00000001L 30 …_CNTL__CONSOLE_IOV_ENABLE_MASK 0x00000002L 32 …SHARED_VIRT_RESET_REQ__VF__SHIFT 0x0 33 …HARED_VIRT_RESET_REQ__PF__SHIFT 0x1f 34 …IRT_RESET_REQ__VF_MASK 0x7FFFFFFFL 35 …IRT_RESET_REQ__PF_MASK 0x80000000L 37 …SHARED_ACTIVE_FCN_ID__VFID__SHIFT 0x0 38 …HARED_ACTIVE_FCN_ID__VF__SHIFT 0x1f [all …]
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H A D | athub_1_0_sh_mask.h | 27 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x0 28 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x1 29 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x2 30 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x8 31 #define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14 32 #define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15 33 #define ATC_ATS_CNTL__TRANS_EXE_RETURN__SHIFT 0x16 34 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 35 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 36 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L [all …]
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/linux/drivers/infiniband/hw/qib/ |
H A D | qib_7322_regs.h | 35 #define QIB_7322_Revision_OFFS 0x0 36 #define QIB_7322_Revision_DEF 0x0000000002010601 37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F 38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F 39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1 40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E 41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E 42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1 43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28 44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/umc/ |
H A D | umc_6_7_0_sh_mask.h | 29 …C_UMC0_MCUMC_STATUST0__ErrorCode__SHIFT 0x0 30 …_UMC0_MCUMC_STATUST0__ErrorCodeExt__SHIFT 0x10 31 …_UMC0_MCUMC_STATUST0__RESERV22__SHIFT 0x16 32 …_UMC0_MCUMC_STATUST0__AddrLsb__SHIFT 0x18 33 …_UMC0_MCUMC_STATUST0__RESERV30__SHIFT 0x1e 34 …_UMC0_MCUMC_STATUST0__ErrCoreId__SHIFT 0x20 35 …_UMC0_MCUMC_STATUST0__RESERV38__SHIFT 0x26 36 …_UMC0_MCUMC_STATUST0__Scrub__SHIFT 0x28 37 …_UMC0_MCUMC_STATUST0__RESERV41__SHIFT 0x29 38 …_UMC0_MCUMC_STATUST0__Poison__SHIFT 0x2b [all …]
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/linux/drivers/video/fbdev/sis/ |
H A D | oem300.h | 55 {0x08,0x08,0x08,0x08}, 56 {0x08,0x08,0x08,0x08}, 57 {0x08,0x08,0x08,0x08}, 58 {0x2c,0x2c,0x2c,0x2c}, 59 {0x08,0x08,0x08,0x08}, 60 {0x08,0x08,0x08,0x08}, 61 {0x08,0x08,0x08,0x08}, 62 {0x20,0x20,0x20,0x20} 67 {0x20,0x20,0x20,0x20}, 68 {0x20,0x20,0x20,0x20}, [all …]
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/linux/drivers/accel/habanalabs/gaudi2/ |
H A D | gaudi2_masks.h | 15 ((0xF << PDMA0_QM_GLBL_ERR_CFG_PQF_ERR_MSG_EN_SHIFT) | \ 16 (0x1F << PDMA0_QM_GLBL_ERR_CFG_CQF_ERR_MSG_EN_SHIFT) | \ 17 (0x1F << PDMA0_QM_GLBL_ERR_CFG_CP_ERR_MSG_EN_SHIFT)) 20 ((0xF << PDMA0_QM_GLBL_ERR_CFG_PQF_STOP_ON_ERR_SHIFT) | \ 21 (0x1F << PDMA0_QM_GLBL_ERR_CFG_CQF_STOP_ON_ERR_SHIFT) | \ 22 (0x1F << PDMA0_QM_GLBL_ERR_CFG_CP_STOP_ON_ERR_SHIFT) | \ 23 (0x1 << PDMA0_QM_GLBL_ERR_CFG_ARB_STOP_ON_ERR_SHIFT)) 26 (0x1 << PDMA0_QM_GLBL_ERR_CFG1_CQF_ERR_MSG_EN_SHIFT) 29 ((0x1 << PDMA0_QM_GLBL_ERR_CFG1_CQF_STOP_ON_ERR_SHIFT) | \ 30 (0x1 << PDMA0_QM_GLBL_ERR_CFG1_ARC_STOP_ON_ERR_SHIFT)) [all …]
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/linux/drivers/accel/habanalabs/include/gaudi/ |
H A D | gaudi_masks.h | 15 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \ 16 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \ 17 (FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0xF))) 20 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \ 21 (FIELD_PREP(DMA0_QM_GLBL_PROT_CQF_MASK, 0xF)) | \ 22 (FIELD_PREP(DMA0_QM_GLBL_PROT_CP_MASK, 0xF)) | \ 23 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1))) 26 (FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \ 27 (FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1))) 30 (FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \ [all …]
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/linux/drivers/media/dvb-frontends/ |
H A D | af9013_priv.h | 39 { 28800000, 8000000, { 0x02, 0x8a, 0x28, 0xa3, 0x05, 0x14, 40 0x51, 0x11, 0x00, 0xa2, 0x8f, 0x3d, 0x00, 0xa2, 0x8a, 41 0x29, 0x00, 0xa2, 0x85, 0x14, 0x01, 0x45, 0x14, 0x14 } }, 42 { 28800000, 7000000, { 0x02, 0x38, 0xe3, 0x8e, 0x04, 0x71, 43 0xc7, 0x07, 0x00, 0x8e, 0x3d, 0x55, 0x00, 0x8e, 0x38, 44 0xe4, 0x00, 0x8e, 0x34, 0x72, 0x01, 0x1c, 0x71, 0x32 } }, 45 { 28800000, 6000000, { 0x01, 0xe7, 0x9e, 0x7a, 0x03, 0xcf, 46 0x3c, 0x3d, 0x00, 0x79, 0xeb, 0x6e, 0x00, 0x79, 0xe7, 47 0x9e, 0x00, 0x79, 0xe3, 0xcf, 0x00, 0xf3, 0xcf, 0x0f } }, 49 { 20480000, 8000000, { 0x03, 0x92, 0x49, 0x26, 0x07, 0x24, [all …]
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/linux/drivers/net/wireless/broadcom/b43/ |
H A D | radio_2059.c | 17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 }, 18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 }, 19 { 0x188, 0x05 }, 61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 63 0x00, 0x00, 0x00, 0xd0, 0x00), 64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), 68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 70 0x00, 0x00, 0x00, 0xd0, 0x00), [all …]
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/linux/arch/powerpc/include/asm/ |
H A D | disassemble.h | 21 return (inst >> 1) & 0x3ff; in get_xop() 26 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_sprn() 31 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_dcrn() 36 return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0); in get_tmrn() 41 return (inst >> 21) & 0x1f; in get_rt() 46 return (inst >> 21) & 0x1f; in get_rs() 51 return (inst >> 16) & 0x1f; in get_ra() 56 return (inst >> 11) & 0x1f; in get_rb() 61 return inst & 0x1; in get_rc() 66 return (inst >> 11) & 0x1f; in get_ws() [all …]
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