18 	sign_extend32(((insn) & 0x3ffffff) << 2, 27)
21 	sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
24 	sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
27 	sign_extend32(((insn >> 5) & 0x3fff) << 2, 15)
30 	sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
54 	int xn = opcode & 0x1f;  in check_cbz()
57 	    (get_x_reg(regs, xn) == 0) : (get_w_reg(regs, xn) == 0);  in check_cbz()
62 	int xn = opcode & 0x1f;  in check_cbnz()
65 	    (get_x_reg(regs, xn) != 0) : (get_w_reg(regs, xn) != 0);  in check_cbnz()
70 	int xn = opcode & 0x1f;  in check_tbz()
71 	int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);  in check_tbz()
73 	return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) == 0;  in check_tbz()
78 	int xn = opcode & 0x1f;  in check_tbnz()
79 	int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);  in check_tbnz()
81 	return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) != 0;  in check_tbnz()
92 	xn = opcode & 0x1f;  in simulate_adr_adrp()
93 	imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);  in simulate_adr_adrp()
95 	if (opcode & 0x80000000)  in simulate_adr_adrp()
96 		val = (imm<<12) + (addr & 0xfffffffffffff000);  in simulate_adr_adrp()
122 	if (aarch32_opcode_cond_checks[opcode & 0xf](regs->pstate & 0xffffffff))  in simulate_b_cond()
131 	int xn = (opcode >> 5) & 0x1f;  in simulate_br_blr_ret()
137 	if (((opcode >> 21) & 0x3) == 1)  in simulate_br_blr_ret()
175 	int xn = opcode & 0x1f;  in simulate_ldr_literal()
191 	int xn = opcode & 0x1f;  in simulate_ldrsw_literal()