xref: /linux/sound/soc/codecs/es8389.c (revision a9e6060bb2a6cae6d43a98ec0794844ad01273d3)
1*0319c268SZhang Yi // SPDX-License-Identifier: GPL-2.0-only
2*0319c268SZhang Yi /*
3*0319c268SZhang Yi  * es8389.c  --  ES8389 ALSA SoC Audio Codec
4*0319c268SZhang Yi  *
5*0319c268SZhang Yi  * Copyright Everest Semiconductor Co., Ltd
6*0319c268SZhang Yi  *
7*0319c268SZhang Yi  * Authors:  Michael Zhang (zhangyi@everest-semi.com)
8*0319c268SZhang Yi  *
9*0319c268SZhang Yi  * This program is free software; you can redistribute it and/or modify
10*0319c268SZhang Yi  * it under the terms of the GNU General Public License version 2 as
11*0319c268SZhang Yi  * published by the Free Software Foundation.
12*0319c268SZhang Yi  */
13*0319c268SZhang Yi 
14*0319c268SZhang Yi #include <linux/clk.h>
15*0319c268SZhang Yi #include <linux/module.h>
16*0319c268SZhang Yi #include <linux/kernel.h>
17*0319c268SZhang Yi #include <linux/delay.h>
18*0319c268SZhang Yi #include <linux/i2c.h>
19*0319c268SZhang Yi #include <linux/regmap.h>
20*0319c268SZhang Yi #include <sound/core.h>
21*0319c268SZhang Yi #include <sound/pcm.h>
22*0319c268SZhang Yi #include <sound/pcm_params.h>
23*0319c268SZhang Yi #include <sound/tlv.h>
24*0319c268SZhang Yi #include <sound/soc.h>
25*0319c268SZhang Yi 
26*0319c268SZhang Yi #include "es8389.h"
27*0319c268SZhang Yi 
28*0319c268SZhang Yi 
29*0319c268SZhang Yi /* codec private data */
30*0319c268SZhang Yi 
31*0319c268SZhang Yi struct	es8389_private {
32*0319c268SZhang Yi 	struct regmap *regmap;
33*0319c268SZhang Yi 	struct clk *mclk;
34*0319c268SZhang Yi 	unsigned int sysclk;
35*0319c268SZhang Yi 	int mastermode;
36*0319c268SZhang Yi 
37*0319c268SZhang Yi 	u8 mclk_src;
38*0319c268SZhang Yi 	enum snd_soc_bias_level bias_level;
39*0319c268SZhang Yi };
40*0319c268SZhang Yi 
es8389_volatile_register(struct device * dev,unsigned int reg)41*0319c268SZhang Yi static bool es8389_volatile_register(struct device *dev,
42*0319c268SZhang Yi 			unsigned int reg)
43*0319c268SZhang Yi {
44*0319c268SZhang Yi 	if ((reg  <= 0xff))
45*0319c268SZhang Yi 		return true;
46*0319c268SZhang Yi 	else
47*0319c268SZhang Yi 		return false;
48*0319c268SZhang Yi }
49*0319c268SZhang Yi 
50*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
51*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
52*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, 0, 300, 0);
53*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(mix_vol_tlv, -9500, 100, 0);
54*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -3200, 200, 0);
55*0319c268SZhang Yi static const DECLARE_TLV_DB_SCALE(alc_max_level, -3200, 200, 0);
56*0319c268SZhang Yi 
es8389_dmic_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)57*0319c268SZhang Yi static int es8389_dmic_set(struct snd_kcontrol *kcontrol,
58*0319c268SZhang Yi 	struct snd_ctl_elem_value *ucontrol)
59*0319c268SZhang Yi {
60*0319c268SZhang Yi 	struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
61*0319c268SZhang Yi 	struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
62*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
63*0319c268SZhang Yi 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
64*0319c268SZhang Yi 	unsigned int val;
65*0319c268SZhang Yi 	bool changed1, changed2;
66*0319c268SZhang Yi 
67*0319c268SZhang Yi 	val = ucontrol->value.integer.value[0];
68*0319c268SZhang Yi 	if (val > 1)
69*0319c268SZhang Yi 		return -EINVAL;
70*0319c268SZhang Yi 
71*0319c268SZhang Yi 	if (val) {
72*0319c268SZhang Yi 		regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0xC0, &changed1);
73*0319c268SZhang Yi 		regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x03, &changed2);
74*0319c268SZhang Yi 	} else {
75*0319c268SZhang Yi 		regmap_update_bits_check(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00, &changed1);
76*0319c268SZhang Yi 		regmap_update_bits_check(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00, &changed2);
77*0319c268SZhang Yi 	}
78*0319c268SZhang Yi 
79*0319c268SZhang Yi 	if (changed1 & changed2)
80*0319c268SZhang Yi 		return snd_soc_dapm_mux_update_power(dapm, kcontrol, val, e, NULL);
81*0319c268SZhang Yi 	else
82*0319c268SZhang Yi 		return 0;
83*0319c268SZhang Yi }
84*0319c268SZhang Yi 
85*0319c268SZhang Yi static const char *const alc[] = {
86*0319c268SZhang Yi 	"ALC OFF",
87*0319c268SZhang Yi 	"ADCR ALC ON",
88*0319c268SZhang Yi 	"ADCL ALC ON",
89*0319c268SZhang Yi 	"ADCL & ADCL ALC ON",
90*0319c268SZhang Yi };
91*0319c268SZhang Yi 
92*0319c268SZhang Yi static const char *const ramprate[] = {
93*0319c268SZhang Yi 	"0.125db/1  LRCK",
94*0319c268SZhang Yi 	"0.125db/4  LRCK",
95*0319c268SZhang Yi 	"0.125db/8  LRCK",
96*0319c268SZhang Yi 	"0.125db/16  LRCK",
97*0319c268SZhang Yi 	"0.125db/32  LRCK",
98*0319c268SZhang Yi 	"0.125db/64  LRCK",
99*0319c268SZhang Yi 	"0.125db/128  LRCK",
100*0319c268SZhang Yi 	"0.125db/256  LRCK",
101*0319c268SZhang Yi 	"0.125db/512  LRCK",
102*0319c268SZhang Yi 	"0.125db/1024  LRCK",
103*0319c268SZhang Yi 	"0.125db/2048  LRCK",
104*0319c268SZhang Yi 	"0.125db/4096  LRCK",
105*0319c268SZhang Yi 	"0.125db/8192  LRCK",
106*0319c268SZhang Yi 	"0.125db/16384  LRCK",
107*0319c268SZhang Yi 	"0.125db/32768  LRCK",
108*0319c268SZhang Yi 	"0.125db/65536  LRCK",
109*0319c268SZhang Yi };
110*0319c268SZhang Yi 
111*0319c268SZhang Yi static const char *const winsize[] = {
112*0319c268SZhang Yi 	"2 LRCK",
113*0319c268SZhang Yi 	"4  LRCK",
114*0319c268SZhang Yi 	"8  LRCK",
115*0319c268SZhang Yi 	"16  LRCK",
116*0319c268SZhang Yi 	"32  LRCK",
117*0319c268SZhang Yi 	"64  LRCK",
118*0319c268SZhang Yi 	"128  LRCK",
119*0319c268SZhang Yi 	"256  LRCK",
120*0319c268SZhang Yi 	"512  LRCK",
121*0319c268SZhang Yi 	"1024  LRCK",
122*0319c268SZhang Yi 	"2048  LRCK",
123*0319c268SZhang Yi 	"4096  LRCK",
124*0319c268SZhang Yi 	"8192  LRCK",
125*0319c268SZhang Yi 	"16384  LRCK",
126*0319c268SZhang Yi 	"32768  LRCK",
127*0319c268SZhang Yi 	"65536  LRCK",
128*0319c268SZhang Yi };
129*0319c268SZhang Yi 
130*0319c268SZhang Yi static const struct soc_enum alc_enable =
131*0319c268SZhang Yi 	SOC_ENUM_SINGLE(ES8389_ALC_ON, 5, 4, alc);
132*0319c268SZhang Yi static const struct soc_enum alc_ramprate =
133*0319c268SZhang Yi 	SOC_ENUM_SINGLE(ES8389_ALC_CTL, 4, 16, ramprate);
134*0319c268SZhang Yi static const struct soc_enum alc_winsize =
135*0319c268SZhang Yi 	SOC_ENUM_SINGLE(ES8389_ALC_CTL, 0, 16, winsize);
136*0319c268SZhang Yi 
137*0319c268SZhang Yi static const char *const es8389_outl_mux_txt[] = {
138*0319c268SZhang Yi 	"Normal",
139*0319c268SZhang Yi 	"DAC2 channel to DAC1 channel",
140*0319c268SZhang Yi };
141*0319c268SZhang Yi 
142*0319c268SZhang Yi static const char *const es8389_outr_mux_txt[] = {
143*0319c268SZhang Yi 	"Normal",
144*0319c268SZhang Yi 	"DAC1 channel to DAC2 channel",
145*0319c268SZhang Yi };
146*0319c268SZhang Yi 
147*0319c268SZhang Yi static const char *const es8389_dmic_mux_txt[] = {
148*0319c268SZhang Yi 	"AMIC",
149*0319c268SZhang Yi 	"DMIC",
150*0319c268SZhang Yi };
151*0319c268SZhang Yi 
152*0319c268SZhang Yi static const char *const es8389_pga1_texts[] = {
153*0319c268SZhang Yi 	"DifferentialL",  "Line 1P", "Line 2P"
154*0319c268SZhang Yi };
155*0319c268SZhang Yi 
156*0319c268SZhang Yi static const char *const es8389_pga2_texts[] = {
157*0319c268SZhang Yi 	"DifferentialR",  "Line 2N", "Line 1N"
158*0319c268SZhang Yi };
159*0319c268SZhang Yi 
160*0319c268SZhang Yi static const unsigned int es8389_pga_values[] = {
161*0319c268SZhang Yi 	1, 5, 6
162*0319c268SZhang Yi };
163*0319c268SZhang Yi 
164*0319c268SZhang Yi static const struct soc_enum es8389_outl_mux_enum =
165*0319c268SZhang Yi 	SOC_ENUM_SINGLE(ES8389_DAC_MIX, 5,
166*0319c268SZhang Yi 			ARRAY_SIZE(es8389_outl_mux_txt), es8389_outl_mux_txt);
167*0319c268SZhang Yi 
168*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_outl_mux_controls =
169*0319c268SZhang Yi 	SOC_DAPM_ENUM("OUTL MUX", es8389_outl_mux_enum);
170*0319c268SZhang Yi 
171*0319c268SZhang Yi static const struct soc_enum es8389_outr_mux_enum =
172*0319c268SZhang Yi 	SOC_ENUM_SINGLE(ES8389_DAC_MIX, 4,
173*0319c268SZhang Yi 			ARRAY_SIZE(es8389_outr_mux_txt), es8389_outr_mux_txt);
174*0319c268SZhang Yi 
175*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_outr_mux_controls =
176*0319c268SZhang Yi 	SOC_DAPM_ENUM("OUTR MUX", es8389_outr_mux_enum);
177*0319c268SZhang Yi 
178*0319c268SZhang Yi static SOC_ENUM_SINGLE_DECL(
179*0319c268SZhang Yi 	es8389_dmic_mux_enum, ES8389_DMIC_EN, 6, es8389_dmic_mux_txt);
180*0319c268SZhang Yi 
181*0319c268SZhang Yi static const struct soc_enum es8389_pgal_enum =
182*0319c268SZhang Yi 	SOC_VALUE_ENUM_SINGLE(ES8389_MIC1_GAIN, 4, 7,
183*0319c268SZhang Yi 			ARRAY_SIZE(es8389_pga1_texts), es8389_pga1_texts,
184*0319c268SZhang Yi 			es8389_pga_values);
185*0319c268SZhang Yi 
186*0319c268SZhang Yi static const struct soc_enum es8389_pgar_enum =
187*0319c268SZhang Yi 	SOC_VALUE_ENUM_SINGLE(ES8389_MIC2_GAIN, 4, 7,
188*0319c268SZhang Yi 			ARRAY_SIZE(es8389_pga2_texts), es8389_pga2_texts,
189*0319c268SZhang Yi 			es8389_pga_values);
190*0319c268SZhang Yi 
191*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_dmic_mux_controls =
192*0319c268SZhang Yi 	SOC_DAPM_ENUM_EXT("ADC MUX", es8389_dmic_mux_enum,
193*0319c268SZhang Yi 			snd_soc_dapm_get_enum_double, es8389_dmic_set);
194*0319c268SZhang Yi 
195*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_left_mixer_controls[] = {
196*0319c268SZhang Yi 	SOC_DAPM_SINGLE("DACR DACL Mixer", ES8389_DAC_MIX, 3, 1, 0),
197*0319c268SZhang Yi };
198*0319c268SZhang Yi 
199*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_right_mixer_controls[] = {
200*0319c268SZhang Yi 	SOC_DAPM_SINGLE("DACL DACR Mixer", ES8389_DAC_MIX, 2, 1, 0),
201*0319c268SZhang Yi };
202*0319c268SZhang Yi 
203*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_leftadc_mixer_controls[] = {
204*0319c268SZhang Yi 	SOC_DAPM_SINGLE("ADCL DACL Mixer", ES8389_DAC_MIX, 1, 1, 0),
205*0319c268SZhang Yi };
206*0319c268SZhang Yi 
207*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_rightadc_mixer_controls[] = {
208*0319c268SZhang Yi 	SOC_DAPM_SINGLE("ADCR DACR Mixer", ES8389_DAC_MIX, 0, 1, 0),
209*0319c268SZhang Yi };
210*0319c268SZhang Yi 
211*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_adc_mixer_controls[] = {
212*0319c268SZhang Yi 	SOC_DAPM_SINGLE("DACL ADCL Mixer", ES8389_ADC_RESET, 7, 1, 0),
213*0319c268SZhang Yi 	SOC_DAPM_SINGLE("DACR ADCR Mixer", ES8389_ADC_RESET, 6, 1, 0),
214*0319c268SZhang Yi };
215*0319c268SZhang Yi 
216*0319c268SZhang Yi static const struct snd_kcontrol_new es8389_snd_controls[] = {
217*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADCL Capture Volume", ES8389_ADCL_VOL, 0, 0xFF, 0, adc_vol_tlv),
218*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADCR Capture Volume", ES8389_ADCR_VOL, 0, 0xFF, 0, adc_vol_tlv),
219*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADCL PGA Volume", ES8389_MIC1_GAIN, 0, 0x0E, 0, pga_vol_tlv),
220*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADCR PGA Volume", ES8389_MIC2_GAIN, 0, 0x0E, 0, pga_vol_tlv),
221*0319c268SZhang Yi 
222*0319c268SZhang Yi 	SOC_ENUM("PGAL Select", es8389_pgal_enum),
223*0319c268SZhang Yi 	SOC_ENUM("PGAR Select", es8389_pgar_enum),
224*0319c268SZhang Yi 	SOC_ENUM("ALC Capture Switch", alc_enable),
225*0319c268SZhang Yi 	SOC_SINGLE_TLV("ALC Capture Target Level", ES8389_ALC_TARGET,
226*0319c268SZhang Yi 			0, 0x0f, 0, alc_target_tlv),
227*0319c268SZhang Yi 	SOC_SINGLE_TLV("ALC Capture Max Gain", ES8389_ALC_GAIN,
228*0319c268SZhang Yi 			0, 0x0f, 0, alc_max_level),
229*0319c268SZhang Yi 	SOC_ENUM("ADC Ramp Rate", alc_ramprate),
230*0319c268SZhang Yi 	SOC_ENUM("ALC Capture Winsize", alc_winsize),
231*0319c268SZhang Yi 	SOC_DOUBLE("ADC OSR Volume ON Switch", ES8389_ADC_MUTE, 6, 7, 1, 0),
232*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADC OSR Volume", ES8389_OSR_VOL, 0, 0xFF, 0, adc_vol_tlv),
233*0319c268SZhang Yi 	SOC_DOUBLE("ADC OUTPUT Invert Switch", ES8389_ADC_HPF2, 5, 6, 1, 0),
234*0319c268SZhang Yi 
235*0319c268SZhang Yi 	SOC_SINGLE_TLV("DACL Playback Volume", ES8389_DACL_VOL, 0, 0xFF, 0, dac_vol_tlv),
236*0319c268SZhang Yi 	SOC_SINGLE_TLV("DACR Playback Volume", ES8389_DACR_VOL, 0, 0xFF, 0, dac_vol_tlv),
237*0319c268SZhang Yi 	SOC_DOUBLE("DAC OUTPUT Invert Switch", ES8389_DAC_INV, 5, 6, 1, 0),
238*0319c268SZhang Yi 	SOC_SINGLE_TLV("ADC2DAC Mixer Volume", ES8389_MIX_VOL, 0, 0x7F, 0, mix_vol_tlv),
239*0319c268SZhang Yi };
240*0319c268SZhang Yi 
241*0319c268SZhang Yi static const struct snd_soc_dapm_widget es8389_dapm_widgets[] = {
242*0319c268SZhang Yi 	/*Input Side*/
243*0319c268SZhang Yi 	SND_SOC_DAPM_INPUT("INPUT1"),
244*0319c268SZhang Yi 	SND_SOC_DAPM_INPUT("INPUT2"),
245*0319c268SZhang Yi 	SND_SOC_DAPM_INPUT("DMIC"),
246*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("PGAL", SND_SOC_NOPM, 4, 0, NULL, 0),
247*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("PGAR", SND_SOC_NOPM, 4, 0, NULL, 0),
248*0319c268SZhang Yi 
249*0319c268SZhang Yi 	/*ADCs*/
250*0319c268SZhang Yi 	SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 0, 0),
251*0319c268SZhang Yi 	SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0),
252*0319c268SZhang Yi 
253*0319c268SZhang Yi 	/* Audio Interface */
254*0319c268SZhang Yi 	SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S Capture", 0, SND_SOC_NOPM, 0, 0),
255*0319c268SZhang Yi 	SND_SOC_DAPM_AIF_IN("I2S IN", "I2S Playback", 0, SND_SOC_NOPM, 0, 0),
256*0319c268SZhang Yi 
257*0319c268SZhang Yi 	/*DACs*/
258*0319c268SZhang Yi 	SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0),
259*0319c268SZhang Yi 	SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0),
260*0319c268SZhang Yi 
261*0319c268SZhang Yi 	/*Output Side*/
262*0319c268SZhang Yi 	SND_SOC_DAPM_OUTPUT("HPOL"),
263*0319c268SZhang Yi 	SND_SOC_DAPM_OUTPUT("HPOR"),
264*0319c268SZhang Yi 
265*0319c268SZhang Yi 	/* Digital Interface */
266*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
267*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACL1", SND_SOC_NOPM, 0, 0, NULL, 0),
268*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACR1", SND_SOC_NOPM, 0, 0, NULL, 0),
269*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACL2", SND_SOC_NOPM, 0, 0, NULL, 0),
270*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACR2", SND_SOC_NOPM, 0, 0, NULL, 0),
271*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACL3", SND_SOC_NOPM, 0, 0, NULL, 0),
272*0319c268SZhang Yi 	SND_SOC_DAPM_PGA("IF DACR3", SND_SOC_NOPM, 0, 0, NULL, 0),
273*0319c268SZhang Yi 
274*0319c268SZhang Yi 	/* Digital Interface Select */
275*0319c268SZhang Yi 	SND_SOC_DAPM_MIXER("IF DACL Mixer", SND_SOC_NOPM, 0, 0,
276*0319c268SZhang Yi 			   &es8389_left_mixer_controls[0],
277*0319c268SZhang Yi 			   ARRAY_SIZE(es8389_left_mixer_controls)),
278*0319c268SZhang Yi 	SND_SOC_DAPM_MIXER("IF DACR Mixer", SND_SOC_NOPM, 0, 0,
279*0319c268SZhang Yi 			   &es8389_right_mixer_controls[0],
280*0319c268SZhang Yi 			   ARRAY_SIZE(es8389_right_mixer_controls)),
281*0319c268SZhang Yi 	SND_SOC_DAPM_MIXER("IF ADCDACL Mixer", SND_SOC_NOPM, 0, 0,
282*0319c268SZhang Yi 			   &es8389_leftadc_mixer_controls[0],
283*0319c268SZhang Yi 			   ARRAY_SIZE(es8389_leftadc_mixer_controls)),
284*0319c268SZhang Yi 	SND_SOC_DAPM_MIXER("IF ADCDACR Mixer", SND_SOC_NOPM, 0, 0,
285*0319c268SZhang Yi 			   &es8389_rightadc_mixer_controls[0],
286*0319c268SZhang Yi 			   ARRAY_SIZE(es8389_rightadc_mixer_controls)),
287*0319c268SZhang Yi 
288*0319c268SZhang Yi 	SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0,
289*0319c268SZhang Yi 			   &es8389_adc_mixer_controls[0],
290*0319c268SZhang Yi 			   ARRAY_SIZE(es8389_adc_mixer_controls)),
291*0319c268SZhang Yi 	SND_SOC_DAPM_MUX("ADC MUX", SND_SOC_NOPM, 0, 0, &es8389_dmic_mux_controls),
292*0319c268SZhang Yi 
293*0319c268SZhang Yi 	SND_SOC_DAPM_MUX("OUTL MUX", SND_SOC_NOPM, 0, 0, &es8389_outl_mux_controls),
294*0319c268SZhang Yi 	SND_SOC_DAPM_MUX("OUTR MUX", SND_SOC_NOPM, 0, 0, &es8389_outr_mux_controls),
295*0319c268SZhang Yi };
296*0319c268SZhang Yi 
297*0319c268SZhang Yi 
298*0319c268SZhang Yi static const struct snd_soc_dapm_route es8389_dapm_routes[] = {
299*0319c268SZhang Yi 	{"PGAL", NULL, "INPUT1"},
300*0319c268SZhang Yi 	{"PGAR", NULL, "INPUT2"},
301*0319c268SZhang Yi 
302*0319c268SZhang Yi 	{"ADCL", NULL, "PGAL"},
303*0319c268SZhang Yi 	{"ADCR", NULL, "PGAR"},
304*0319c268SZhang Yi 
305*0319c268SZhang Yi 	{"ADC Mixer", "DACL ADCL Mixer", "DACL"},
306*0319c268SZhang Yi 	{"ADC Mixer", "DACR ADCR Mixer", "DACR"},
307*0319c268SZhang Yi 	{"ADC Mixer", NULL, "ADCL"},
308*0319c268SZhang Yi 	{"ADC Mixer", NULL, "ADCR"},
309*0319c268SZhang Yi 
310*0319c268SZhang Yi 	{"ADC MUX", "AMIC", "ADC Mixer"},
311*0319c268SZhang Yi 	{"ADC MUX", "DMIC", "DMIC"},
312*0319c268SZhang Yi 
313*0319c268SZhang Yi 	{"I2S OUT", NULL, "ADC MUX"},
314*0319c268SZhang Yi 
315*0319c268SZhang Yi 	{"DACL", NULL, "I2S IN"},
316*0319c268SZhang Yi 	{"DACR", NULL, "I2S IN"},
317*0319c268SZhang Yi 
318*0319c268SZhang Yi 	{"IF DACL1", NULL, "DACL"},
319*0319c268SZhang Yi 	{"IF DACR1", NULL, "DACR"},
320*0319c268SZhang Yi 	{"IF DACL2", NULL, "DACL"},
321*0319c268SZhang Yi 	{"IF DACR2", NULL, "DACR"},
322*0319c268SZhang Yi 	{"IF DACL3", NULL, "DACL"},
323*0319c268SZhang Yi 	{"IF DACR3", NULL, "DACR"},
324*0319c268SZhang Yi 
325*0319c268SZhang Yi 	{"IF DACL Mixer", NULL, "IF DACL2"},
326*0319c268SZhang Yi 	{"IF DACL Mixer", "DACR DACL Mixer", "IF DACR1"},
327*0319c268SZhang Yi 	{"IF DACR Mixer", NULL, "IF DACR2"},
328*0319c268SZhang Yi 	{"IF DACR Mixer", "DACL DACR Mixer", "IF DACL1"},
329*0319c268SZhang Yi 
330*0319c268SZhang Yi 	{"IF ADCDACL Mixer", NULL, "IF DACL Mixer"},
331*0319c268SZhang Yi 	{"IF ADCDACL Mixer", "ADCL DACL Mixer", "IF DACL3"},
332*0319c268SZhang Yi 	{"IF ADCDACR Mixer", NULL, "IF DACR Mixer"},
333*0319c268SZhang Yi 	{"IF ADCDACR Mixer", "ADCR DACR Mixer", "IF DACR3"},
334*0319c268SZhang Yi 
335*0319c268SZhang Yi 	{"OUTL MUX", "Normal", "IF ADCDACL Mixer"},
336*0319c268SZhang Yi 	{"OUTL MUX", "DAC2 channel to DAC1 channel", "IF ADCDACR Mixer"},
337*0319c268SZhang Yi 	{"OUTR MUX", "Normal", "IF ADCDACR Mixer"},
338*0319c268SZhang Yi 	{"OUTR MUX", "DAC1 channel to DAC2 channel", "IF ADCDACL Mixer"},
339*0319c268SZhang Yi 
340*0319c268SZhang Yi 	{"HPOL", NULL, "OUTL MUX"},
341*0319c268SZhang Yi 	{"HPOR", NULL, "OUTR MUX"},
342*0319c268SZhang Yi 
343*0319c268SZhang Yi };
344*0319c268SZhang Yi 
345*0319c268SZhang Yi struct _coeff_div {
346*0319c268SZhang Yi 	u16 fs;
347*0319c268SZhang Yi 	u32 mclk;
348*0319c268SZhang Yi 	u32 rate;
349*0319c268SZhang Yi 	u8 Reg0x04;
350*0319c268SZhang Yi 	u8 Reg0x05;
351*0319c268SZhang Yi 	u8 Reg0x06;
352*0319c268SZhang Yi 	u8 Reg0x07;
353*0319c268SZhang Yi 	u8 Reg0x08;
354*0319c268SZhang Yi 	u8 Reg0x09;
355*0319c268SZhang Yi 	u8 Reg0x0A;
356*0319c268SZhang Yi 	u8 Reg0x0F;
357*0319c268SZhang Yi 	u8 Reg0x11;
358*0319c268SZhang Yi 	u8 Reg0x21;
359*0319c268SZhang Yi 	u8 Reg0x22;
360*0319c268SZhang Yi 	u8 Reg0x26;
361*0319c268SZhang Yi 	u8 Reg0x30;
362*0319c268SZhang Yi 	u8 Reg0x41;
363*0319c268SZhang Yi 	u8 Reg0x42;
364*0319c268SZhang Yi 	u8 Reg0x43;
365*0319c268SZhang Yi 	u8 Reg0xF0;
366*0319c268SZhang Yi 	u8 Reg0xF1;
367*0319c268SZhang Yi 	u8 Reg0x16;
368*0319c268SZhang Yi 	u8 Reg0x18;
369*0319c268SZhang Yi 	u8 Reg0x19;
370*0319c268SZhang Yi };
371*0319c268SZhang Yi 
372*0319c268SZhang Yi /* codec hifi mclk clock divider coefficients */
373*0319c268SZhang Yi static const struct _coeff_div  coeff_div[] = {
374*0319c268SZhang Yi 	{32, 256000, 8000, 0x00, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
375*0319c268SZhang Yi 	{36, 288000, 8000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
376*0319c268SZhang Yi 	{48, 384000, 8000, 0x02, 0x5F, 0x04, 0xC0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
377*0319c268SZhang Yi 	{64, 512000, 8000, 0x00, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
378*0319c268SZhang Yi 	{72, 576000, 8000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
379*0319c268SZhang Yi 	{96, 768000, 8000, 0x02, 0x57, 0x84, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
380*0319c268SZhang Yi 	{128, 1024000, 8000, 0x00, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
381*0319c268SZhang Yi 	{192, 1536000, 8000, 0x02, 0x4D, 0x24, 0xC0, 0x03, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
382*0319c268SZhang Yi 	{256, 2048000, 8000, 0x01, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
383*0319c268SZhang Yi 	{288, 2304000, 8000, 0x01, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
384*0319c268SZhang Yi 	{384, 3072000, 8000, 0x02, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
385*0319c268SZhang Yi 	{512, 4096000, 8000, 0x00, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
386*0319c268SZhang Yi 	{768, 6144000, 8000, 0x05, 0x45, 0x04, 0xD0, 0x03, 0xC1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
387*0319c268SZhang Yi 	{1024, 8192000, 8000, 0x01, 0x41, 0x06, 0xE0, 0x00, 0xD1, 0xB0, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
388*0319c268SZhang Yi 	{1536, 12288000, 8000, 0x02, 0x41, 0x04, 0xE0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
389*0319c268SZhang Yi 	{1625, 13000000, 8000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07},
390*0319c268SZhang Yi 	{2048, 16384000, 8000, 0x03, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
391*0319c268SZhang Yi 	{2304, 18432000, 8000, 0x11, 0x45, 0x25, 0xF0, 0x00, 0xD1, 0xB0, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
392*0319c268SZhang Yi 	{3072, 24576000, 8000, 0x05, 0x44, 0x01, 0xC0, 0x00, 0xD2, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
393*0319c268SZhang Yi 	{32, 512000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
394*0319c268SZhang Yi 	{36, 576000, 16000, 0x00, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E},
395*0319c268SZhang Yi 	{48, 768000, 16000, 0x02, 0x57, 0x04, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
396*0319c268SZhang Yi 	{50, 800000, 16000, 0x00, 0x7E, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
397*0319c268SZhang Yi 	{64, 1024000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
398*0319c268SZhang Yi 	{72, 1152000, 16000, 0x00, 0x45, 0x24, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E},
399*0319c268SZhang Yi 	{96, 1536000, 16000, 0x02, 0x55, 0x84, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
400*0319c268SZhang Yi 	{128, 2048000, 16000, 0x00, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
401*0319c268SZhang Yi 	{144, 2304000, 16000, 0x00, 0x51, 0x00, 0xC0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x23, 0x8F, 0xB7, 0xC0, 0x1F, 0x8F, 0x01, 0x12, 0x00, 0x12, 0x31, 0x0E},
402*0319c268SZhang Yi 	{192, 3072000, 16000, 0x02, 0x65, 0x25, 0xE0, 0x00, 0xE1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
403*0319c268SZhang Yi 	{256, 4096000, 16000, 0x00, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
404*0319c268SZhang Yi 	{300, 4800000, 16000, 0x02, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
405*0319c268SZhang Yi 	{384, 6144000, 16000, 0x02, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
406*0319c268SZhang Yi 	{512, 8192000, 16000, 0x01, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
407*0319c268SZhang Yi 	{750, 12000000, 16000, 0x0E, 0x7E, 0x01, 0xC9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
408*0319c268SZhang Yi 	{768, 12288000, 16000, 0x02, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
409*0319c268SZhang Yi 	{1024, 16384000, 16000, 0x03, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
410*0319c268SZhang Yi 	{1152, 18432000, 16000, 0x08, 0x51, 0x04, 0xD0, 0x01, 0xC1, 0x90, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
411*0319c268SZhang Yi 	{1200, 19200000, 16000, 0x0B, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
412*0319c268SZhang Yi 	{1500, 24000000, 16000, 0x0E, 0x26, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
413*0319c268SZhang Yi 	{1536, 24576000, 16000, 0x05, 0x41, 0x04, 0xC0, 0x01, 0xD1, 0x90, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0xFF, 0x7F, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
414*0319c268SZhang Yi 	{1625, 26000000, 16000, 0x40, 0x6E, 0x05, 0xC8, 0x01, 0xC2, 0x90, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x12, 0x31, 0x0E},
415*0319c268SZhang Yi 	{800, 19200000, 24000, 0x07, 0x66, 0x01, 0xD9, 0x00, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0xC7, 0x95, 0x00, 0x12, 0x00, 0x1A, 0x49, 0x14},
416*0319c268SZhang Yi 	{600, 19200000, 32000, 0x05, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x23, 0x61, 0x1B},
417*0319c268SZhang Yi 	{32, 1411200, 44100, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
418*0319c268SZhang Yi 	{64, 2822400, 44100, 0x00, 0x51, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
419*0319c268SZhang Yi 	{128, 5644800, 44100, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
420*0319c268SZhang Yi 	{256, 11289600, 44100, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
421*0319c268SZhang Yi 	{512, 22579200, 44100, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
422*0319c268SZhang Yi 	{32, 1536000, 48000, 0x00, 0x45, 0xA4, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
423*0319c268SZhang Yi 	{48, 2304000, 48000, 0x02, 0x55, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
424*0319c268SZhang Yi 	{50, 2400000, 48000, 0x00, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
425*0319c268SZhang Yi 	{64, 3072000, 48000, 0x00, 0x51, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
426*0319c268SZhang Yi 	{100, 4800000, 48000, 0x00, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
427*0319c268SZhang Yi 	{125, 6000000, 48000, 0x04, 0x6E, 0x05, 0xC8, 0x10, 0xC2, 0x80, 0x00, 0x01, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
428*0319c268SZhang Yi 	{128, 6144000, 48000, 0x00, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
429*0319c268SZhang Yi 	{200, 9600000, 48000, 0x01, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x00, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
430*0319c268SZhang Yi 	{250, 12000000, 48000, 0x04, 0x76, 0x01, 0xC8, 0x10, 0xC2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
431*0319c268SZhang Yi 	{256, 12288000, 48000, 0x01, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
432*0319c268SZhang Yi 	{384, 18432000, 48000, 0x02, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0x40, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
433*0319c268SZhang Yi 	{400, 19200000, 48000, 0x03, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0x40, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
434*0319c268SZhang Yi 	{500, 24000000, 48000, 0x04, 0x46, 0x01, 0xD8, 0x10, 0xD2, 0x80, 0xC0, 0x00, 0x18, 0x95, 0xD0, 0xC0, 0x63, 0x95, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
435*0319c268SZhang Yi 	{512, 24576000, 48000, 0x03, 0x41, 0x04, 0xD0, 0x10, 0xD1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
436*0319c268SZhang Yi 	{800, 38400000, 48000, 0x18, 0x45, 0x04, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x1F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x00, 0x12, 0x00, 0x35, 0x91, 0x28},
437*0319c268SZhang Yi 	{128, 11289600, 88200, 0x00, 0x50, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0x40, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x32, 0x89, 0x25},
438*0319c268SZhang Yi 	{64, 6144000, 96000, 0x00, 0x41, 0x00, 0xD0, 0x10, 0xD1, 0x80, 0x00, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28},
439*0319c268SZhang Yi 	{128, 12288000, 96000, 0x00, 0x50, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28},
440*0319c268SZhang Yi 	{256, 24576000, 96000, 0x00, 0x40, 0x00, 0xC0, 0x10, 0xC1, 0x80, 0xC0, 0x00, 0x9F, 0x7F, 0xBF, 0xC0, 0x7F, 0x7F, 0x80, 0x12, 0xC0, 0x35, 0x91, 0x28},
441*0319c268SZhang Yi 	{128, 24576000, 192000, 0x00, 0x50, 0x00, 0xC0, 0x18, 0xC1, 0x81, 0xC0, 0x00, 0x8F, 0x7F, 0xEF, 0xC0, 0x3F, 0x7F, 0x80, 0x12, 0xC0, 0x3F, 0xF9, 0x3F},
442*0319c268SZhang Yi 
443*0319c268SZhang Yi 	{50, 400000, 8000, 0x00, 0x75, 0x05, 0xC8, 0x01, 0xC1, 0x90, 0x10, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
444*0319c268SZhang Yi 	{600, 4800000, 8000, 0x05, 0x65, 0x25, 0xF9, 0x00, 0xD1, 0x90, 0x10, 0x00, 0x18, 0xC7, 0xD0, 0xC0, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
445*0319c268SZhang Yi 	{1500, 12000000, 8000, 0x0E, 0x25, 0x25, 0xE8, 0x00, 0xD1, 0x90, 0x40, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
446*0319c268SZhang Yi 	{2400, 19200000, 8000, 0x0B, 0x01, 0x00, 0xD0, 0x00, 0xD1, 0x80, 0x90, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07},
447*0319c268SZhang Yi 	{3000, 24000000, 8000, 0x0E, 0x24, 0x05, 0xD0, 0x00, 0xC2, 0x80, 0xC0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0x8F, 0xC7, 0x01, 0x12, 0x00, 0x09, 0x19, 0x07},
448*0319c268SZhang Yi 	{3250, 26000000, 8000, 0x40, 0x05, 0xA4, 0xC0, 0x00, 0xD1, 0x80, 0xD0, 0x00, 0x31, 0xC7, 0xC5, 0x00, 0xC7, 0xC7, 0x00, 0x12, 0x00, 0x09, 0x19, 0x07},
449*0319c268SZhang Yi };
450*0319c268SZhang Yi 
get_coeff(int mclk,int rate)451*0319c268SZhang Yi static inline int get_coeff(int mclk, int rate)
452*0319c268SZhang Yi {
453*0319c268SZhang Yi 	int i;
454*0319c268SZhang Yi 
455*0319c268SZhang Yi 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
456*0319c268SZhang Yi 		if (coeff_div[i].rate == rate &&  coeff_div[i].mclk == mclk)
457*0319c268SZhang Yi 			return i;
458*0319c268SZhang Yi 	}
459*0319c268SZhang Yi 	return -EINVAL;
460*0319c268SZhang Yi }
461*0319c268SZhang Yi 
462*0319c268SZhang Yi /*
463*0319c268SZhang Yi  * if PLL not be used, use internal clk1 for mclk,otherwise, use internal clk2 for PLL source.
464*0319c268SZhang Yi  */
es8389_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)465*0319c268SZhang Yi static int es8389_set_dai_sysclk(struct snd_soc_dai *dai,
466*0319c268SZhang Yi 			int clk_id, unsigned int freq, int dir)
467*0319c268SZhang Yi {
468*0319c268SZhang Yi 	struct snd_soc_component *component = dai->component;
469*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
470*0319c268SZhang Yi 
471*0319c268SZhang Yi 	es8389->sysclk = freq;
472*0319c268SZhang Yi 
473*0319c268SZhang Yi 	return 0;
474*0319c268SZhang Yi }
475*0319c268SZhang Yi 
es8389_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)476*0319c268SZhang Yi static int es8389_set_tdm_slot(struct snd_soc_dai *dai,
477*0319c268SZhang Yi 	unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
478*0319c268SZhang Yi {
479*0319c268SZhang Yi 	struct snd_soc_component *component = dai->component;
480*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
481*0319c268SZhang Yi 
482*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_PTDM_SLOT,
483*0319c268SZhang Yi 				ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT));
484*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_DAC_RAMP,
485*0319c268SZhang Yi 				ES8389_TDM_SLOT, (slots << ES8389_TDM_SHIFT));
486*0319c268SZhang Yi 
487*0319c268SZhang Yi 	return 0;
488*0319c268SZhang Yi }
489*0319c268SZhang Yi 
es8389_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)490*0319c268SZhang Yi static int es8389_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
491*0319c268SZhang Yi {
492*0319c268SZhang Yi 	struct snd_soc_component *component = dai->component;
493*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
494*0319c268SZhang Yi 	u8 state = 0;
495*0319c268SZhang Yi 
496*0319c268SZhang Yi 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
497*0319c268SZhang Yi 	case SND_SOC_DAIFMT_CBC_CFP:
498*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_MASTER_MODE,
499*0319c268SZhang Yi 				ES8389_MASTER_MODE_EN, ES8389_MASTER_MODE_EN);
500*0319c268SZhang Yi 		es8389->mastermode = 1;
501*0319c268SZhang Yi 		break;
502*0319c268SZhang Yi 	case SND_SOC_DAIFMT_CBC_CFC:
503*0319c268SZhang Yi 		es8389->mastermode = 0;
504*0319c268SZhang Yi 		break;
505*0319c268SZhang Yi 	default:
506*0319c268SZhang Yi 		return -EINVAL;
507*0319c268SZhang Yi 	}
508*0319c268SZhang Yi 
509*0319c268SZhang Yi 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
510*0319c268SZhang Yi 	case SND_SOC_DAIFMT_I2S:
511*0319c268SZhang Yi 		state |= ES8389_DAIFMT_I2S;
512*0319c268SZhang Yi 		break;
513*0319c268SZhang Yi 	case SND_SOC_DAIFMT_RIGHT_J:
514*0319c268SZhang Yi 		dev_err(component->dev, "component driver does not support right justified\n");
515*0319c268SZhang Yi 		return -EINVAL;
516*0319c268SZhang Yi 	case SND_SOC_DAIFMT_LEFT_J:
517*0319c268SZhang Yi 		state |= ES8389_DAIFMT_LEFT_J;
518*0319c268SZhang Yi 		break;
519*0319c268SZhang Yi 	case SND_SOC_DAIFMT_DSP_A:
520*0319c268SZhang Yi 		state |= ES8389_DAIFMT_DSP_A;
521*0319c268SZhang Yi 		break;
522*0319c268SZhang Yi 	case SND_SOC_DAIFMT_DSP_B:
523*0319c268SZhang Yi 		state |= ES8389_DAIFMT_DSP_B;
524*0319c268SZhang Yi 		break;
525*0319c268SZhang Yi 	default:
526*0319c268SZhang Yi 		break;
527*0319c268SZhang Yi 	}
528*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state);
529*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DAIFMT_MASK, state);
530*0319c268SZhang Yi 
531*0319c268SZhang Yi 	return 0;
532*0319c268SZhang Yi }
533*0319c268SZhang Yi 
es8389_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)534*0319c268SZhang Yi static int es8389_pcm_hw_params(struct snd_pcm_substream *substream,
535*0319c268SZhang Yi 			struct snd_pcm_hw_params *params,
536*0319c268SZhang Yi 			struct snd_soc_dai *dai)
537*0319c268SZhang Yi {
538*0319c268SZhang Yi 	struct snd_soc_component *component = dai->component;
539*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
540*0319c268SZhang Yi 	int coeff;
541*0319c268SZhang Yi 	u8 state = 0;
542*0319c268SZhang Yi 
543*0319c268SZhang Yi 	switch (params_format(params)) {
544*0319c268SZhang Yi 	case SNDRV_PCM_FORMAT_S16_LE:
545*0319c268SZhang Yi 		state |= ES8389_S16_LE;
546*0319c268SZhang Yi 		break;
547*0319c268SZhang Yi 	case SNDRV_PCM_FORMAT_S20_3LE:
548*0319c268SZhang Yi 		state |= ES8389_S20_3_LE;
549*0319c268SZhang Yi 		break;
550*0319c268SZhang Yi 	case SNDRV_PCM_FORMAT_S18_3LE:
551*0319c268SZhang Yi 		state |= ES8389_S18_LE;
552*0319c268SZhang Yi 		break;
553*0319c268SZhang Yi 	case SNDRV_PCM_FORMAT_S24_LE:
554*0319c268SZhang Yi 		state |= ES8389_S24_LE;
555*0319c268SZhang Yi 		break;
556*0319c268SZhang Yi 	case SNDRV_PCM_FORMAT_S32_LE:
557*0319c268SZhang Yi 		state |= ES8389_S32_LE;
558*0319c268SZhang Yi 		break;
559*0319c268SZhang Yi 	default:
560*0319c268SZhang Yi 		return -EINVAL;
561*0319c268SZhang Yi 	}
562*0319c268SZhang Yi 
563*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state);
564*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, ES8389_DATA_LEN_MASK, state);
565*0319c268SZhang Yi 
566*0319c268SZhang Yi 	if (es8389->mclk_src == ES8389_SCLK_PIN) {
567*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_MASTER_CLK,
568*0319c268SZhang Yi 					ES8389_MCLK_SOURCE, es8389->mclk_src);
569*0319c268SZhang Yi 		es8389->sysclk = params_channels(params) * params_width(params) * params_rate(params);
570*0319c268SZhang Yi 	}
571*0319c268SZhang Yi 
572*0319c268SZhang Yi 	coeff = get_coeff(es8389->sysclk, params_rate(params));
573*0319c268SZhang Yi 	if (coeff >= 0) {
574*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_DIV1, coeff_div[coeff].Reg0x04);
575*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_MUL, coeff_div[coeff].Reg0x05);
576*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_MUX1, coeff_div[coeff].Reg0x06);
577*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_MUX2, coeff_div[coeff].Reg0x07);
578*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_CTL1, coeff_div[coeff].Reg0x08);
579*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_CTL2, coeff_div[coeff].Reg0x09);
580*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_CTL3, coeff_div[coeff].Reg0x0A);
581*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_OSC_CLK,
582*0319c268SZhang Yi 						0xC0, coeff_div[coeff].Reg0x0F);
583*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_DIV2, coeff_div[coeff].Reg0x11);
584*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ADC_OSR, coeff_div[coeff].Reg0x21);
585*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ADC_DSP, coeff_div[coeff].Reg0x22);
586*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_OSR_VOL, coeff_div[coeff].Reg0x26);
587*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_SYSTEM30,
588*0319c268SZhang Yi 						0xC0, coeff_div[coeff].Reg0x30);
589*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, coeff_div[coeff].Reg0x41);
590*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, coeff_div[coeff].Reg0x42);
591*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_DAC_MISC,
592*0319c268SZhang Yi 						0x81, coeff_div[coeff].Reg0x43);
593*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_CHIP_MISC,
594*0319c268SZhang Yi 						0x72, coeff_div[coeff].Reg0xF0);
595*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CSM_STATE1, coeff_div[coeff].Reg0xF1);
596*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_SYSTEM16, coeff_div[coeff].Reg0x16);
597*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_SYSTEM18, coeff_div[coeff].Reg0x18);
598*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_SYSTEM19, coeff_div[coeff].Reg0x19);
599*0319c268SZhang Yi 	} else {
600*0319c268SZhang Yi 		dev_warn(component->dev, "Clock coefficients do not match");
601*0319c268SZhang Yi 	}
602*0319c268SZhang Yi 
603*0319c268SZhang Yi 	return 0;
604*0319c268SZhang Yi }
605*0319c268SZhang Yi 
es8389_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)606*0319c268SZhang Yi static int es8389_set_bias_level(struct snd_soc_component *component,
607*0319c268SZhang Yi 			enum snd_soc_bias_level level)
608*0319c268SZhang Yi {
609*0319c268SZhang Yi 	int ret;
610*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
611*0319c268SZhang Yi 
612*0319c268SZhang Yi 	switch (level) {
613*0319c268SZhang Yi 	case SND_SOC_BIAS_ON:
614*0319c268SZhang Yi 		ret = clk_prepare_enable(es8389->mclk);
615*0319c268SZhang Yi 		if (ret)
616*0319c268SZhang Yi 			return ret;
617*0319c268SZhang Yi 
618*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_HPSW, 0x20, 0x20);
619*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xD9);
620*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ADC_EN, 0x8F);
621*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xE4);
622*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_RESET, 0x01);
623*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC3);
624*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x0a);
625*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x0a);
626*0319c268SZhang Yi 		usleep_range(70000, 72000);
627*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_DAC_RESET, 0X00);
628*0319c268SZhang Yi 		break;
629*0319c268SZhang Yi 	case SND_SOC_BIAS_PREPARE:
630*0319c268SZhang Yi 		break;
631*0319c268SZhang Yi 	case SND_SOC_BIAS_STANDBY:
632*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF1, 0x0f, 0x04);
633*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_ADC_HPF2, 0x0f, 0x04);
634*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xD4);
635*0319c268SZhang Yi 		usleep_range(70000, 72000);
636*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x59);
637*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_ADC_EN, 0x00);
638*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0x00);
639*0319c268SZhang Yi 		regmap_write(es8389->regmap, ES8389_RESET, 0x7E);
640*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x80);
641*0319c268SZhang Yi 		usleep_range(8000, 8500);
642*0319c268SZhang Yi 		regmap_update_bits(es8389->regmap, ES8389_DAC_INV, 0x80, 0x00);
643*0319c268SZhang Yi 
644*0319c268SZhang Yi 		clk_disable_unprepare(es8389->mclk);
645*0319c268SZhang Yi 		break;
646*0319c268SZhang Yi 	case SND_SOC_BIAS_OFF:
647*0319c268SZhang Yi 		break;
648*0319c268SZhang Yi 	}
649*0319c268SZhang Yi 	return 0;
650*0319c268SZhang Yi }
651*0319c268SZhang Yi 
652*0319c268SZhang Yi 
653*0319c268SZhang Yi 
es8389_mute(struct snd_soc_dai * dai,int mute,int direction)654*0319c268SZhang Yi static int es8389_mute(struct snd_soc_dai *dai, int mute, int direction)
655*0319c268SZhang Yi {
656*0319c268SZhang Yi 	struct snd_soc_component *component = dai->component;
657*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
658*0319c268SZhang Yi 
659*0319c268SZhang Yi 	if (mute) {
660*0319c268SZhang Yi 		if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
661*0319c268SZhang Yi 			regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE,
662*0319c268SZhang Yi 						0x03, 0x03);
663*0319c268SZhang Yi 		} else {
664*0319c268SZhang Yi 			regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE,
665*0319c268SZhang Yi 						0x03, 0x03);
666*0319c268SZhang Yi 		}
667*0319c268SZhang Yi 	} else {
668*0319c268SZhang Yi 		if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
669*0319c268SZhang Yi 			regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE,
670*0319c268SZhang Yi 						0x03, 0x00);
671*0319c268SZhang Yi 		} else {
672*0319c268SZhang Yi 			regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE,
673*0319c268SZhang Yi 						0x03, 0x00);
674*0319c268SZhang Yi 		}
675*0319c268SZhang Yi 	}
676*0319c268SZhang Yi 
677*0319c268SZhang Yi 	return 0;
678*0319c268SZhang Yi }
679*0319c268SZhang Yi 
680*0319c268SZhang Yi #define es8389_RATES SNDRV_PCM_RATE_8000_96000
681*0319c268SZhang Yi 
682*0319c268SZhang Yi #define es8389_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
683*0319c268SZhang Yi 		SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
684*0319c268SZhang Yi 
685*0319c268SZhang Yi static const struct snd_soc_dai_ops es8389_ops = {
686*0319c268SZhang Yi 	.hw_params = es8389_pcm_hw_params,
687*0319c268SZhang Yi 	.set_fmt = es8389_set_dai_fmt,
688*0319c268SZhang Yi 	.set_sysclk = es8389_set_dai_sysclk,
689*0319c268SZhang Yi 	.set_tdm_slot = es8389_set_tdm_slot,
690*0319c268SZhang Yi 	.mute_stream = es8389_mute,
691*0319c268SZhang Yi };
692*0319c268SZhang Yi 
693*0319c268SZhang Yi static struct snd_soc_dai_driver es8389_dai = {
694*0319c268SZhang Yi 	.name = "ES8389 HiFi",
695*0319c268SZhang Yi 	.playback = {
696*0319c268SZhang Yi 		.stream_name = "Playback",
697*0319c268SZhang Yi 		.channels_min = 1,
698*0319c268SZhang Yi 		.channels_max = 2,
699*0319c268SZhang Yi 		.rates = es8389_RATES,
700*0319c268SZhang Yi 		.formats = es8389_FORMATS,
701*0319c268SZhang Yi 	},
702*0319c268SZhang Yi 	.capture = {
703*0319c268SZhang Yi 		.stream_name = "Capture",
704*0319c268SZhang Yi 		.channels_min = 1,
705*0319c268SZhang Yi 		.channels_max = 2,
706*0319c268SZhang Yi 		.rates = es8389_RATES,
707*0319c268SZhang Yi 		.formats = es8389_FORMATS,
708*0319c268SZhang Yi 	},
709*0319c268SZhang Yi 	.ops = &es8389_ops,
710*0319c268SZhang Yi 	.symmetric_rate = 1,
711*0319c268SZhang Yi };
712*0319c268SZhang Yi 
es8389_init(struct snd_soc_component * component)713*0319c268SZhang Yi static void es8389_init(struct snd_soc_component *component)
714*0319c268SZhang Yi {
715*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
716*0319c268SZhang Yi 
717*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x00);
718*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_RESET, 0x7E);
719*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0x38);
720*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_HPF1, 0x64);
721*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_HPF2, 0x04);
722*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_INV, 0x03);
723*0319c268SZhang Yi 
724*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_VMID, 0x2A);
725*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0xC9);
726*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ANA_VSEL, 0x4F);
727*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ANA_CTL2, 0x06);
728*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_LOW_POWER1, 0x00);
729*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DMIC_EN, 0x16);
730*0319c268SZhang Yi 
731*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_PGA_SW, 0xAA);
732*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MOD_SW1, 0x66);
733*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MOD_SW2, 0x99);
734*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_MODE, (0x00 | ES8389_TDM_MODE));
735*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_DMIC_EN, 0xC0, 0x00);
736*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_ADC_MODE, 0x03, 0x00);
737*0319c268SZhang Yi 
738*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_MIC1_GAIN,
739*0319c268SZhang Yi 					ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT);
740*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_MIC2_GAIN,
741*0319c268SZhang Yi 					ES8389_MIC_SEL_MASK, ES8389_MIC_DEFAULT);
742*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xC4);
743*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x08);
744*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_STATE1, 0x00);
745*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM12, 0x01);
746*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM13, 0x01);
747*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM14, 0x01);
748*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM15, 0x01);
749*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM16, 0x35);
750*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM17, 0x09);
751*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM18, 0x91);
752*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM19, 0x28);
753*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM1A, 0x01);
754*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM1B, 0x01);
755*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM1C, 0x11);
756*0319c268SZhang Yi 
757*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CHIP_MISC, 0x13);
758*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MASTER_CLK, 0x00);
759*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_DIV1, 0x00);
760*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_MUL, 0x10);
761*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_MUX1, 0x00);
762*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_MUX2, 0xC0);
763*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_CTL1, 0x00);
764*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_CTL2, 0xC0);
765*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_CTL3, 0x80);
766*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SCLK_DIV, 0x04);
767*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_LRCK_DIV1, 0x01);
768*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_LRCK_DIV2, 0x00);
769*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_OSC_CLK, 0x00);
770*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_OSR, 0x1F);
771*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_DSP, 0x7F);
772*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ADC_MUTE, 0xC0);
773*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM30, 0xF4);
774*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_DSM_OSR, 0x7F);
775*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_DSP_OSR, 0x7F);
776*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_MISC, 0x10);
777*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_RAMP, 0x0F);
778*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_SYSTEM4C, 0xC0);
779*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
780*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CLK_OFF1, 0xC1);
781*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_RESET, 0x01);
782*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_DAC_RESET, 0x02);
783*0319c268SZhang Yi 
784*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_ADC_FORMAT_MUTE, 0x03, 0x03);
785*0319c268SZhang Yi 	regmap_update_bits(es8389->regmap, ES8389_DAC_FORMAT_MUTE, 0x03, 0x03);
786*0319c268SZhang Yi }
787*0319c268SZhang Yi 
es8389_suspend(struct snd_soc_component * component)788*0319c268SZhang Yi static int es8389_suspend(struct snd_soc_component *component)
789*0319c268SZhang Yi {
790*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
791*0319c268SZhang Yi 
792*0319c268SZhang Yi 	es8389_set_bias_level(component, SND_SOC_BIAS_STANDBY);
793*0319c268SZhang Yi 	regcache_cache_only(es8389->regmap, true);
794*0319c268SZhang Yi 	regcache_mark_dirty(es8389->regmap);
795*0319c268SZhang Yi 
796*0319c268SZhang Yi 	return 0;
797*0319c268SZhang Yi }
798*0319c268SZhang Yi 
es8389_resume(struct snd_soc_component * component)799*0319c268SZhang Yi static int es8389_resume(struct snd_soc_component *component)
800*0319c268SZhang Yi {
801*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
802*0319c268SZhang Yi 	unsigned int regv;
803*0319c268SZhang Yi 
804*0319c268SZhang Yi 	regcache_cache_only(es8389->regmap, false);
805*0319c268SZhang Yi 	regcache_cache_bypass(es8389->regmap, true);
806*0319c268SZhang Yi 	regmap_read(es8389->regmap, ES8389_RESET, &regv);
807*0319c268SZhang Yi 	regcache_cache_bypass(es8389->regmap, false);
808*0319c268SZhang Yi 
809*0319c268SZhang Yi 	if (regv == 0xff)
810*0319c268SZhang Yi 		es8389_init(component);
811*0319c268SZhang Yi 	else
812*0319c268SZhang Yi 		es8389_set_bias_level(component, SND_SOC_BIAS_ON);
813*0319c268SZhang Yi 
814*0319c268SZhang Yi 	regcache_sync(es8389->regmap);
815*0319c268SZhang Yi 
816*0319c268SZhang Yi 	return 0;
817*0319c268SZhang Yi }
818*0319c268SZhang Yi 
es8389_probe(struct snd_soc_component * component)819*0319c268SZhang Yi static int es8389_probe(struct snd_soc_component *component)
820*0319c268SZhang Yi {
821*0319c268SZhang Yi 	int ret;
822*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
823*0319c268SZhang Yi 
824*0319c268SZhang Yi 	ret = device_property_read_u8(component->dev, "everest,mclk-src", &es8389->mclk_src);
825*0319c268SZhang Yi 	if (ret != 0) {
826*0319c268SZhang Yi 		dev_dbg(component->dev, "mclk-src return %d", ret);
827*0319c268SZhang Yi 		es8389->mclk_src = ES8389_MCLK_SOURCE;
828*0319c268SZhang Yi 	}
829*0319c268SZhang Yi 
830*0319c268SZhang Yi 	es8389->mclk = devm_clk_get(component->dev, "mclk");
831*0319c268SZhang Yi 	if (IS_ERR(es8389->mclk))
832*0319c268SZhang Yi 		return dev_err_probe(component->dev, PTR_ERR(es8389->mclk),
833*0319c268SZhang Yi 			"ES8389 is unable to get mclk\n");
834*0319c268SZhang Yi 
835*0319c268SZhang Yi 	if (!es8389->mclk)
836*0319c268SZhang Yi 		dev_err(component->dev, "%s, assuming static mclk\n", __func__);
837*0319c268SZhang Yi 
838*0319c268SZhang Yi 	ret = clk_prepare_enable(es8389->mclk);
839*0319c268SZhang Yi 	if (ret) {
840*0319c268SZhang Yi 		dev_err(component->dev, "%s, unable to enable mclk\n", __func__);
841*0319c268SZhang Yi 		return ret;
842*0319c268SZhang Yi 	}
843*0319c268SZhang Yi 
844*0319c268SZhang Yi 	es8389_init(component);
845*0319c268SZhang Yi 	es8389_set_bias_level(component, SND_SOC_BIAS_STANDBY);
846*0319c268SZhang Yi 
847*0319c268SZhang Yi 	return 0;
848*0319c268SZhang Yi }
849*0319c268SZhang Yi 
es8389_remove(struct snd_soc_component * component)850*0319c268SZhang Yi static void es8389_remove(struct snd_soc_component *component)
851*0319c268SZhang Yi {
852*0319c268SZhang Yi 	struct es8389_private *es8389 = snd_soc_component_get_drvdata(component);
853*0319c268SZhang Yi 
854*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28);
855*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_HPSW, 0x00);
856*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_VMID, 0x00);
857*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
858*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC);
859*0319c268SZhang Yi 	usleep_range(500000, 550000);//500MS
860*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00);
861*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08);
862*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1);
863*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00);
864*0319c268SZhang Yi 
865*0319c268SZhang Yi }
866*0319c268SZhang Yi 
867*0319c268SZhang Yi static const struct snd_soc_component_driver soc_codec_dev_es8389 = {
868*0319c268SZhang Yi 	.probe = es8389_probe,
869*0319c268SZhang Yi 	.remove = es8389_remove,
870*0319c268SZhang Yi 	.suspend = es8389_suspend,
871*0319c268SZhang Yi 	.resume = es8389_resume,
872*0319c268SZhang Yi 	.set_bias_level = es8389_set_bias_level,
873*0319c268SZhang Yi 
874*0319c268SZhang Yi 	.controls = es8389_snd_controls,
875*0319c268SZhang Yi 	.num_controls = ARRAY_SIZE(es8389_snd_controls),
876*0319c268SZhang Yi 	.dapm_widgets = es8389_dapm_widgets,
877*0319c268SZhang Yi 	.num_dapm_widgets = ARRAY_SIZE(es8389_dapm_widgets),
878*0319c268SZhang Yi 	.dapm_routes = es8389_dapm_routes,
879*0319c268SZhang Yi 	.num_dapm_routes = ARRAY_SIZE(es8389_dapm_routes),
880*0319c268SZhang Yi 	.idle_bias_on = 1,
881*0319c268SZhang Yi 	.use_pmdown_time = 1,
882*0319c268SZhang Yi };
883*0319c268SZhang Yi 
884*0319c268SZhang Yi static const struct regmap_config es8389_regmap = {
885*0319c268SZhang Yi 	.reg_bits = 8,
886*0319c268SZhang Yi 	.val_bits = 8,
887*0319c268SZhang Yi 
888*0319c268SZhang Yi 	.max_register = ES8389_MAX_REGISTER,
889*0319c268SZhang Yi 
890*0319c268SZhang Yi 	.volatile_reg = es8389_volatile_register,
891*0319c268SZhang Yi 	.cache_type = REGCACHE_MAPLE,
892*0319c268SZhang Yi };
893*0319c268SZhang Yi 
es8389_i2c_shutdown(struct i2c_client * i2c)894*0319c268SZhang Yi static void es8389_i2c_shutdown(struct i2c_client *i2c)
895*0319c268SZhang Yi {
896*0319c268SZhang Yi 	struct es8389_private *es8389;
897*0319c268SZhang Yi 
898*0319c268SZhang Yi 	es8389 = i2c_get_clientdata(i2c);
899*0319c268SZhang Yi 
900*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_MASTER_MODE, 0x28);
901*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_HPSW, 0x00);
902*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_VMID, 0x00);
903*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_RESET, 0x00);
904*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0xCC);
905*0319c268SZhang Yi 	usleep_range(500000, 550000);//500MS
906*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_CSM_JUMP, 0x00);
907*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ANA_CTL1, 0x08);
908*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_ISO_CTL, 0xC1);
909*0319c268SZhang Yi 	regmap_write(es8389->regmap, ES8389_PULL_DOWN, 0x00);
910*0319c268SZhang Yi }
911*0319c268SZhang Yi 
es8389_i2c_probe(struct i2c_client * i2c_client)912*0319c268SZhang Yi static int es8389_i2c_probe(struct i2c_client *i2c_client)
913*0319c268SZhang Yi {
914*0319c268SZhang Yi 	struct es8389_private *es8389;
915*0319c268SZhang Yi 	int ret;
916*0319c268SZhang Yi 
917*0319c268SZhang Yi 	es8389 = devm_kzalloc(&i2c_client->dev, sizeof(*es8389), GFP_KERNEL);
918*0319c268SZhang Yi 	if (es8389 == NULL)
919*0319c268SZhang Yi 		return -ENOMEM;
920*0319c268SZhang Yi 
921*0319c268SZhang Yi 	i2c_set_clientdata(i2c_client, es8389);
922*0319c268SZhang Yi 	es8389->regmap = devm_regmap_init_i2c(i2c_client, &es8389_regmap);
923*0319c268SZhang Yi 	if (IS_ERR(es8389->regmap))
924*0319c268SZhang Yi 		return dev_err_probe(&i2c_client->dev, PTR_ERR(es8389->regmap),
925*0319c268SZhang Yi 			"regmap_init() failed\n");
926*0319c268SZhang Yi 
927*0319c268SZhang Yi 	ret =  devm_snd_soc_register_component(&i2c_client->dev,
928*0319c268SZhang Yi 			&soc_codec_dev_es8389,
929*0319c268SZhang Yi 			&es8389_dai,
930*0319c268SZhang Yi 			1);
931*0319c268SZhang Yi 
932*0319c268SZhang Yi 	return ret;
933*0319c268SZhang Yi }
934*0319c268SZhang Yi 
935*0319c268SZhang Yi #ifdef CONFIG_OF
936*0319c268SZhang Yi static const struct of_device_id es8389_if_dt_ids[] = {
937*0319c268SZhang Yi 	{ .compatible = "everest,es8389", },
938*0319c268SZhang Yi 	{ }
939*0319c268SZhang Yi };
940*0319c268SZhang Yi MODULE_DEVICE_TABLE(of, es8389_if_dt_ids);
941*0319c268SZhang Yi #endif
942*0319c268SZhang Yi 
943*0319c268SZhang Yi static const struct i2c_device_id es8389_i2c_id[] = {
944*0319c268SZhang Yi 	{"es8389"},
945*0319c268SZhang Yi 	{ }
946*0319c268SZhang Yi };
947*0319c268SZhang Yi MODULE_DEVICE_TABLE(i2c, es8389_i2c_id);
948*0319c268SZhang Yi 
949*0319c268SZhang Yi static struct i2c_driver es8389_i2c_driver = {
950*0319c268SZhang Yi 	.driver = {
951*0319c268SZhang Yi 		.name	= "es8389",
952*0319c268SZhang Yi 		.of_match_table = of_match_ptr(es8389_if_dt_ids),
953*0319c268SZhang Yi 	},
954*0319c268SZhang Yi 	.shutdown = es8389_i2c_shutdown,
955*0319c268SZhang Yi 	.probe = es8389_i2c_probe,
956*0319c268SZhang Yi 	.id_table = es8389_i2c_id,
957*0319c268SZhang Yi };
958*0319c268SZhang Yi module_i2c_driver(es8389_i2c_driver);
959*0319c268SZhang Yi 
960*0319c268SZhang Yi MODULE_DESCRIPTION("ASoC es8389 driver");
961*0319c268SZhang Yi MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>");
962*0319c268SZhang Yi MODULE_LICENSE("GPL");
963