Home
last modified time | relevance | path

Searched +full:0 +full:x1d4 (Results 1 – 25 of 126) sorted by relevance

123456

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-tqma8mpql.dtsi16 reg = <0x0 0x40000000 0 0x80000000>;
22 pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
27 states = <1800000 0x1>,
28 <3300000 0x0>;
44 pinctrl-0 = <&pinctrl_flexspi0>;
47 flash0: flash@0 {
48 reg = <0>;
66 pinctrl-0 = <&pinctrl_i2c1>;
74 reg = <0x1b>;
78 reg = <0x25>;
[all …]
H A Dimx8mm-evk.dts42 pinctrl-0 = <&pinctrl_flexspi>;
45 flash@0 {
46 reg = <0>;
60 pinctrl-0 = <&pinctrl_usdhc3>;
71 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
72 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
73 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
74 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
75 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
76 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
[all …]
H A Dimx8mm-nitrogen-r2.dts30 pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
57 pinctrl-0 = <&pinctrl_sound_wm8960>;
83 pinctrl-0 = <&pinctrl_ecspi2>;
90 pinctrl-0 = <&pinctrl_fec1>;
98 #size-cells = <0>;
110 pinctrl-0 = <&pinctrl_flexspi>;
117 pinctrl-0 = <&pinctrl_i2c1>;
122 reg = <0x8>;
214 pinctrl-0 = <&pinctrl_i2c3>;
219 reg = <0x70>;
[all …]
H A Dimx8mm-ucm-som.dtsi23 pwms = <&pwm2 0 3000000 0>;
24 brightness-levels = <0 255>;
33 pinctrl-0 = <&pinctrl_gpio_led>;
44 #clock-cells = <0>;
109 pinctrl-0 = <&pinctrl_fec1>;
117 #size-cells = <0>;
119 ethphy0: ethernet-phy@0 {
121 reg = <0>;
129 pinctrl-0 = <&pinctrl_i2c2>;
133 reg = <0x4b>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi13 pinctrl-0 = <&pinctrl_modem_regulator>;
61 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x4b>;
70 pinctrl-0 = <&pinctrl_pmic>;
187 pinctrl-0 = <&pinctrl_i2c2>;
196 pinctrl-0 = <&pinctrl_i2c3>;
204 fsl,tx-deemph-gen1 = <0x2d>;
205 fsl,tx-deemph-gen2 = <0xf>;
211 pinctrl-0 = <&pinctrl_pcie0>;
222 pinctrl-0 = <&pinctrl_uart1>;
[all …]
H A Dimx8mm-icore-mx8mm.dtsi30 pinctrl-0 = <&pinctrl_fec1>;
36 #size-cells = <0>;
50 pinctrl-0 = <&pinctrl_i2c1>;
55 reg = <0x08>;
148 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
149 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
150 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
151 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
152 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
153 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
[all …]
H A Dimx8mp-prt8ml.dts21 #clock-cells = <0>;
28 pinctrl-0 = <&pinctrl_pcie_refclk>;
30 #clock-cells = <0>;
66 pinctrl-0 = <&pinctrl_ecspi2>;
74 switch@0 {
76 reg = <0>;
85 #size-cells = <0>;
114 pinctrl-0 = <&pinctrl_fec>;
116 rx-internal-delay-ps = <0>;
117 tx-internal-delay-ps = <0>;
[all …]
H A Dimx8mm-beacon-som.dtsi17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
26 reg = <0x0 0x40000000 0 0x80000000>;
68 pinctrl-0 = <&pinctrl_fec1>;
76 #size-cells = <0>;
78 ethphy0: ethernet-phy@0 {
80 reg = <0>;
90 pinctrl-0 = <&pinctrl_flexspi>;
93 flash@0 {
94 reg = <0>;
107 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mn-beacon-som.dtsi18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
27 reg = <0x0 0x40000000 0 0x80000000>;
76 pinctrl-0 = <&pinctrl_fec1>;
86 #size-cells = <0>;
88 ethphy0: ethernet-phy@0 {
90 reg = <0>;
100 pinctrl-0 = <&pinctrl_flexspi>;
103 flash@0 {
104 reg = <0>;
117 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mm-prt8mm.dts22 reg = <0x0 0x40000000 0 0x40000000>;
28 pinctrl-0 = <&pinctrl_gpio_leds>;
32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
64 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x34>;
70 #sound-dai-cells = <0>;
77 pinctrl-0 = <&pinctrl_i2c2>;
82 reg = <0x60>;
83 regulator-name = "0V9_CORE";
94 pinctrl-0 = <&pinctrl_i2c3>;
[all …]
H A Dimx8mm-emcon.dtsi19 pinctrl-0 = <&pinctrl_gpio_led>;
38 pwms = <&pwm1 0 50000 0>;
40 0 4 8 16 32 64 80 96 112
68 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
76 pinctrl-0 = <&pinctrl_fec1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
88 reg = <0>;
97 pinctrl-0 = <&pinctrl_flexspi0>;
101 flash0: flash@0 {
[all …]
H A Dimx8mm-kontron-sl.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
61 pinctrl-0 = <&pinctrl_ecspi1>;
65 flash@0 {
68 reg = <0>;
75 partition@0 {
77 reg = <0x0 0x1e0000>;
82 reg = <0x1e0000 0x10000>;
87 reg = <0x1f0000 0x10000>;
96 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
[all …]
H A Dimx8mm-venice-gw7901.dts37 reg = <0x0 0x40000000 0 0x80000000>;
53 interrupts = <0>;
88 led-0 {
92 gpios = <&leds_gpio 0 GPIO_ACTIVE_HIGH>;
187 #clock-cells = <0>;
200 pinctrl-0 = <&pinctrl_reg_ioexp>;
213 pinctrl-0 = <&pinctrl_reg_isouart>;
225 pinctrl-0 = <&pinctrl_reg_usb2>;
236 pinctrl-0 = <&pinctrl_reg_wl>;
289 pinctrl-0 = <&pinctrl_spi1>;
[all …]
H A Dimx8mp-skov-reva.dtsi28 pinctrl-0 = <&pinctrl_backlight>;
29 pwms = <&pwm1 0 20000 0>;
32 brightness-levels = <0 255>;
41 pinctrl-0 = <&pinctrl_gpio_led>;
43 led-0 {
121 pinctrl-0 = <&pinctrl_reg24v>;
131 pinctrl-0 = <&pinctrl_can2rs>;
141 pinctrl-0 = <&pinctrl_canrs>;
149 pwms = <&pwm4 0 20000 0>;
161 pinctrl-0 = <&pinctrl_reg_vsd_3v3>;
[all …]
H A Dimx8mp-phycore-fpsc.dtsi20 reg = <0x0 0x40000000 0x0 0x80000000>;
26 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
61 pinctrl-0 = <&pinctrl_ecspi1>;
66 pinctrl-0 = <&pinctrl_ecspi2>;
71 pinctrl-0 = <&pinctrl_ecspi3>;
77 pinctrl-0 = <&pinctrl_eqos>;
84 pinctrl-0 = <&pinctrl_fec>;
91 #size-cells = <0>;
93 ethphy0: ethernet-phy@0 {
95 reg = <0>;
[all …]
H A Dimx8mp-msc-sm2s.dtsi25 pinctrl-0 = <&pinctrl_usb0_vbus>;
36 pinctrl-0 = <&pinctrl_usb1_vbus>;
46 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
70 lcd0_backlight: backlight-0 {
73 pinctrl-0 = <&pinctrl_lcd0_backlight>;
74 pwms = <&pwm1 0 100000 0>;
75 brightness-levels = <0 255>;
85 pinctrl-0 = <&pinctrl_lcd1_backlight>;
86 pwms = <&pwm2 0 100000 0>;
87 brightness-levels = <0 255>;
[all …]
H A Dimx8mm-venice-gw7903.dts32 reg = <0x0 0x40000000 0 0x80000000>;
48 interrupts = <0>;
76 pinctrl-0 = <&pinctrl_gpio_leds>;
78 led-0 {
177 #clock-cells = <0>;
228 pinctrl-0 = <&pinctrl_fec1>;
236 #size-cells = <0>;
238 ethphy0: ethernet-phy@0 {
240 reg = <0>;
271 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mm-venice-gw7904.dts30 reg = <0x0 0x40000000 0 0x80000000>;
36 key-0 {
46 interrupts = <0>;
74 pinctrl-0 = <&pinctrl_gpio_leds>;
76 led-0 {
80 gpios = <&gpioled 0 GPIO_ACTIVE_LOW>;
239 #clock-cells = <0>;
290 pinctrl-0 = <&pinctrl_fec1>;
298 #size-cells = <0>;
300 ethphy0: ethernet-phy@0 {
[all …]
H A Dimx8mm-venice-gw700x.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
35 interrupts = <0>;
106 pinctrl-0 = <&pinctrl_fec1>;
113 #size-cells = <0>;
115 ethphy0: ethernet-phy@0 {
117 reg = <0>;
126 #size-cells = <0>;
149 pinctrl-0 = <&pinctrl_i2c1>;
157 reg = <0x20>;
158 pinctrl-0 = <&pinctrl_gsc>;
[all …]
H A Dimx8mp-venice-gw702x.dtsi20 reg = <0x0 0x40000000 0 0x80000000>;
36 interrupts = <0>;
87 pinctrl-0 = <&pinctrl_eqos>;
95 #size-cells = <0>;
97 ethphy0: ethernet-phy@0 {
99 pinctrl-0 = <&pinctrl_ethphy0>;
101 reg = <0x0>;
112 #size-cells = <0>;
135 pinctrl-0 = <&pinctrl_i2c1>;
143 reg = <0x20>;
[all …]
H A Dimx8mm-data-modul-edm-sbc.dts28 reg = <0x0 0x40000000 0 0x40000000>;
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
37 enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
38 pwms = <&pwm1 0 5000000 0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
65 pinctrl-0 = <&pinctrl_panel_vcc_reg>;
69 gpio = <&gpio3 6 0>;
78 pinctrl-0 = <&pinctrl_usdhc2_vcc_reg>;
[all …]
H A Dimx8mn-venice-gw7902.dts31 reg = <0x0 0x40000000 0 0x80000000>;
36 #clock-cells = <0>;
54 interrupts = <0>;
89 pinctrl-0 = <&pinctrl_gpio_leds>;
91 led-0 {
135 pinctrl-0 = <&pinctrl_pps>;
151 pinctrl-0 = <&pinctrl_reg_usb1>;
162 pinctrl-0 = <&pinctrl_reg_wl>;
210 pinctrl-0 = <&pinctrl_spi1>;
214 can@0 {
[all …]
H A Dimx8mm-venice-gw7902.dts34 reg = <0x0 0x40000000 0 0x80000000>;
39 #clock-cells = <0>;
57 interrupts = <0>;
92 pinctrl-0 = <&pinctrl_gpio_leds>;
94 led-0 {
137 #clock-cells = <0>;
144 pinctrl-0 = <&pinctrl_pps>;
160 pinctrl-0 = <&pinctrl_reg_usb1>;
171 pinctrl-0 = <&pinctrl_reg_wl>;
219 pinctrl-0 = <&pinctrl_spi1>;
[all …]
H A Dimx8mp-venice-gw74xx.dts38 reg = <0x0 0x40000000 0 0x80000000>;
43 pinctrl-0 = <&pinctrl_usbcon1>;
59 key-0 {
69 interrupts = <0>;
104 pinctrl-0 = <&pinctrl_gpio_leds>;
106 led-0 {
124 #clock-cells = <0>;
131 pinctrl-0 = <&pinctrl_pps>;
137 pinctrl-0 = <&pinctrl_reg_usb2>;
149 pinctrl-0 = <&pinctrl_reg_can1>;
[all …]
/linux/include/dt-bindings/clock/
H A Ddm814.h8 #define DM814_CLKCTRL_OFFSET 0x0
12 #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58)
15 #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150)
16 #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154)
17 #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158)
18 #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c)
19 #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160)
20 #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164)
21 #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168)
22 #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c)
[all …]

123456