19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2fe4ec651STero Kristo /* 3fe4ec651STero Kristo * Copyright 2017 Texas Instruments, Inc. 4fe4ec651STero Kristo */ 5fe4ec651STero Kristo #ifndef __DT_BINDINGS_CLK_DM814_H 6fe4ec651STero Kristo #define __DT_BINDINGS_CLK_DM814_H 7fe4ec651STero Kristo 8fe4ec651STero Kristo #define DM814_CLKCTRL_OFFSET 0x0 9fe4ec651STero Kristo #define DM814_CLKCTRL_INDEX(offset) ((offset) - DM814_CLKCTRL_OFFSET) 10fe4ec651STero Kristo 11fe4ec651STero Kristo /* default clocks */ 12fe4ec651STero Kristo #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58) 13fe4ec651STero Kristo 14fe4ec651STero Kristo /* alwon clocks */ 15fe4ec651STero Kristo #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150) 16fe4ec651STero Kristo #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154) 17fe4ec651STero Kristo #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158) 18fe4ec651STero Kristo #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c) 19fe4ec651STero Kristo #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160) 20fe4ec651STero Kristo #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164) 21fe4ec651STero Kristo #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168) 22fe4ec651STero Kristo #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c) 23fe4ec651STero Kristo #define DM814_MCSPI1_CLKCTRL DM814_CLKCTRL_INDEX(0x190) 24fe4ec651STero Kristo #define DM814_GPMC_CLKCTRL DM814_CLKCTRL_INDEX(0x1d0) 25fe4ec651STero Kristo #define DM814_CPGMAC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1d4) 26fe4ec651STero Kristo #define DM814_MPU_CLKCTRL DM814_CLKCTRL_INDEX(0x1dc) 27fe4ec651STero Kristo #define DM814_RTC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f0) 28fe4ec651STero Kristo #define DM814_TPCC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f4) 29fe4ec651STero Kristo #define DM814_TPTC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1f8) 30fe4ec651STero Kristo #define DM814_TPTC1_CLKCTRL DM814_CLKCTRL_INDEX(0x1fc) 31fe4ec651STero Kristo #define DM814_TPTC2_CLKCTRL DM814_CLKCTRL_INDEX(0x200) 32fe4ec651STero Kristo #define DM814_TPTC3_CLKCTRL DM814_CLKCTRL_INDEX(0x204) 33fe4ec651STero Kristo #define DM814_MMC1_CLKCTRL DM814_CLKCTRL_INDEX(0x21c) 34fe4ec651STero Kristo #define DM814_MMC2_CLKCTRL DM814_CLKCTRL_INDEX(0x220) 35fe4ec651STero Kristo #define DM814_MMC3_CLKCTRL DM814_CLKCTRL_INDEX(0x224) 36fe4ec651STero Kristo 37*1bf4b15bSTony Lindgren /* alwon_ethernet clocks */ 38*1bf4b15bSTony Lindgren #define DM814_ETHERNET_CLKCTRL_OFFSET 0x1d4 39*1bf4b15bSTony Lindgren #define DM814_ETHERNET_CLKCTRL_INDEX(offset) ((offset) - DM814_ETHERNET_CLKCTRL_OFFSET) 40*1bf4b15bSTony Lindgren #define DM814_ETHERNET_CPGMAC0_CLKCTRL DM814_ETHERNET_CLKCTRL_INDEX(0x1d4) 41*1bf4b15bSTony Lindgren 42fe4ec651STero Kristo #endif 43