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/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_loongarch64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
65 // jirl ra, t0, 0 ; call the tracing hook in patchSled()
79 uint32_t LoTracingHookAddr = reinterpret_cast<int64_t>(TracingHook) & 0xfff; in patchSled()
81 (reinterpret_cast<int64_t>(TracingHook) >> 12) & 0xfffff; in patchSled()
83 (reinterpret_cast<int64_t>(TracingHook) >> 32) & 0xfffff; in patchSled()
85 (reinterpret_cast<int64_t>(TracingHook) >> 52) & 0xfff; in patchSled()
86 uint32_t LoFunctionID = FuncId & 0xfff; in patchSled()
87 uint32_t HiFunctionID = (FuncId >> 12) & 0xfffff; in patchSled()
88 Address[1] = encodeInstruction2RIx(0x29c00000, RegNum::RN_RA, RegNum::RN_SP, in patchSled()
89 0x8); // st.d ra, sp, 8 in patchSled()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dhisilicon,fmc-spi-nor.txt7 - size-cells : Should be 0.
16 #size-cells = <0>;
17 reg = <0x10000000 0x1000>, <0x14000000 0x1000000>;
20 flash@0 {
22 reg = <0>;
H A Dnxp-spifi.txt5 mode 0 or 3. The controller operates in either command or memory
25 - spi-cpol : Controller only supports mode 0 and 3 so either
37 reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
44 flash@0 {
52 partition@0 {
54 reg = <0 0x200000>;
/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,mmsys.txt29 reg = <0 0x14000000 0 0x1000>;
H A Dmediatek,mmsys.yaml18 pattern: "^syscon@[0-9a-f]+$"
110 reg = <0x14000000 0x1000>;
114 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
116 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,versatile-fpga-irq.txt18 the interrupts are valid. Unconnected/unused lines are set to 0, and
30 reg = <0x14000000 0x100>;
31 clear-mask = <0xffffffff>;
32 valid-mask = <0x003fffff>;
/freebsd/sys/arm64/arm64/
H A Dsdt_machdep.c31 (patchpoint & (INSN_SIZE - 1)) != 0 || in sdt_tracepoint_valid()
32 (target & (INSN_SIZE - 1)) != 0) in sdt_tracepoint_valid()
57 instr = (((target - patchpoint) >> 2) & 0x3fffffful) | 0x14000000; in sdt_tracepoint_patch()
74 instr = 0xd503201f; in sdt_tracepoint_restore()
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegrator.dtsi12 reg = <0x0 0x0>;
17 reg = <0x10000000 0x200>;
18 ranges = <0x0 0x10000000 0x200>;
23 led@c,0 {
25 reg = <0x0c 0x04>;
26 offset = <0x0c>;
27 mask = <0x01>;
36 reg = <0x12000000 0x100>;
40 reg = <0x13000000 0x100>;
46 reg = <0x13000100 0x100>;
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dxilinx13 0 beshort 0x0009
14 >2 belong =0x0ff00ff0
15 >>&0 belong =0x0ff00ff0
16 >>>&0 byte =0x00
17 >>>>&1 beshort =0x0001
20 >>>>>>&0 pstring/H x - from %s
24 >>>>>>>>&0 pstring/H x - for %s
28 >>>>>>>>>>&0 pstring/H x - built %s
32 >>>>>>>>>>>>&0 pstring/H x \b(%s)
36 >>>>>>>>>>>>>>&0 belong x - data length %#x
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8167.dtsi22 reg = <0 0x10000000 0 0x1000>;
28 reg = <0 0x10001000 0 0x1000>;
34 reg = <0 0x10018000 0 0x710>;
40 reg = <0 0x10006000 0 0x1000>;
45 #size-cells = <0>;
53 #power-domain-cells = <0>;
62 #power-domain-cells = <0>;
69 #power-domain-cells = <0>;
78 #size-cells = <0>;
85 #size-cells = <0>;
[all …]
H A Dmt6779.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x000>;
39 reg = <0x100>;
46 reg = <0x200>;
53 reg = <0x300>;
60 reg = <0x400>;
67 reg = <0x500>;
74 reg = <0x600>;
81 reg = <0x700>;
[all …]
/freebsd/contrib/llvm-project/lld/MachO/Arch/
H A DARM64_32.cpp4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
67 0x90000010, // 00: adrp x16, __la_symbol_ptr@page
68 0xb9400210, // 04: ldr w16, [x16, __la_symbol_ptr@pageoff]
69 0xd61f0200, // 08: br x16
78 0x90000011, // 00: adrp x17, _dyld_private@page
79 0x91000231, // 04: add x17, x17, _dyld_private@pageoff
80 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]!
81 0x90000010, // 0c: adrp x16, dyld_stub_binder@page
82 0xb9400210, // 10: ldr w16, [x16, dyld_stub_binder@pageoff]
83 0xd61f0200, // 14: br x16
[all …]
H A DARM64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
74 0x90000010, // 00: adrp x16, __la_symbol_ptr@page
75 0xf9400210, // 04: ldr x16, [x16, __la_symbol_ptr@pageoff]
76 0xd61f0200, // 08: br x16
85 0x90000011, // 00: adrp x17, _dyld_private@page
86 0x91000231, // 04: add x17, x17, _dyld_private@pageoff
87 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]!
88 0x90000010, // 0c: adrp x16, dyld_stub_binder@page
89 0xf9400210, // 10: ldr x16, [x16, dyld_stub_binder@pageoff]
90 0xd61f0200, // 14: br x16
[all …]
/freebsd/sys/contrib/device-tree/src/mips/img/
H A Dboston.dts24 #size-cells = <0>;
26 cpu@0 {
29 reg = <0>;
34 memory@0 {
36 reg = <0x00000000 0x10000000>;
42 reg = <0x10000000 0x2000000>;
51 ranges = <0x02000000 0 0x40000000
52 0x40000000 0 0x40000000>;
54 bus-range = <0x00 0xff>;
56 interrupt-map-mask = <0 0 0 7>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldMachOAArch64.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
38 int64_t Addend = 0; in decodeAddend()
71 assert((((uintptr_t)LocalAddress & 0x3) == 0) && in decodeAddend()
90 assert(((*p & 0xFC000000) == 0x14000000 || in decodeAddend()
91 (*p & 0xFC000000) == 0x94000000) && in decodeAddend()
97 Addend = (*p & 0x03FFFFFF) << 2; in decodeAddend()
105 assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction."); in decodeAddend()
110 Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12; in decodeAddend()
119 assert((*p & 0x3B000000) == 0x39000000 && in decodeAddend()
127 assert((((*p & 0x3B000000) == 0x39000000) || in decodeAddend()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Dfoundation-v8.dtsi12 /memreserve/ 0x80000000 0x00010000;
34 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0x0 0x0>;
45 reg = <0x0 0x1>;
51 reg = <0x0 0x2>;
57 reg = <0x0 0x3>;
70 reg = <0x00000000 0x80000000 0 0x80000000>,
71 <0x00000008 0x80000000 0 0x80000000>;
98 reg = <0x0 0x2a440000 0 0x1000>,
[all …]
H A Drtsm_ve-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
49 #clock-cells = <0>;
55 arm,vexpress-sysreg,func = <5 0>;
60 arm,vexpress-sysreg,func = <7 0>;
65 arm,vexpress-sysreg,func = <8 0>;
70 arm,vexpress-sysreg,func = <9 0>;
75 arm,vexpress-sysreg,func = <11 0>;
83 ranges = <0 0x8000000 0 0x8000000 0x18000000>;
[all …]
H A Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx1.dtsi38 reg = <0x00223000 0x1000>;
42 #size-cells = <0>;
45 cpu@0 {
47 reg = <0>;
59 #clock-cells = <0>;
75 reg = <0x00200000 0x10000>;
80 reg = <0x00202000 0x1000>;
89 reg = <0x00203000 0x1000>;
98 reg = <0x00205000 0x1000>;
109 reg = <0x00206000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8dxl-evk.dts31 mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
36 fsl,entry-address = <0x34fe0000>;
42 reg = <0x00000000 0x80000000 0 0x40000000>;
54 * reg = <0 0x96000000 0 0x2000000>;
63 size = <0 0x14000000>;
64 alloc-ranges = <0 0x98000000 0 0x14000000>;
69 reg = <0 0x90000000 0 0x8000>;
74 reg = <0 0x90008000 0 0x8000>;
79 reg = <0 0x90010000 0 0x8000>;
84 reg = <0 0x90018000 0 0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623n.dtsi22 reg = <0 0x13000000 0 0x200>;
29 reg = <0 0x13040000 0 0x30000>;
55 reg = <0 0x1400000
[all...]
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Djz4740.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
H A Djz4725b.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x1000000
[all...]
/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,disp.txt82 reg = <0 0x14000000 0 0x1000>;
89 reg = <0 0x1400c000 0 0x1000>;
99 reg = <0 0x1400d000 0 0x1000>;
109 reg = <0 0x1400e000 0 0x1000>;
120 reg = <0 0x1400f000 0 0x1000>;
130 reg = <0 0x14010000 0 0x1000>;
140 reg = <0 0x14011000 0 0x1000>;
150 reg = <0 0x14012000 0 0x1000>;
160 reg = <0 0x14013000 0 0x1000>;
168 reg = <0 0x14014000 0 0x1000>;
[all …]
/freebsd/contrib/opencsd/decoder/source/i_dec/
H A Dtrc_idec_arminst.cpp48 if ((inst & 0xf0000000) == 0xf0000000) { in inst_ARM_is_direct_branch()
50 if ((inst & 0xfe000000) == 0xfa000000){ in inst_ARM_is_direct_branch()
53 is_direct_branch = 0; in inst_ARM_is_direct_branch()
55 } else if ((inst & 0x0e000000) == 0x0a000000) { in inst_ARM_is_direct_branch()
58 is_direct_branch = 0; in inst_ARM_is_direct_branch()
65 if ( ((inst & 0xf0000000) != 0xf0000000) && in inst_ARM_wfiwfe()
66 ((inst & 0x0ffffffe) == 0x0320f002) in inst_ARM_wfiwfe()
70 return 0; in inst_ARM_wfiwfe()
76 if ((inst & 0xf0000000) == 0xf0000000) { in inst_ARM_is_indirect_branch()
78 if ((inst & 0xfe500000) == 0xf8100000) { in inst_ARM_is_indirect_branch()
[all …]

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