1b6cee71dSXin LI 2b6cee71dSXin LI#------------------------------------------------------------------------------ 3*ae316d1dSXin LI# $File: xilinx,v 1.12 2024/09/04 19:06:12 christos Exp $ 4b6cee71dSXin LI# This is Aaron's attempt at a MAGIC file for Xilinx .bit files. 5b6cee71dSXin LI# Xilinx-Magic@RevRagnarok.com 6b6cee71dSXin LI# Got the info from FPGA-FAQ 0026 7b6cee71dSXin LI# 8b6cee71dSXin LI# Rewritten to use pstring/H instead of hardcoded lengths by O. Freyermuth, 9b6cee71dSXin LI# fixes at least reading of bitfiles from Spartan 2, 3, 6. 10b6cee71dSXin LI# http://www.fpga-faq.com/FAQ_Pages/0026_Tell_me_about_bit_files.htm 11b6cee71dSXin LI# 12b6cee71dSXin LI# First there is the sync header and its length 13b6cee71dSXin LI0 beshort 0x0009 14b6cee71dSXin LI>2 belong =0x0ff00ff0 15b6cee71dSXin LI>>&0 belong =0x0ff00ff0 16b6cee71dSXin LI>>>&0 byte =0x00 17*ae316d1dSXin LI>>>>&1 beshort =0x0001 18*ae316d1dSXin LI>>>>>&3 string a Xilinx BIT data 19b6cee71dSXin LI# Next is a Pascal-style string with the NCD name. We want to capture that. 20*ae316d1dSXin LI>>>>>>&0 pstring/H x - from %s 21b6cee71dSXin LI# And then 'b' 22*ae316d1dSXin LI>>>>>>>&1 string b 23b6cee71dSXin LI# Then the model / part number: 24*ae316d1dSXin LI>>>>>>>>&0 pstring/H x - for %s 25b6cee71dSXin LI# Then 'c' 26*ae316d1dSXin LI>>>>>>>>>&1 string c 27b6cee71dSXin LI# Then the build-date 28*ae316d1dSXin LI>>>>>>>>>>&0 pstring/H x - built %s 29b6cee71dSXin LI# Then 'd' 30*ae316d1dSXin LI>>>>>>>>>>>&1 string d 31b6cee71dSXin LI# Then the build-time 32*ae316d1dSXin LI>>>>>>>>>>>>&0 pstring/H x \b(%s) 33b6cee71dSXin LI# Then 'e' 34*ae316d1dSXin LI>>>>>>>>>>>>>&1 string e 35b6cee71dSXin LI# And length of data 36*ae316d1dSXin LI>>>>>>>>>>>>>>&0 belong x - data length %#x 37b6cee71dSXin LI 38b6cee71dSXin LI# Raw bitstream files 39b6cee71dSXin LI0 long 0xffffffff 40b6cee71dSXin LI>&0 belong 0xaa995566 Xilinx RAW bitstream (.BIN) 41898496eeSXin LI 42898496eeSXin LI# AXLF (xclbin) files used by AMD/Xilinx accelerators. 43898496eeSXin LI# The file format is defined by XRT source tree: 44898496eeSXin LI# https://github.com/Xilinx/XRT/blob/master/src/runtime_src/core/include/xclbin.h 45898496eeSXin LI# Display file size, creation date, accelerator shell name, xclbin uuid and 46898496eeSXin LI# number of sections. 47898496eeSXin LI 48898496eeSXin LI0 string xclbin2 AMD/Xilinx accelerator AXLF (xclbin) file 49898496eeSXin LI>0x130 lequad x \b, %lld bytes 50898496eeSXin LI>0x138 leqdate x \b, created %s 51898496eeSXin LI>0x160 string >0 \b, shell "%.64s" 52898496eeSXin LI>0x1a0 ubelong x \b, uuid %08x 53898496eeSXin LI>0x1a4 ubeshort x \b-%04x 54898496eeSXin LI>0x1a6 ubeshort x \b-%04x 55898496eeSXin LI>0x1a8 ubeshort x \b-%04x 56898496eeSXin LI>0x1aa ubelong x \b-%08x 57898496eeSXin LI>0x1ae ubeshort x \b%04x 58898496eeSXin LI>0x1c0 lelong x \b, %d sections 59*ae316d1dSXin LI 60*ae316d1dSXin LI# Xilinx Boot Image files 61*ae316d1dSXin LI# File format spec is from Xilinx UG1283 62*ae316d1dSXin LI# https://docs.xilinx.com/r/en-US/ug1283-bootgen-user-guide 63*ae316d1dSXin LI0x20 lelong 0xAA995566 64*ae316d1dSXin LI>0x24 lelong 0x584c4e58 Xilinx Boot Image 65*ae316d1dSXin LI>>0x0 lelong 0xEAFFFFFE \b, 32-bit 66*ae316d1dSXin LI>>0x0 lelong 0x14000000 \b, 64-bit 67*ae316d1dSXin LI>>0x28 lelong 0x00000000 \b, unencrypted 68*ae316d1dSXin LI>>0x28 lelong 0xA5C3C5A5 \b, black key in efuse 69*ae316d1dSXin LI>>0x28 lelong 0xA5C3C5A7 \b, obfuscated key in efuse 70*ae316d1dSXin LI>>0x28 lelong 0x3A5C3C5A \b, red key in bbram 71*ae316d1dSXin LI>>0x28 lelong 0xA5C3C5A3 \b, efuse red key in efuse 72*ae316d1dSXin LI>>0x28 lelong 0xA35C7CA5 \b, obfuscated key in boot header 73*ae316d1dSXin LI>>0x28 lelong 0xA3A5C3C5 \b, user key in boot header 74*ae316d1dSXin LI>>0x28 lelong 0xA35C7C53 \b, black key in boot header 75*ae316d1dSXin LI>>0x2C lelong 0x01010000 \b, Zynq 7000 SoC 76*ae316d1dSXin LI!:mime application/x-xilinx-boot-zynq 77*ae316d1dSXin LI>>>0x34 ulelong >0 \b, FSBL size %#x bytes 78*ae316d1dSXin LI>>0x2C lelong !0x01010000 \b, Zynq UltraScale+ MPSoC 79*ae316d1dSXin LI!:mime application/x-xilinx-boot-zynqmp 80*ae316d1dSXin LI>>>0x34 ulelong >0 \b, PMU size %#x bytes 81*ae316d1dSXin LI>>>0x3C ulelong >0 \b, FSBL size %#x bytes 82