xref: /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/arm,versatile-fpga-irq.txt (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1c66ec88fSEmmanuel Vadot* ARM Versatile FPGA interrupt controller
2c66ec88fSEmmanuel Vadot
3c66ec88fSEmmanuel VadotOne or more FPGA IRQ controllers can be synthesized in an ARM reference board
4c66ec88fSEmmanuel Vadotsuch as the Integrator or Versatile family. The output of these different
5c66ec88fSEmmanuel Vadotcontrollers are OR:ed together and fed to the CPU tile's IRQ input. Each
6c66ec88fSEmmanuel Vadotinstance can handle up to 32 interrupts.
7c66ec88fSEmmanuel Vadot
8c66ec88fSEmmanuel VadotRequired properties:
9*aa1a8ff2SEmmanuel Vadot- compatible: "arm,versatile-fpga-irq"
10c66ec88fSEmmanuel Vadot- interrupt-controller: Identifies the node as an interrupt controller
11c66ec88fSEmmanuel Vadot- #interrupt-cells: The number of cells to define the interrupts.  Must be 1
12c66ec88fSEmmanuel Vadot  as the FPGA IRQ controller has no configuration options for interrupt
13c66ec88fSEmmanuel Vadot  sources.  The cell is a u32 and defines the interrupt number.
14c66ec88fSEmmanuel Vadot- reg: The register bank for the FPGA interrupt controller.
15c66ec88fSEmmanuel Vadot- clear-mask: a u32 number representing the mask written to clear all IRQs
16c66ec88fSEmmanuel Vadot  on the controller at boot for example.
17c66ec88fSEmmanuel Vadot- valid-mask: a u32 number representing a bit mask determining which of
18c66ec88fSEmmanuel Vadot  the interrupts are valid. Unconnected/unused lines are set to 0, and
19c66ec88fSEmmanuel Vadot  the system till not make it possible for devices to request these
20c66ec88fSEmmanuel Vadot  interrupts.
21c66ec88fSEmmanuel Vadot
22*aa1a8ff2SEmmanuel VadotThe "oxsemi,ox810se-rps-irq" compatible is deprecated.
23*aa1a8ff2SEmmanuel Vadot
24c66ec88fSEmmanuel VadotExample:
25c66ec88fSEmmanuel Vadot
26c66ec88fSEmmanuel Vadotpic: pic@14000000 {
27c66ec88fSEmmanuel Vadot        compatible = "arm,versatile-fpga-irq";
28c66ec88fSEmmanuel Vadot        #interrupt-cells = <1>;
29c66ec88fSEmmanuel Vadot        interrupt-controller;
30c66ec88fSEmmanuel Vadot        reg = <0x14000000 0x100>;
31c66ec88fSEmmanuel Vadot        clear-mask = <0xffffffff>;
32c66ec88fSEmmanuel Vadot        valid-mask = <0x003fffff>;
33c66ec88fSEmmanuel Vadot};
34c66ec88fSEmmanuel Vadot
35c66ec88fSEmmanuel VadotOptional properties:
36c66ec88fSEmmanuel Vadot- interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
37c66ec88fSEmmanuel Vadot  output is simply connected to the input of another IRQ controller,
38c66ec88fSEmmanuel Vadot  then the parent IRQ shall be specified in this property.
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