Home
last modified time | relevance | path

Searched +full:0 +full:x1104 (Results 1 – 25 of 46) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dbrcm,bcm74110-mbox.yaml58 reg = <0xa552000 0x1104>;
59 interrupts = <GIC_SPI 0x67 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 0x66 IRQ_TYPE_LEVEL_HIGH>;
61 #mbox-cells = <0x2>;
62 brcm,rx = <0x7>;
63 brcm,tx = <0x6>;
/freebsd/usr.sbin/fwget/pci/
H A Dpci_network_qca39 0x003c) addpkg "wifi-firmware-ath10k-kmod-qca988x_hw20"; return 1 ;;
40 0x003e) addpkg "wifi-firmware-ath10k-kmod-qca6174_hw21"
43 0x0040) addpkg "wifi-firmware-ath10k-kmod-qca99x0_hw20"; return 1 ;;
44 0x0041) addpkg "wifi-firmware-ath10k-kmod-qca6174_hw21"; return 1 ;;
45 0x0042) addpkg "wifi-firmware-ath10k-kmod-qca6174_hw30"
48 0x0046) addpkg "wifi-firmware-ath10k-kmod-qca9984_hw10"; return 1 ;;
49 0x0050) addpkg "wifi-firmware-ath10k-kmod-qca9887_hw10"; return 1 ;;
50 0x0056) addpkg "wifi-firmware-ath10k-kmod-qca9888_hw20"; return 1 ;;
67 0x1101) addpkg "wifi-firmware-ath11k-kmod-qca6390_hw20"; return 1 ;;
68 0x110
[all...]
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewSymbols.def3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
27 CV_SYMBOL(S_COMPILE , 0x0001)
28 CV_SYMBOL(S_REGISTER_16t , 0x0002)
29 CV_SYMBOL(S_CONSTANT_16t , 0x0003)
30 CV_SYMBOL(S_UDT_16t , 0x0004)
31 CV_SYMBOL(S_SSEARCH , 0x0005)
32 CV_SYMBOL(S_SKIP , 0x0007)
33 CV_SYMBOL(S_CVRESERVE , 0x0008)
34 CV_SYMBOL(S_OBJNAME_ST , 0x0009)
35 CV_SYMBOL(S_ENDARG , 0x000
[all...]
/freebsd/sys/dev/eqos/
H A Dif_eqos_reg.h38 #define GMAC_MAC_CONFIGURATION 0x0000
49 #define GMAC_MAC_CONFIGURATION_RE (1U << 0)
50 #define GMAC_MAC_EXT_CONFIGURATION 0x0004
51 #define GMAC_MAC_PACKET_FILTER 0x0008
59 #define GMAC_MAC_PACKET_FILTER_PR (1U << 0)
60 #define GMAC_MAC_WATCHDOG_TIMEOUT 0x000C
61 #define GMAC_MAC_HASH_TABLE_REG0 0x0010
62 #define GMAC_MAC_HASH_TABLE_REG1 0x0014
63 #define GMAC_MAC_VLAN_TAG 0x0050
64 #define GMAC_MAC_Q0_TX_FLOW_CTRL 0x0070
[all …]
/freebsd/sys/dev/ae/
H A Dif_aereg.h31 #define AE_MASTER_REG 0x1400
33 #define AE_MASTER_SOFT_RESET 0x1 /* Reset adapter. */
34 #define AE_MASTER_MTIMER_EN 0x2 /* Unknown. */
35 #define AE_MASTER_IMT_EN 0x4 /* Interrupt moderation timer enable. */
36 #define AE_MASTER_MANUAL_INT 0x8 /* Software manual interrupt. */
38 #define AE_MASTER_REVNUM_MASK 0xff
40 #define AE_MASTER_DEVID_MASK 0xff
45 #define AE_ISR_REG 0x1600
46 #define AE_ISR_TIMER 0x00000001 /* Counter expired. */
47 #define AE_ISR_MANUAL 0x00000002 /* Manual interrupt occuried. */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g-ice.dts18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
28 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
128 <&pca9536 0 GPIO_ACTIVE_HIGH>;
129 linux,axis = <0>; /* ABS_X */
136 pinctrl-0 = <&user_leds>;
223 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
224 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
230 K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */
231 K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
232 K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */
[all …]
H A Dkeystone-k2g-evm.dts17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
27 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
72 #clock-cells = <0>;
76 sound0: sound@0 {
88 simple-audio-card,dai-link@0 {
94 clocks = <&k2g_clks 0x6 1>;
110 clocks = <&k2g_clks 0x6 1>;
125 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
126 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
132 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
[all …]
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dzzz_fw_ports_fwget.sh28 printf "USAGE: %s /path/to/linux-firmware.git\n" $0 >&2
52 # ==> 0x1101 -> ATH11K_HW_QCA6390_HW20 -> QCA6390/hw2.0
53 # ==> 0x1104 -> ATH11K_HW_QCN9074_HW10 -> QCN9074/hw1.0
54 # ==> 0x1103 -> ATH11K_HW_WCN6855_HW20 -> WCN6855/hw2.0
55 # ==> 0x1103 -> ATH11K_HW_WCN6855_HW21 -> WCN6855/hw2.1
56 # Firmware dir WCN6855/hw2.1 (for 0x1103) does not exist; skipping
64 …v/null | awk '/PCI_VDEVICE\(QCOM,/ { gsub("^.*, ", ""); gsub("\\) },$", ""); print tolower($0); }')
75 printf "%s", $0;
82 …/null | egrep -E '\.(hw_rev|dir) = ' | awk '{ if (/hw_rev/) { printf "%s", $0; } else { print; } }…
129 print tolower($0);
[all …]
H A Dpci.c26 #define ATH11K_PCI_BAR_NUM 0
29 #define TCSR_SOC_HW_VERSION 0x0224
31 #define TCSR_SOC_HW_VERSION_MINOR_MASK GENMASK(7, 0)
33 #define QCA6390_DEVICE_ID 0x1101
34 #define QCN9074_DEVICE_ID 0x1104
35 #define WCN6855_DEVICE_ID 0x1103
41 {0}
182 { .name = "MHI", .num_vectors = 3, .base_vector = 0 },
183 { .name = "CE", .num_vectors = 1, .base_vector = 0 },
184 { .name = "WAKE", .num_vectors = 1, .base_vector = 0 },
[all …]
/freebsd/sys/dev/ata/chipsets/
H A Data-siliconimage.c64 #define SII_INTR 0x01
65 #define SII_SETCLK 0x02
66 #define SII_BUG 0x04
67 #define SII_4CH 0x08
77 {{ ATA_SII3114, 0x00, SII_MEMIO, SII_4CH, ATA_SA150, "3114" }, in ata_sii_probe()
78 { ATA_SII3512, 0x02, SII_MEMIO, 0, ATA_SA150, "3512" }, in ata_sii_probe()
79 { ATA_SII3112, 0x02, SII_MEMIO, 0, ATA_SA150, "3112" }, in ata_sii_probe()
80 { ATA_SII3112_1, 0x02, SII_MEMIO, 0, ATA_SA150, "3112" }, in ata_sii_probe()
81 { ATA_SII3512, 0x00, SII_MEMIO, SII_BUG, ATA_SA150, "3512" }, in ata_sii_probe()
82 { ATA_SII3112, 0x00, SII_MEMIO, SII_BUG, ATA_SA150, "3112" }, in ata_sii_probe()
[all …]
/freebsd/sys/dev/hdmi/
H A Ddwc_hdmireg.h29 #define HDMI_DESIGN_ID 0x0000
30 #define HDMI_REVISION_ID 0x0001
31 #define HDMI_PRODUCT_ID0 0x0002
32 #define HDMI_PRODUCT_ID1 0x0003
35 #define HDMI_IH_FC_STAT0 0x0100
36 #define HDMI_IH_FC_STAT1 0x0101
37 #define HDMI_IH_FC_STAT2 0x0102
38 #define HDMI_IH_AS_STAT0 0x0103
39 #define HDMI_IH_PHY_STAT0 0x0104
40 #define HDMI_IH_PHY_STAT0_HPD (1 << 0)
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_regs.h9 #define MT_ASIC_VERSION 0x0000
11 #define MT76XX_REV_E3 0x22
12 #define MT76XX_REV_E4 0x33
14 #define MT_CMB_CTRL 0x0020
18 #define MT_EFUSE_CTRL 0x0024
19 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0)
27 #define MT_EFUSE_DATA_BASE 0x0028
30 #define MT_COEXCFG0 0x0040
31 #define MT_COEXCFG0_COEX_EN BIT(0)
33 #define MT_WLAN_FUN_CTRL 0x0080
[all …]
/freebsd/sys/dev/iwn/
H A Dif_iwn_devid.h21 #define IWN_HW_REV_TYPE_MASK 0x1f
24 #define IWN_HW_REV_TYPE_4965 0
48 #define IWN_DID_2x00_1 0x0890
49 #define IWN_DID_2x00_2 0x0891
51 #define IWN_SDID_2x00_1 0x4022
52 #define IWN_SDID_2x00_2 0x4222
53 #define IWN_SDID_2x00_3 0x4422
54 #define IWN_SDID_2x00_4 0x4822
61 #define IWN_DID_2x30_1 0x0887
62 #define IWN_DID_2x30_2 0x0888
[all …]
/freebsd/sys/dev/usb/wlan/
H A Dif_mtwreg.h19 #define MTW_ASIC_VER 0x0000
20 #define MTW_CMB_CTRL 0x0020
21 #define MTW_EFUSE_CTRL 0x0024
22 #define MTW_EFUSE_DATA0 0x0028
23 #define MTW_EFUSE_DATA1 0x002c
24 #define MTW_EFUSE_DATA2 0x0030
25 #define MTW_EFUSE_DATA3 0x0034
26 #define MTW_OSC_CTRL 0x0038
27 #define MTW_COEX_CFG0 0x0040
28 #define MTW_PLL_CTRL 0x0050
[all …]
H A Dif_runreg.h24 #define RT2860_IFACE_INDEX 0
26 #define RT3070_OPT_14 0x0114
29 #define RT2860_INT_STATUS 0x0200
30 #define RT2860_INT_MASK 0x0204
31 #define RT2860_WPDMA_GLO_CFG 0x0208
32 #define RT2860_WPDMA_RST_IDX 0x020c
33 #define RT2860_DELAY_INT_CFG 0x0210
34 #define RT2860_WMM_AIFSN_CFG 0x0214
35 #define RT2860_WMM_CWMIN_CFG 0x0218
36 #define RT2860_WMM_CWMAX_CFG 0x021c
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dpci.h10 #define MDIO_PG0_G1 0
14 #define RAC_CTRL_PPR 0x00
15 #define RAC_ANA03 0x03
17 #define RAC_ANA09 0x09
19 #define RAC_ANA0A 0x0A
21 #define RAC_ANA0B 0x0B
23 #define RAC_ANA0C 0x0C
25 #define RAC_ANA0D 0x0D
28 #define RAC_ANA10 0x10
30 #define ADDR_SEL_VAL 0x3C
[all …]
/freebsd/sys/dev/sound/pci/
H A Dallegro_code.h55 0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980,
56 0x00DD, 0x7980, 0x03B4, 0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4,
57 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x031A, 0x7980,
58 0x03B4, 0x7980, 0x022F, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4,
59 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x0063, 0x7980, 0x006B, 0x7980,
60 0x03B4, 0x7980, 0x03B4, 0xBF80, 0x2C7C, 0x8806, 0x8804, 0xBE40, 0xBC20,
61 0xAE09, 0x1000, 0xAE0A, 0x0001, 0x6938, 0xEB08, 0x0053, 0x695A, 0xEB08,
62 0x00D6, 0x0009, 0x8B88, 0x6980, 0xE388, 0x0036, 0xBE30, 0xBC20, 0x6909,
63 0xB801, 0x9009, 0xBE41, 0xBE41, 0x6928, 0xEB88, 0x0078, 0xBE41, 0xBE40,
64 0x7980, 0x0038, 0xBE41, 0xBE41, 0x903A, 0x6938, 0xE308, 0x0056, 0x903A,
[all …]
/freebsd/lib/libsdp/
H A Dsdp.h43 #define SDP_DATA_NIL 0x00
46 #define SDP_DATA_UINT8 0x08
47 #define SDP_DATA_UINT16 0x09
48 #define SDP_DATA_UINT32 0x0A
49 #define SDP_DATA_UINT64 0x0B
50 #define SDP_DATA_UINT128 0x0C
53 #define SDP_DATA_INT8 0x10
54 #define SDP_DATA_INT16 0x11
55 #define SDP_DATA_INT32 0x12
56 #define SDP_DATA_INT64 0x13
[all …]
/freebsd/sys/dev/alc/
H A Dif_alcreg.h36 #define VENDORID_ATHEROS 0x1969
41 #define DEVICEID_ATHEROS_AR8131 0x1063 /* L1C */
42 #define DEVICEID_ATHEROS_AR8132 0x1062 /* L2C */
43 #define DEVICEID_ATHEROS_AR8151 0x1073 /* L1D V1.0 */
44 #define DEVICEID_ATHEROS_AR8151_V2 0x1083 /* L1D V2.0 */
45 #define DEVICEID_ATHEROS_AR8152_B 0x2060 /* L2C V1.1 */
46 #define DEVICEID_ATHEROS_AR8152_B2 0x2062 /* L2C V2.0 */
47 #define DEVICEID_ATHEROS_AR8161 0x1091
48 #define DEVICEID_ATHEROS_AR8162 0x1090
49 #define DEVICEID_ATHEROS_AR8171 0x10A1
[all …]
/freebsd/sys/dev/smartpqi/
H A Dsmartpqi_main.c48 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"},
49 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"},
50 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"},
51 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"},
52 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
53 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
54 {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"},
57 {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"},
58 {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"},
59 {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"},
[all …]
/freebsd/sys/dev/ral/
H A Drt2860reg.h23 #define RT2860_PCI_CFG 0x0000
24 #define RT2860_PCI_EECTRL 0x0004
25 #define RT2860_PCI_MCUCTRL 0x0008
26 #define RT2860_PCI_SYSCTRL 0x000c
27 #define RT2860_PCIE_JTAG 0x0010
29 #define RT3090_AUX_CTRL 0x010c
31 #define RT3070_OPT_14 0x0114
34 #define RT2860_INT_STATUS 0x0200
35 #define RT2860_INT_MASK 0x0204
36 #define RT2860_WPDMA_GLO_CFG 0x0208
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211reg.h32 #define AR_CR 0x0008 /* control register */
33 #define AR_RXDP 0x000C /* receive queue descriptor pointer */
34 #define AR_CFG 0x0014 /* configuration and status register */
35 #define AR_IER 0x0024 /* Interrupt enable register */
36 #define AR_RTSD0 0x0028 /* RTS Duration Parameters 0 */
37 #define AR_RTSD1 0x002c /* RTS Duration Parameters 1 */
38 #define AR_TXCFG 0x0030 /* tx DMA size config register */
39 #define AR_RXCFG 0x0034 /* rx DMA size config register */
40 #define AR5211_JUMBO_LAST 0x0038 /* Jumbo descriptor last address */
41 #define AR_MIBC 0x0040 /* MIB control register */
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212reg.h27 #define AR_CR 0x0008 /* MAC control register */
28 #define AR_RXDP 0x000C /* MAC receive queue descriptor pointer */
29 #define AR_CFG 0x0014 /* MAC configuration and status register */
30 #define AR_IER 0x0024 /* MAC Interrupt enable register */
31 /* 0x28 is RTSD0 on the 5211 */
32 /* 0x2c is RTSD1 on the 5211 */
33 #define AR_TXCFG 0x0030 /* MAC tx DMA size config register */
34 #define AR_RXCFG 0x0034 /* MAC rx DMA size config register */
35 /* 0x38 is the jumbo descriptor address on the 5211 */
36 #define AR_MIBC 0x0040 /* MAC MIB control register */
[all …]
/freebsd/sys/contrib/dev/iwlwifi/pcie/
H A Ddrv.c32 0, _invalid_type))
43 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5000_mac_cfg)}, /* Mini Card */
44 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5000_mac_cfg)}, /* Half Mini Card */
45 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5000_mac_cfg)}, /* Mini Card */
46 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5000_mac_cfg)}, /* Half Mini Card */
47 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5000_mac_cfg)}, /* Mini Card */
48 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5000_mac_cfg)}, /* Half Mini Card */
49 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5000_mac_cfg)}, /* Mini Card */
50 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5000_mac_cfg)}, /* Half Mini Card */
51 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5000_mac_cfg)}, /* Mini Card */
[all …]
/freebsd/sys/dev/sk/
H A Dif_sk.c127 #if 0
146 "SysKonnect Gigabit Ethernet (V1.0)"
151 "SysKonnect Gigabit Ethernet (V2.0)"
183 { 0, 0, NULL }
265 static int jumbo_disable = 0;
270 * capability for Tx and I believe it can generate 0 checksum value for
272 * TCP packets. 0 chcecksum value for UDP packet is an invalid one as it
334 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
335 { -1, 0, 0 }
339 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
[all …]

12