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/linux/Documentation/devicetree/bindings/thermal/
H A Dthermal-sensor.yaml35 0 on sensor nodes with only a single sensor and at least 1 on nodes
37 enum: [0, 1]
57 reg = <0 0x0c263000 0 0x1ff>, /* TM */
58 <0 0x0c222000 0 0x1ff>; /* SROT */
68 reg = <0 0x0c265000 0 0x1ff>, /* TM */
69 <0 0x0c223000 0 0x1ff>; /* SROT */
/linux/arch/arm64/boot/dts/qcom/
H A Deliza.dtsi30 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0x0 0x0>;
37 clocks = <&cpufreq_hw 0>;
47 qcom,freq-domain = <&cpufreq_hw 0>;
66 reg = <0x0 0x100>;
68 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
[all...]
H A Dmilos.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
56 clocks = <&cpufreq_hw 0>;
66 qcom,freq-domain = <&cpufreq_hw 0>;
87 reg = <0x0 0x10
[all...]
H A Dglymur.dtsi35 #size-cells = <0>;
37 cpu0: cpu@0 {
40 reg = <0x0 0x0>;
42 power-domains = <&cpu_pd0>, <&scmi_perf 0>;
57 reg = <0x0 0x100>;
59 power-domains = <&cpu_pd1>, <&scmi_perf 0>;
68 reg = <0x0 0x20
[all...]
H A Dmonaco.dtsi35 #clock-cells = <0>;
41 #clock-cells = <0>;
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0 0x0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
79 reg = <0x0 0x100>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all...]
H A Dhamoa.dtsi38 #clock-cells = <0>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
58 #clock-cells = <0>;
68 #size-cells = <0>;
70 cpu0: cpu@0 {
73 reg = <0x0 0x0>;
76 power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
90 reg = <0x
[all...]