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/linux/arch/arm/boot/dts/ti/omap/
H A Ddra76x.dtsi14 ranges = <0x0 0x42c00000 0x2000>;
17 reg = <0x42c01900 0x4>,
18 <0x42c01904 0x4>,
19 <0x42c01908 0x4>;
24 clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
29 reg = <0x1a00 0x4000>, <0x0 0x18FC>;
37 bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
45 target-module@1b0000 { /* 0x489b0000, ap 25 34.0 */
47 reg = <0x1b0000 0x4>,
48 <0x1b0010 0x4>;
[all …]
H A Ddra7.dtsi60 reg = <0x0 0x48211000 0x0 0x1000>,
61 <0x0 0x48212000 0x0 0x2000>,
62 <0x0 0x48214000 0x0 0x2000>,
63 <0x0 0x48216000 0x0 0x2000>;
72 reg = <0x0 0x48281000 0x0 0x1000>;
78 #size-cells = <0>;
80 cpu0: cpu@0 {
83 reg = <0>;
108 opp-supported-hw = <0xFF 0x01>;
118 opp-supported-hw = <0xFF 0x02>;
[all …]
H A Domap5.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0>;
69 reg = <0x1>;
115 reg = <0 0x40300000 0 0x20000>; /* 128k */
122 reg = <0 0x48211000 0 0x1000>,
123 <0 0x48212000 0 0x2000>,
124 <0 0x48214000 0 0x2000>,
125 <0 0x48216000 0 0x2000>;
133 reg = <0 0x48281000 0 0x1000>;
[all …]
/linux/Documentation/devicetree/bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml45 implementation defined. Some SoCs can use 0x00000000-0x0fffffff and
46 0x40000000-0x4fffffff, while other SoCs only 0x40000000-0x4fffffff.
53 bank 0 to 0x42000000-0x43ffffff, bank 5 to 0x46000000-0x46ffffff
55 bank 0 to 0x48000000-0x49ffffff, bank 5 to 0x44000000-0x44ffffff
61 "^.*@[1-5],[1-9a-f][0-9a-f]+$":
77 // - the Ethernet device is connected at the offset 0x01f00000 of CS1 and
78 // mapped to 0x43f00000 of the parent bus.
79 // - the UART device is connected at the offset 0x00200000 of CS5 and
80 // mapped to 0x46200000 of the parent bus.
84 reg = <0x58c00000 0x400>;
[all …]
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-support-card.dtsi10 ranges = <1 0x00000000 0x42000000 0x02000000>;
14 reg = <1 0x01f00000 0x1000>;
22 reg = <1 0x01fb0000 0x20>;
/linux/drivers/net/ethernet/intel/e1000e/
H A D82571.h7 #define ID_LED_RESERVED_F746 0xF746
13 #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
17 #define E1000_EITR_82574(_n) (0x000E8 + (0x4 * (_n)))
19 #define E1000_EIAC_82574 0x000DC /* Ext. Interrupt Auto Clear - RW */
20 #define E1000_EIAC_MASK_82574 0x01F00000
22 #define E1000_IVAR_INT_ALLOC_VALID 0x8
25 #define E1000_NVM_INIT_CTRL2_MNGM 0x6000
28 #define E1000_IDLE_ERROR_COUNT_MASK 0xFF
30 #define E1000_RECEIVE_ERROR_MAX 0xFFFF
/linux/arch/sh/configs/
H A Dul2_defconfig12 CONFIG_MEMORY_SIZE=0x01f00000
/linux/arch/powerpc/boot/dts/
H A Dcurrituck.dts13 /memreserve/ 0x01f00000 0x00100000; // spin table
20 dcr-parent = <&{/cpus/cpu@0}>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
58 cpu-release-addr = <0x0 0x01f00000>;
64 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
70 dcr-reg = <0xffc00000 0x00040000>;
71 #address-cells = <0>;
72 #size-cells = <0>;
[all …]
H A Dlite5200b.dts22 gpios = <&gpt2 0 1>;
25 gpios = <&gpt3 0 1>;
34 memory@0 {
35 reg = <0x00000000 0x10000000>; // 256MB
41 cell-index = <0>;
87 phy0: ethernet-phy@0 {
88 reg = <0>;
95 reg = <0x50>;
101 reg = <0x8000 0x4000>;
106 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
H A Dpcm032.dts23 memory@0 {
24 reg = <0x00000000 0x08000000>; // 128MB
30 cell-index = <0>;
61 phy0: ethernet-phy@0 {
62 reg = <0>;
69 reg = <0x51>;
73 reg = <0x52>;
80 interrupt-map-mask = <0xf800 0 0 7>;
81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
82 0xc000 0 0 2 &mpc5200_pic 1 1 3
[all …]
H A Diss4xx-mpic.dts17 /memreserve/ 0x01f00000 0x00100000;
24 dcr-parent = <&{/cpus/cpu@0}>;
32 #size-cells = <0>;
34 cpu@0 {
37 reg = <0>;
62 cpu-release-addr = <0 0x01f00100>;
78 cpu-release-addr = <0 0x01f00200>;
94 cpu-release-addr = <0 0x01f00300>;
100 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
107 dcr-reg = <0xffc00000 0x00030000>;
[all …]
H A Dakebono.dts14 /memreserve/ 0x01f00000 0x00100000; // spin table
21 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
59 cpu-release-addr = <0x0 0x01f00000>;
65 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
71 dcr-reg = <0xffc00000 0x00040000>;
72 #address-cells = <0>;
73 #size-cells = <0>;
[all …]
H A Deiger.dts18 dcr-parent = <&{/cpus/cpu@0}>;
31 #size-cells = <0>;
33 cpu@0 {
36 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
50 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
56 cell-index = <0>;
57 dcr-reg = <0x0c0 0x009>;
58 #address-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Dallwinner,sun6i-a31-rtc.yaml44 - description: RTC Alarm 0
60 - the Low Frequency Oscillator or LOSC, at index 0,
190 reg = <0x01f00000 0x400>;
191 interrupts = <0 40 4>, <0 41 4>;
/linux/arch/powerpc/boot/dts/fsl/
H A Dp1020utm-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x2000000>;
44 partition@0 {
46 reg = <0x0 0x00040000>;
52 reg = <0x00040000 0x003c0000>;
58 reg = <0x00400000 0x01b00000>;
66 reg = <0x01f00000 0x00100000>;
77 reg = <0x68>;
82 phy0: ethernet-phy@0 {
83 interrupts = <3 1 0 0>;
[all …]
H A Dp1010rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x2000000>;
46 reg = <0x00040000 0x00040000>;
52 reg = <0x00080000 0x00700000>;
58 reg = <0x00800000 0x01400000>;
66 reg = <0x01f00000 0x00100000>;
72 ifc_nand: nand@1,0 {
76 reg = <0x1 0x0 0x10000>;
79 cpld@3,0 {
83 reg = <0x3 0x0 0x0000020>;
[all …]
H A Dp1021mds.dts23 reg = <0x0 0xffe05000 0x0 0x1000>;
26 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
27 0x1 0x0 0x0 0xf8000000 0x00008000
28 0x2 0x0 0x0 0xf8010000 0x00020000
29 0x3 0x0 0x0 0xf8020000 0x00020000>;
31 nand@0,0 {
36 reg = <0x0 0x0 0x40000>;
38 partition@0 {
41 reg = <0x0 0x00100000>;
48 reg = <0x00100000 0x00100000>;
[all …]
H A Dmpc8569mds.dts30 reg = <0x0 0xe0005000 0x0 0x1000>;
32 ranges = <0x0 0x0 0x0 0xfe000000 0x02000000
33 0x1 0x0 0x0 0xf8000000 0x00008000
34 0x2 0x0 0x0 0xf0000000 0x04000000
35 0x3 0x0 0x0 0xfc000000 0x00008000
36 0x4 0x0 0x0 0xf8008000 0x00008000
37 0x5 0x0 0x0 0xf8010000 0x00008000>;
39 nor@0,0 {
43 reg = <0x0 0x0 0x02000000>;
46 partition@0 {
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm47094-linksys-panamera.dts19 memory@0 {
21 reg = <0x00000000 0x08000000>,
22 <0x88000000 0x08000000>;
27 reg = <0x1c080000 0x100000>;
83 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
136 reg = <0x200>;
138 #size-cells = <0>;
140 switch@0 {
143 #size-cells = <0>;
146 reg = <0>;
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
H A Dmxms.c42 case 0x0200: in mxms_version()
43 case 0x0201: in mxms_version()
44 case 0x0300: in mxms_version()
51 return 0x0000; in mxms_version()
70 u8 *mxms = mxms_data(mxm), sum = 0; in mxms_checksum()
84 if (*(u32 *)mxms != 0x5f4d584d) { in mxms_valid()
104 u8 type = desc[0] & 0x0f; in mxms_foreach()
105 u8 headerlen = 0; in mxms_foreach()
106 u8 recordlen = 0; in mxms_foreach()
107 u8 entries = 0; in mxms_foreach()
[all …]
/linux/arch/mips/alchemy/
H A Dboard-gpr.c42 alchemy_gpio_direction_output(4, 0); in gpr_reset()
43 alchemy_gpio_direction_output(5, 0); in gpr_reset()
48 alchemy_gpio_direction_output(1, 0); in gpr_reset()
81 [0] = {
91 .id = 0,
99 * 0x00000000-0x00200000 : "kernel"
100 * 0x00200000-0x00a00000 : "rootfs"
101 * 0x01d00000-0x01f00000 : "config"
102 * 0x01c00000-0x01d00000 : "yamon"
103 * 0x01d00000-0x01d40000 : "yamon env vars"
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Ddesc.h25 * @rx_control_0: RX control word 0
34 #define AR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff /* data buffer length */
35 #define AR5K_DESC_RX_CTL1_INTREQ 0x00002000 /* RX interrupt request */
39 * @rx_status_0: RX status word 0
50 /* RX status word 0 fields/flags */
51 #define AR5K_5210_RX_DESC_STATUS0_DATA_LEN 0x00000fff /* RX data length */
52 #define AR5K_5210_RX_DESC_STATUS0_MORE 0x00001000 /* more desc for this frame */
53 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANT_5210 0x00004000 /* [5210] receive on ant 1 */
54 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE 0x00078000 /* reception rate */
56 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL 0x07f80000 /* rssi */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Drammap.c33 u32 rammap = 0x0000; in nvbios_rammapTe()
40 *ver = nvbios_rd08(bios, rammap + 0); in nvbios_rammapTe()
42 case 0x10: in nvbios_rammapTe()
43 case 0x11: in nvbios_rammapTe()
56 return 0x0000; in nvbios_rammapTe()
72 return 0x0000; in nvbios_rammapEe()
81 memset(p, 0x00, sizeof(*p)); in nvbios_rammapEp_from_perf()
83 p->rammap_00_16_20 = (nvbios_rd08(bios, data + 0x16) & 0x20) >> 5; in nvbios_rammapEp_from_perf()
84 p->rammap_00_16_40 = (nvbios_rd08(bios, data + 0x16) & 0x40) >> 6; in nvbios_rammapEp_from_perf()
85 p->rammap_00_17_02 = (nvbios_rd08(bios, data + 0x17) & 0x02) >> 1; in nvbios_rammapEp_from_perf()
[all …]
/linux/arch/powerpc/platforms/85xx/
H A Dp1022_ds.c37 #define PMUXCR_ELBCDIU_MASK 0xc0000000
38 #define PMUXCR_ELBCDIU_NOR16 0x80000000
39 #define PMUXCR_ELBCDIU_DIU 0x40000000
52 #define CLKDVDR_PXCKEN 0x80000000
53 #define CLKDVDR_PXCKINV 0x10000000
54 #define CLKDVDR_PXCKDLY 0x06000000
55 #define CLKDVDR_PXCLK_MASK 0x00FF0000
62 #define PX_BRDCFG0_ELBC_SPI_MASK 0xc0
63 #define PX_BRDCFG0_ELBC_SPI_ELBC 0x00
64 #define PX_BRDCFG0_ELBC_SPI_NULL 0xc0
[all …]
/linux/drivers/atm/
H A Didt77252.h52 #define DBG_RAW_CELL 0x00000400
53 #define DBG_TINY 0x00000200
54 #define DBG_GENERAL 0x00000100
55 #define DBG_XGENERAL 0x00000080
56 #define DBG_INIT 0x00000040
57 #define DBG_DEINIT 0x00000020
58 #define DBG_INTERRUPT 0x00000010
59 #define DBG_OPEN_CONN 0x00000008
60 #define DBG_CLOSE_CONN 0x00000004
61 #define DBG_RX_DATA 0x00000002
[all …]

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