1*fd534e9bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
28e026910SManuel Lauss /*
38e026910SManuel Lauss * GPR board platform device registration (Au1550)
48e026910SManuel Lauss *
58e026910SManuel Lauss * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
68e026910SManuel Lauss */
78e026910SManuel Lauss
88e026910SManuel Lauss #include <linux/delay.h>
98e026910SManuel Lauss #include <linux/init.h>
108e026910SManuel Lauss #include <linux/interrupt.h>
118e026910SManuel Lauss #include <linux/kernel.h>
128e026910SManuel Lauss #include <linux/platform_device.h>
138e026910SManuel Lauss #include <linux/pm.h>
148e026910SManuel Lauss #include <linux/mtd/partitions.h>
158e026910SManuel Lauss #include <linux/mtd/physmap.h>
168e026910SManuel Lauss #include <linux/leds.h>
178e026910SManuel Lauss #include <linux/gpio.h>
188e026910SManuel Lauss #include <linux/i2c.h>
191e9d4219SWolfram Sang #include <linux/platform_data/i2c-gpio.h>
20b2e63555SLinus Walleij #include <linux/gpio/machine.h>
218e026910SManuel Lauss #include <asm/bootinfo.h>
22bdc92d74SRalf Baechle #include <asm/idle.h>
238e026910SManuel Lauss #include <asm/reboot.h>
245c93316cSAlexander Sverdlin #include <asm/setup.h>
258e026910SManuel Lauss #include <asm/mach-au1x00/au1000.h>
26832f5dacSAlban Bedel #include <asm/mach-au1x00/gpio-au1000.h>
278e026910SManuel Lauss #include <prom.h>
288e026910SManuel Lauss
get_system_type(void)298e026910SManuel Lauss const char *get_system_type(void)
308e026910SManuel Lauss {
318e026910SManuel Lauss return "GPR";
328e026910SManuel Lauss }
338e026910SManuel Lauss
prom_putchar(char c)345c93316cSAlexander Sverdlin void prom_putchar(char c)
358e026910SManuel Lauss {
368e026910SManuel Lauss alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
378e026910SManuel Lauss }
388e026910SManuel Lauss
gpr_reset(char * c)398e026910SManuel Lauss static void gpr_reset(char *c)
408e026910SManuel Lauss {
418e026910SManuel Lauss /* switch System-LED to orange (red# and green# on) */
428e026910SManuel Lauss alchemy_gpio_direction_output(4, 0);
438e026910SManuel Lauss alchemy_gpio_direction_output(5, 0);
448e026910SManuel Lauss
458e026910SManuel Lauss /* trigger watchdog to reset board in 200ms */
468e026910SManuel Lauss printk(KERN_EMERG "Triggering watchdog soft reset...\n");
478e026910SManuel Lauss raw_local_irq_disable();
488e026910SManuel Lauss alchemy_gpio_direction_output(1, 0);
498e026910SManuel Lauss udelay(1);
508e026910SManuel Lauss alchemy_gpio_set_value(1, 1);
518e026910SManuel Lauss while (1)
528e026910SManuel Lauss cpu_wait();
538e026910SManuel Lauss }
548e026910SManuel Lauss
gpr_power_off(void)558e026910SManuel Lauss static void gpr_power_off(void)
568e026910SManuel Lauss {
578e026910SManuel Lauss while (1)
588e026910SManuel Lauss cpu_wait();
598e026910SManuel Lauss }
608e026910SManuel Lauss
board_setup(void)618e026910SManuel Lauss void __init board_setup(void)
628e026910SManuel Lauss {
638e026910SManuel Lauss printk(KERN_INFO "Trapeze ITS GPR board\n");
648e026910SManuel Lauss
658e026910SManuel Lauss pm_power_off = gpr_power_off;
668e026910SManuel Lauss _machine_halt = gpr_power_off;
678e026910SManuel Lauss _machine_restart = gpr_reset;
688e026910SManuel Lauss
698e026910SManuel Lauss /* Enable UART1/3 */
708e026910SManuel Lauss alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
718e026910SManuel Lauss alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);
728e026910SManuel Lauss
738e026910SManuel Lauss /* Take away Reset of UMTS-card */
748e026910SManuel Lauss alchemy_gpio_direction_output(215, 1);
758e026910SManuel Lauss }
768e026910SManuel Lauss
778e026910SManuel Lauss /*
788e026910SManuel Lauss * Watchdog
798e026910SManuel Lauss */
808e026910SManuel Lauss static struct resource gpr_wdt_resource[] = {
818e026910SManuel Lauss [0] = {
828e026910SManuel Lauss .start = 1,
838e026910SManuel Lauss .end = 1,
848e026910SManuel Lauss .name = "gpr-adm6320-wdt",
858e026910SManuel Lauss .flags = IORESOURCE_IRQ,
868e026910SManuel Lauss }
878e026910SManuel Lauss };
888e026910SManuel Lauss
898e026910SManuel Lauss static struct platform_device gpr_wdt_device = {
908e026910SManuel Lauss .name = "adm6320-wdt",
918e026910SManuel Lauss .id = 0,
928e026910SManuel Lauss .num_resources = ARRAY_SIZE(gpr_wdt_resource),
938e026910SManuel Lauss .resource = gpr_wdt_resource,
948e026910SManuel Lauss };
958e026910SManuel Lauss
968e026910SManuel Lauss /*
978e026910SManuel Lauss * FLASH
988e026910SManuel Lauss *
998e026910SManuel Lauss * 0x00000000-0x00200000 : "kernel"
1008e026910SManuel Lauss * 0x00200000-0x00a00000 : "rootfs"
1018e026910SManuel Lauss * 0x01d00000-0x01f00000 : "config"
1028e026910SManuel Lauss * 0x01c00000-0x01d00000 : "yamon"
1038e026910SManuel Lauss * 0x01d00000-0x01d40000 : "yamon env vars"
1048e026910SManuel Lauss * 0x00000000-0x00a00000 : "kernel+rootfs"
1058e026910SManuel Lauss */
1068e026910SManuel Lauss static struct mtd_partition gpr_mtd_partitions[] = {
1078e026910SManuel Lauss {
1088e026910SManuel Lauss .name = "kernel",
1098e026910SManuel Lauss .size = 0x00200000,
1108e026910SManuel Lauss .offset = 0,
1118e026910SManuel Lauss },
1128e026910SManuel Lauss {
1138e026910SManuel Lauss .name = "rootfs",
1148e026910SManuel Lauss .size = 0x00800000,
1158e026910SManuel Lauss .offset = MTDPART_OFS_APPEND,
1168e026910SManuel Lauss .mask_flags = MTD_WRITEABLE,
1178e026910SManuel Lauss },
1188e026910SManuel Lauss {
1198e026910SManuel Lauss .name = "config",
1208e026910SManuel Lauss .size = 0x00200000,
1218e026910SManuel Lauss .offset = 0x01d00000,
1228e026910SManuel Lauss },
1238e026910SManuel Lauss {
1248e026910SManuel Lauss .name = "yamon",
1258e026910SManuel Lauss .size = 0x00100000,
1268e026910SManuel Lauss .offset = 0x01c00000,
1278e026910SManuel Lauss },
1288e026910SManuel Lauss {
1298e026910SManuel Lauss .name = "yamon env vars",
1308e026910SManuel Lauss .size = 0x00040000,
1318e026910SManuel Lauss .offset = MTDPART_OFS_APPEND,
1328e026910SManuel Lauss },
1338e026910SManuel Lauss {
1348e026910SManuel Lauss .name = "kernel+rootfs",
1358e026910SManuel Lauss .size = 0x00a00000,
1368e026910SManuel Lauss .offset = 0,
1378e026910SManuel Lauss },
1388e026910SManuel Lauss };
1398e026910SManuel Lauss
1408e026910SManuel Lauss static struct physmap_flash_data gpr_flash_data = {
1418e026910SManuel Lauss .width = 4,
1428e026910SManuel Lauss .nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
1438e026910SManuel Lauss .parts = gpr_mtd_partitions,
1448e026910SManuel Lauss };
1458e026910SManuel Lauss
1468e026910SManuel Lauss static struct resource gpr_mtd_resource = {
1478e026910SManuel Lauss .start = 0x1e000000,
1488e026910SManuel Lauss .end = 0x1fffffff,
1498e026910SManuel Lauss .flags = IORESOURCE_MEM,
1508e026910SManuel Lauss };
1518e026910SManuel Lauss
1528e026910SManuel Lauss static struct platform_device gpr_mtd_device = {
1538e026910SManuel Lauss .name = "physmap-flash",
1548e026910SManuel Lauss .dev = {
1558e026910SManuel Lauss .platform_data = &gpr_flash_data,
1568e026910SManuel Lauss },
1578e026910SManuel Lauss .num_resources = 1,
1588e026910SManuel Lauss .resource = &gpr_mtd_resource,
1598e026910SManuel Lauss };
1608e026910SManuel Lauss
1618e026910SManuel Lauss /*
1628e026910SManuel Lauss * LEDs
1638e026910SManuel Lauss */
1641fd88d9bSArvind Yadav static const struct gpio_led gpr_gpio_leds[] = {
1658e026910SManuel Lauss { /* green */
1668e026910SManuel Lauss .name = "gpr:green",
1678e026910SManuel Lauss .gpio = 4,
1688e026910SManuel Lauss .active_low = 1,
1698e026910SManuel Lauss },
1708e026910SManuel Lauss { /* red */
1718e026910SManuel Lauss .name = "gpr:red",
1728e026910SManuel Lauss .gpio = 5,
1738e026910SManuel Lauss .active_low = 1,
1748e026910SManuel Lauss }
1758e026910SManuel Lauss };
1768e026910SManuel Lauss
1778e026910SManuel Lauss static struct gpio_led_platform_data gpr_led_data = {
1788e026910SManuel Lauss .num_leds = ARRAY_SIZE(gpr_gpio_leds),
1798e026910SManuel Lauss .leds = gpr_gpio_leds,
1808e026910SManuel Lauss };
1818e026910SManuel Lauss
1828e026910SManuel Lauss static struct platform_device gpr_led_devices = {
1838e026910SManuel Lauss .name = "leds-gpio",
1848e026910SManuel Lauss .id = -1,
1858e026910SManuel Lauss .dev = {
1868e026910SManuel Lauss .platform_data = &gpr_led_data,
1878e026910SManuel Lauss }
1888e026910SManuel Lauss };
1898e026910SManuel Lauss
1908e026910SManuel Lauss /*
1918e026910SManuel Lauss * I2C
1928e026910SManuel Lauss */
193b2e63555SLinus Walleij static struct gpiod_lookup_table gpr_i2c_gpiod_table = {
194b2e63555SLinus Walleij .dev_id = "i2c-gpio",
195b2e63555SLinus Walleij .table = {
196b2e63555SLinus Walleij /*
197b2e63555SLinus Walleij * This should be on "GPIO2" which has base at 200 so
198b2e63555SLinus Walleij * the global numbers 209 and 210 should correspond to
199b2e63555SLinus Walleij * local offsets 9 and 10.
200b2e63555SLinus Walleij */
201b2e63555SLinus Walleij GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0,
202b2e63555SLinus Walleij GPIO_ACTIVE_HIGH),
203b2e63555SLinus Walleij GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1,
204b2e63555SLinus Walleij GPIO_ACTIVE_HIGH),
205b2e63555SLinus Walleij },
206b2e63555SLinus Walleij };
207b2e63555SLinus Walleij
2088e026910SManuel Lauss static struct i2c_gpio_platform_data gpr_i2c_data = {
2094d0ce62cSLinus Walleij /*
2104d0ce62cSLinus Walleij * The open drain mode is hardwired somewhere or an electrical
2114d0ce62cSLinus Walleij * property of the alchemy GPIO controller.
2124d0ce62cSLinus Walleij */
2138e026910SManuel Lauss .sda_is_open_drain = 1,
2148e026910SManuel Lauss .scl_is_open_drain = 1,
2158e026910SManuel Lauss .udelay = 2, /* ~100 kHz */
2168e026910SManuel Lauss .timeout = HZ,
2178e026910SManuel Lauss };
2188e026910SManuel Lauss
2198e026910SManuel Lauss static struct platform_device gpr_i2c_device = {
2208e026910SManuel Lauss .name = "i2c-gpio",
2218e026910SManuel Lauss .id = -1,
2228e026910SManuel Lauss .dev.platform_data = &gpr_i2c_data,
2238e026910SManuel Lauss };
2248e026910SManuel Lauss
2258e026910SManuel Lauss static struct i2c_board_info gpr_i2c_info[] __initdata = {
2268e026910SManuel Lauss {
2278e026910SManuel Lauss I2C_BOARD_INFO("lm83", 0x18),
2288e026910SManuel Lauss }
2298e026910SManuel Lauss };
2308e026910SManuel Lauss
2318e026910SManuel Lauss
2328e026910SManuel Lauss
2338e026910SManuel Lauss static struct resource alchemy_pci_host_res[] = {
2348e026910SManuel Lauss [0] = {
2358e026910SManuel Lauss .start = AU1500_PCI_PHYS_ADDR,
2368e026910SManuel Lauss .end = AU1500_PCI_PHYS_ADDR + 0xfff,
2378e026910SManuel Lauss .flags = IORESOURCE_MEM,
2388e026910SManuel Lauss },
2398e026910SManuel Lauss };
2408e026910SManuel Lauss
gpr_map_pci_irq(const struct pci_dev * d,u8 slot,u8 pin)2418e026910SManuel Lauss static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
2428e026910SManuel Lauss {
2438e026910SManuel Lauss if ((slot == 0) && (pin == 1))
2448e026910SManuel Lauss return AU1550_PCI_INTA;
2458e026910SManuel Lauss else if ((slot == 0) && (pin == 2))
2468e026910SManuel Lauss return AU1550_PCI_INTB;
2478e026910SManuel Lauss
2488e026910SManuel Lauss return 0xff;
2498e026910SManuel Lauss }
2508e026910SManuel Lauss
2518e026910SManuel Lauss static struct alchemy_pci_platdata gpr_pci_pd = {
2528e026910SManuel Lauss .board_map_irq = gpr_map_pci_irq,
2538e026910SManuel Lauss .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
2548e026910SManuel Lauss PCI_CONFIG_CH |
2558e026910SManuel Lauss #if defined(__MIPSEB__)
2568e026910SManuel Lauss PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
2578e026910SManuel Lauss #else
2588e026910SManuel Lauss 0,
2598e026910SManuel Lauss #endif
2608e026910SManuel Lauss };
2618e026910SManuel Lauss
2628e026910SManuel Lauss static struct platform_device gpr_pci_host_dev = {
2638e026910SManuel Lauss .dev.platform_data = &gpr_pci_pd,
2648e026910SManuel Lauss .name = "alchemy-pci",
2658e026910SManuel Lauss .id = 0,
2668e026910SManuel Lauss .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
2678e026910SManuel Lauss .resource = alchemy_pci_host_res,
2688e026910SManuel Lauss };
2698e026910SManuel Lauss
2708e026910SManuel Lauss static struct platform_device *gpr_devices[] __initdata = {
2718e026910SManuel Lauss &gpr_wdt_device,
2728e026910SManuel Lauss &gpr_mtd_device,
2738e026910SManuel Lauss &gpr_i2c_device,
2748e026910SManuel Lauss &gpr_led_devices,
2758e026910SManuel Lauss };
2768e026910SManuel Lauss
gpr_pci_init(void)2778e026910SManuel Lauss static int __init gpr_pci_init(void)
2788e026910SManuel Lauss {
2798e026910SManuel Lauss return platform_device_register(&gpr_pci_host_dev);
2808e026910SManuel Lauss }
2818e026910SManuel Lauss /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
2828e026910SManuel Lauss arch_initcall(gpr_pci_init);
2838e026910SManuel Lauss
2848e026910SManuel Lauss
gpr_dev_init(void)2858e026910SManuel Lauss static int __init gpr_dev_init(void)
2868e026910SManuel Lauss {
287b2e63555SLinus Walleij gpiod_add_lookup_table(&gpr_i2c_gpiod_table);
2888e026910SManuel Lauss i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
2898e026910SManuel Lauss
2908e026910SManuel Lauss return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
2918e026910SManuel Lauss }
2928e026910SManuel Lauss device_initcall(gpr_dev_init);
293