Lines Matching +full:0 +full:x01f00000
14 ranges = <0x0 0x42c00000 0x2000>;
17 reg = <0x42c01900 0x4>,
18 <0x42c01904 0x4>,
19 <0x42c01908 0x4>;
24 clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
29 reg = <0x1a00 0x4000>, <0x0 0x18FC>;
37 bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
45 target-module@1b0000 { /* 0x489b0000, ap 25 34.0 */
47 reg = <0x1b0000 0x4>,
48 <0x1b0010 0x4>;
54 clocks = <&cam_clkctrl DRA7_CAM_VIP3_CLKCTRL 0>;
58 ranges = <0x0 0x1b0000 0x10000>;
60 cal: cal@0 {
62 reg = <0x0000 0x400>,
63 <0x0800 0x40>,
64 <0x0900 0x40>;
69 ti,camerrx-control = <&scm_conf 0x6dc>;
73 #size-cells = <0>;
75 csi2_0: port@0 {
76 reg = <0>;
90 reg = <0x3fc>;
93 #size-cells = <0>;
104 #clock-cells = <0>;
112 #clock-cells = <0>;
123 #clock-cells = <0>;
147 opp-supported-hw = <0xFF 0x08>;
154 1060000 0x0
155 1160000 0x4
156 1210000 0x8
157 1250000 0xC
164 1060000 0 0x0 0 0x02000000 0x01F00000
165 1160000 0 0x4 0 0x02000000 0x01F00000
166 1210000 0 0x8 0 0x02000000 0x01F00000
167 1250000 0 0xC 0 0x02000000 0x01F00000