| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx7ulp-pinfunc.h | 15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1 18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1 19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1 20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0 24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1 [all …]
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| H A D | imx6ul-pinfunc.h | 13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0 14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0 16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0 17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0 18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0 19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0 20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0 21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0 22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0 23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0 [all …]
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| H A D | imx6sll-pinfunc.h | 15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0 16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0 17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0 18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0 19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0 20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0 21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0 22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0 23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0 24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0 [all …]
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| H A D | imx6ull-pinfunc.h | 16 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 18 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 20 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5 22 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6 24 #define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7 27 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0 28 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 29 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 30 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0 31 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0 [all …]
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| H A D | imx6sx-pinfunc.h | 13 #define MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x0014 0x035C 0x07A8 0x0 0x1 14 #define MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT 0x0014 0x035C 0x0000 0x1 0x0 15 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0 16 #define MX6SX_PAD_GPIO1_IO00__CCM_WAIT 0x0014 0x035C 0x0000 0x3 0x0 17 #define MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY 0x0014 0x035C 0x0000 0x4 0x0 18 #define MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x0014 0x035C 0x0000 0x5 0x0 19 #define MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 0x0014 0x035C 0x0000 0x6 0x0 20 #define MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 0x0014 0x035C 0x0000 0x7 0x0 21 #define MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x0018 0x0360 0x07AC 0x0 0x1 22 #define MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B 0x0018 0x0360 0x0000 0x1 0x0 [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8ulp-pinfunc.h | 13 #define MX8ULP_PAD_PTD0__PTD0 0x0000 0x0000 0x1 0x0 14 #define MX8ULP_PAD_PTD0__I2S6_RX_BCLK 0x0000 0x0B44 0x7 0x1 15 #define MX8ULP_PAD_PTD0__SDHC0_RESET_B 0x0000 0x0000 0x8 0x0 16 #define MX8ULP_PAD_PTD0__FLEXSPI2_B_DQS 0x0000 0x0974 0x9 0x1 17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0 18 #define MX8ULP_PAD_PTD0__EPDC0_SDCLK_B 0x0000 0x0000 0xb 0x0 19 #define MX8ULP_PAD_PTD0__LP_APD_DBG_MUX_0 0x0000 0x0000 0xc 0x0 20 #define MX8ULP_PAD_PTD0__CLKOUT1 0x0000 0x0000 0xd 0x0 21 #define MX8ULP_PAD_PTD0__DEBUG_MUX0_0 0x0000 0x0000 0xe 0x0 22 #define MX8ULP_PAD_PTD0__DEBUG_MUX1_0 0x0000 0x0000 0xf 0x0 [all …]
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| H A D | imx95-pinfunc.h | 13 #define IMX95_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x0204 0x0610 0x00 0x00 14 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_MQS2_LEFT 0x0000 0x0204 0x0000 0x01 0x00 15 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_NETC_TMR_1588_ALARM1 0x0000 0x0204 0x0000 0x02 0x00 16 #define IMX95_PAD_DAP_TDI__CAN2_TX 0x0000 0x0204 0x0000 0x03 0x00 17 #define IMX95_PAD_DAP_TDI__FLEXIO2_FLEXIO_BIT30 0x0000 0x0204 0x0000 0x04 0x00 18 #define IMX95_PAD_DAP_TDI__GPIO3_IO_BIT28 0x0000 0x0204 0x0000 0x05 0x00 19 #define IMX95_PAD_DAP_TDI__LPUART5_RX 0x0000 0x0204 0x0570 0x06 0x00 21 #define IMX95_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x0208 0x0614 0x00 0x00 22 #define IMX95_PAD_DAP_TMS_SWDIO__CAN4_TX 0x0004 0x0208 0x0000 0x02 0x00 23 #define IMX95_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO_BIT31 0x0004 0x0208 0x0000 0x04 0x00 [all …]
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| H A D | imx94-pinfunc.h | 10 #define IMX94_DSE_X1 0x2 11 #define IMX94_DSE_X2 0x6 12 #define IMX94_DSE_X3 0xe 13 #define IMX94_DSE_X4 0x1e 14 #define IMX94_DSE_X5 0x3e 15 #define IMX94_DSE_X6 0x7e 18 #define IMX94_FSEL_FAST 0x180 19 #define IMX94_FSEL_SLOW 0x100 22 #define IMX94_PU_ENABLE 0x200 23 #define IMX94_PU_DISABLE 0x0 [all …]
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| /freebsd/share/vt/keymaps/ |
| H A D | sk.kbd | 135 002 '1' '!' nop nop 0xdf 0xdf nop nop O 136 003 '2' '@' nul nul 0xb0 0xb0 nul nul O 137 004 '3' '#' nop nop 0xa4 0xa4 nop nop O 138 005 '4' '$' nop nop 0xa7 0xa7 nop nop O 141 008 '7' '&' nop nop 0xad 0xad nop nop O 144 011 '0' ')' nop nop ddot ddot nop nop O 149 016 'q' 'Q' dc1 dc1 0xe4 0xc4 dc1 dc1 C 151 018 'e' 'E' enq enq 0xe9 0xc9 enq enq C 152 019 'r' 'R' dc2 dc2 0x0155 0x0154 dc2 dc2 C 153 020 't' 'T' dc4 dc4 0x0165 0x0164 dc4 dc4 C [all …]
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| H A D | centraleuropean.kbd | 69 002 '1' '!' nop nop 0xdf 0xdf nop nop O 70 003 '2' '@' nul nul 0xb0 0xb0 nul nul O 71 004 '3' '#' nop nop 0xa4 0xa4 nop nop O 72 005 '4' '$' nop nop 0xa7 0xa7 nop nop O 75 008 '7' '&' nop nop 0xad 0xad nop nop O 78 011 '0' ')' nop nop ddot ddot nop nop O 122 055 '*' '*' '*' '*' 0xd7 0xd7 0xd7 0xd7 O 149 082 fkey60 '0' '0' '0' '0' '0' '0' '0' N 158 091 '/' '/' '/' '/' 0xf7 0xf7 0xf7 0xf7 N 177 dacu 0xb4 ( 'a' 0xe1 ) ( 'A' 0xc1 ) [all …]
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| H A D | centraleuropean.qwerty.kbd | 69 002 '1' '!' nop nop 0xdf 0xdf nop nop O 70 003 '2' '@' nul nul 0xb0 0xb0 nul nul O 71 004 '3' '#' nop nop 0xa4 0xa4 nop nop O 72 005 '4' '$' nop nop 0xa7 0xa7 nop nop O 75 008 '7' '&' nop nop 0xad 0xad nop nop O 78 011 '0' ')' nop nop ddot ddot nop nop O 122 055 '*' '*' '*' '*' 0xd7 0xd7 0xd7 0xd7 O 149 082 fkey60 '0' '0' '0' '0' '0' '0' '0' N 158 091 '/' '/' '/' '/' 0xf7 0xf7 0xf7 0xf7 N 177 dacu 0xb4 ( 'a' 0xe1 ) ( 'A' 0xc1 ) [all …]
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| H A D | lt.kbd | 7 002 '1' '!' nop nop 0x0105 0x0104 nop nop O 8 003 '2' '@' nul nul 0x010d 0x010c nul nul O 9 004 '3' '#' nop nop 0x0119 0x0118 nop nop O 10 005 '4' '$' nop nop 0x0117 0x0116 nop nop O 11 006 '5' '%' nop nop 0x012f 0x012e nop nop O 12 007 '6' '^' rs rs 0x0161 0x0160 rs rs O 13 008 '7' '&' nop nop 0x0173 0x0172 nop nop O 14 009 '8' '*' nop nop 0x016b 0x0172 nop nop O 16 011 '0' ')' nop nop '0' ')' nop nop O 18 013 '=' '+' nop nop 0x017e 0x017d nop nop O [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | amlogic,meson-pinctrl-a1.yaml | 27 "^bank@[0-9a-f]+$": 58 reg = <0x0400 0x003c>, 59 <0x0480 0x0118>; 63 gpio-ranges = <&periphs_pinctrl 0 0 62>;
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | console | 11 # - https://wiki.nesdev.com/w/index.php/NES_2.0 14 0 name nes-rom-image-ines 15 >7 byte&0x0C =0x8 (NES 2.0) 18 >6 byte&0x08 =0x8 [4-Scr] 19 >6 byte&0x09 =0x0 [H-mirror] 20 >6 byte&0x09 =0x1 [V-mirror] 21 >6 byte&0x02 =0x2 [SRAM] 22 >6 byte&0x04 =0x4 [Trainer] 23 >7 byte&0x03 =0x2 [PC10] 24 >7 byte&0x03 =0x1 [VS] [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am642-evm-icssg1-dualemac.dtso | 24 #size-cells = <0>; 26 mdio@0 { 27 reg = <0x0>; 29 #size-cells = <0>; 43 AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ 44 AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ 45 AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ 46 AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ 47 AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ 48 AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ [all …]
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| H A D | k3-am642-evm-icssg1-dualemac-mii.dtso | 23 #size-cells = <0>; 25 mdio@0 { 26 reg = <0x0>; 28 #size-cells = <0>; 40 AM64X_IOPAD(0x00f8, PIN_INPUT, 1) /* (V9) PRG1_PRU0_GPO16.PR1_MII_MT0_CLK */ 41 AM64X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (Y9) PRG1_PRU0_GPO15.PR1_MII0_TXEN */ 42 AM64X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AA9) PRG1_PRU0_GPO14.PR1_MII0_TXD3 */ 43 AM64X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (W9) PRG1_PRU0_GPO13.PR1_MII0_TXD2 */ 44 AM64X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (U9) PRG1_PRU0_GPO12.PR1_MII0_TXD1 */ 45 AM64X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA8) PRG1_PRU0_GPO11.PR1_MII0_TXD0 */ [all …]
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| /freebsd/share/i18n/csmapper/CP/ |
| H A D | UCS%CP10029.src | 5 SRC_ZONE 0x0000-0x25CA 7 DST_INVALID 0x100 26 # Column #2 is the Unicode (in hex as 0xXXXX) 31 0x0000 - 0x007F = 0x00 - 32 0x00A0 = 0xCA 33 0x00A3 = 0xA3 34 0x00A7 = 0xA4 35 0x00A8 = 0xAC 36 0x00A9 = 0xA9 37 0x00AB = 0xC7 [all …]
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| H A D | CP10029%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 26 # Column #2 is the Unicode (in hex as 0xXXXX) 31 0x00 - 0x7F = 0x0000 - 32 0x80 = 0x00C4 33 0x81 = 0x0100 34 0x82 = 0x0101 35 0x83 = 0x00C9 36 0x84 = 0x0104 37 0x85 = 0x00D6 [all …]
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| H A D | CP852%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 26 # Column #2 is the Unicode (in hex as 0xXXXX) 31 0x00 - 0x7F = 0x0000 - 32 0x80 = 0x00C7 33 0x81 = 0x00FC 34 0x82 = 0x00E9 35 0x83 = 0x00E2 36 0x84 = 0x00E4 37 0x85 = 0x016F [all …]
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| /freebsd/sys/contrib/dev/mediatek/mt76/ |
| H A D | sdio.h | 12 #define MCR_WCIR 0x0000 13 #define MCR_WHLPCR 0x0004 18 #define WHLPCR_INT_EN_SET BIT(0) 20 #define MCR_WSDIOCSR 0x0008 21 #define MCR_WHCR 0x000C 32 #define MCR_WHISR 0x0010 33 #define MCR_WHIER 0x0014 40 #define WHIER_TX_DONE_INT_EN BIT(0) 47 #define MCR_WASR 0x0020 48 #define MCR_WSICR 0x0024 [all …]
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| /freebsd/share/i18n/csmapper/ISO-8859/ |
| H A D | ISO-8859-10%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 44 # Column #1 is the ISO/IEC 8859-10 code (in hex as 0xXX) 45 # Column #2 is the Unicode (in hex as 0xXXXX) 52 # 1.1 corrected mistake in mapping of 0xA4 61 0x00-0x7F = 0x00- 62 0x80 = 0x0080 63 0x81 = 0x0081 64 0x82 = 0x0082 65 0x83 = 0x0083 [all …]
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| H A D | ISO-8859-13%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 44 # Column #1 is the ISO/IEC 8859-13 code (in hex as 0xXX) 45 # Column #2 is the Unicode (in hex as 0xXXXX) 57 0x00-0x7F = 0x00- 58 0x80 = 0x0080 59 0x81 = 0x0081 60 0x82 = 0x0082 61 0x83 = 0x0083 62 0x84 = 0x0084 [all …]
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| H A D | ISO-8859-16%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 44 # Column #1 is the ISO/IEC 8859-16 code (in hex as 0xXX) 45 # Column #2 is the Unicode (in hex as 0xXXXX) 57 0x00-0x7F = 0x00- 58 0x80 = 0x0080 59 0x81 = 0x0081 60 0x82 = 0x0082 61 0x83 = 0x0083 62 0x84 = 0x0084 [all …]
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| H A D | ISO-8859-2%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 44 # Column #1 is the ISO/IEC 8859-2 code (in hex as 0xXX) 45 # Column #2 is the Unicode (in hex as 0xXXXX) 61 0x00-0x7F = 0x00- 62 0x80 = 0x0080 63 0x81 = 0x0081 64 0x82 = 0x0082 65 0x83 = 0x0083 66 0x84 = 0x0084 [all …]
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| H A D | ISO-8859-4%UCS.src | 5 SRC_ZONE 0x00-0xFF 7 DST_ILSEQ 0xFFFE 44 # Column #1 is the ISO/IEC 8859-4 code (in hex as 0xXX) 45 # Column #2 is the Unicode (in hex as 0xXXXX) 61 0x00-0x7F = 0x00- 62 0x80 = 0x0080 63 0x81 = 0x0081 64 0x82 = 0x0082 65 0x83 = 0x0083 66 0x84 = 0x0084 [all …]
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