| /linux/drivers/media/platform/verisilicon/ |
| H A D | rockchip_vpu2_hw_h264_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Hertz Wong <hertz.wong@rock-chips.com>
7 * Herman Chen <herman.chen@rock-chips.com>
16 #include <media/v4l2-mem2mem.h>
28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
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| H A D | hantro_g1_mpeg2_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-mem2mem.h>
20 #define G1_REG_REFER1_BASE G1_SWREG(15)
25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
[all …]
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| H A D | hantro_g1_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define G1_REG_INTERRUPT_DEC_ASO_INT BIT(15)
60 #define G1_REG_DEC_CTRL0_DEC_OUT_DIS BIT(15)
98 #define G1_REG_DEC_CTRL2_TRANSACFRM(x) (((x) & 0x3) << 15)
208 #define G1_REG_FWD_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 15)
221 #define G1_REG_DEC_CTRL7_PINIT_RLIST_F13(x) (((x) & 0x1f) << 15)
262 #define G1_REG_BD_REF_PIC_BINIT_RLIST_B1(x) (((x) & 0x1f) << 15)
280 #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F1(x) (((x) & 0x1f) << 15)
286 #define G1_REG_ERR_CONC_STARTMB_Y(x) (((x) & 0xff) << 15)
305 /* Post-processor registers. */
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| H A D | rockchip_vpu2_hw_mpeg2_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-mem2mem.h>
23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
[all …]
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| /linux/lib/crypto/ |
| H A D | blake2s-generic.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
[all …]
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| /linux/crypto/ |
| H A D | blake2b_generic.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR Apache-2.0)
11 * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
12 * - OpenSSL license : https://www.openssl.org/source/license.html
13 * - Apache 2.0 : https://www.apache.org/licenses/LICENSE-2.0
26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
[all …]
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| /linux/arch/arm/crypto/ |
| H A D | blake2s-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 // load the words on-demand.
59 // Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
61 // columns/diagonals. s0-s1 are the word offsets to the message words the first
62 // column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
116 // r14 are free to use. The macro arguments s0-s15 give the order in which the
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
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| H A D | blake2b-neon-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 // M_0-M_3 are occasionally used for other purposes too.
50 // rotation amounts with NEON. (On Cortex-A53 it's the same speed as
51 // vshr.u64 + vsli.u64, while on Cortex-A7 it's faster.)
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
64 // NEON registers q0-q7. The message block is in q8..q15 (M_0-M_15). The stack
65 // pointer points to a 32-byte aligned buffer containing a copy of q8 and q9
66 // (M_0-M_3), so that they can be reloaded if they are used as temporary
67 // registers. The macro arguments s0-s15 give the order in which the message
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
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| /linux/drivers/gpu/drm/exynos/ |
| H A D | regs-scaler.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* drivers/gpu/drm/exynos/regs-scaler.h
56 * 1 70 74 78 7c 150 154 158 15c
127 #define SCALER_MASK(hi_b, lo_b) ((1 << ((hi_b) - (lo_b) + 1)) - 1)
158 #define SCALER_INT_EN_ILLEGAL_DST_CB_BASE (1 << 15)
186 #define SCALER_INT_STATUS_ILLEGAL_DST_CB_BASE (1 << 15)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
222 #define SCALER_L8 15
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
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| /linux/drivers/video/fbdev/ |
| H A D | atafb_iplan2p8.c | 2 * linux/drivers/video/iplan2p8.c -- Low level frame buffer operations for
53 if (!((sx ^ dx) & 15)) { in atafb_iplan2p8_copyarea()
54 /* odd->odd or even->even */ in atafb_iplan2p8_copyarea()
57 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p8_copyarea()
58 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p8_copyarea()
59 if (sx & 15) { in atafb_iplan2p8_copyarea()
60 memmove32_col(dst, src, 0xff00ff, height, next_line - BPL * 2); in atafb_iplan2p8_copyarea()
63 width -= 8; in atafb_iplan2p8_copyarea()
70 l = next_line - w * 4; in atafb_iplan2p8_copyarea()
71 for (j = height; j > 0; j--) { in atafb_iplan2p8_copyarea()
[all …]
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| H A D | atafb_iplan2p4.c | 2 * linux/drivers/video/iplan2p4.c -- Low level frame buffer operations for
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p4_copyarea()
47 /* odd->odd or even->even */ in atafb_iplan2p4_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
52 if (sx & 15) { in atafb_iplan2p4_copyarea()
53 memmove32_col(dst, src, 0xff00ff, height, next_line - BPL * 2); in atafb_iplan2p4_copyarea()
56 width -= 8; in atafb_iplan2p4_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p4_copyarea()
64 for (j = height; j > 0; j--) { in atafb_iplan2p4_copyarea()
[all …]
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| H A D | valkyriefb.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Vmode-switching changes and vmode 15/17 modifications created 29 August
13 * Ported to 68k Macintosh by David Huggins-Daines <dhd@debian.org>
20 * pmc-valkyrie.h: Console support for PowerMac "control" display adaptor.
23 * pmc-valkyrie.c: Console support for PowerMac "control" display adaptor.
28 * pmc-control.h: Console support for PowerMac "control" display adaptor.
31 * pmc-control.c: Console support for PowerMac "control" display adaptor.
39 /* Valkyrie registers are word-aligned on m68k */
101 15,
102 { 11, 28, 3 }, /* pixel clock = 79.55MHz for V=74.50Hz */
[all …]
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| H A D | atafb_iplan2p2.c | 2 * linux/drivers/video/iplan2p2.c -- Low level frame buffer operations for
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p2_copyarea()
47 /* odd->odd or even->even */ in atafb_iplan2p2_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
52 if (sx & 15) { in atafb_iplan2p2_copyarea()
53 memmove32_col(dst, src, 0xff00ff, height, next_line - BPL * 2); in atafb_iplan2p2_copyarea()
56 width -= 8; in atafb_iplan2p2_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p2_copyarea()
64 for (j = height; j > 0; j--) { in atafb_iplan2p2_copyarea()
[all …]
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| /linux/arch/arm64/crypto/ |
| H A D | sha512-ce-core.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
91 add v\i3\().2d, v\i3\().2d, v5.2d
93 ext v5.16b, v\in3\().16b, v\in4\().16b, #8
[all …]
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| /linux/arch/alpha/kernel/ |
| H A D | entry.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
39 .size \func, . - \func
43 * This defines the normal kernel pt-regs layout.
45 * regs 9-15 preserved by C code
46 * regs 16-18 saved by PAL-code
47 * regs 29-30 saved and set up by PAL-code
48 * JRP - Save regs 16-18 in a special area of the stack, so that
49 * the palcode-provided values are available to the signal handler.
[all …]
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| /linux/drivers/net/ethernet/altera/ |
| H A D | altera_msgdmahw.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * bit 15:0 sequence number
22 * bit 15:0 read stride
39 #define MSGDMA_DESC_CTL_EARLY_IRQ BIT(15)
80 u32 rw_fill_level; /* bit 31:16 - write fill level
81 * bit 15:0 - read fill level
83 u32 resp_fill_level; /* bit 15:0 */
84 u32 rw_seq_num; /* bit 31:16 - write sequence number
85 * bit 15:0 - read sequence number
105 #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) argument
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| H A D | altera_tse.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
53 #define GET_BIT_VALUE(v, bit) (((v) >> (bit)) & 0x1) argument
72 #define MAC_CMDCFG_LOOP_ENA BIT(15)
73 #define MAC_CMDCFG_TX_ADDR_SEL(v) (((v) & 0x7) << 16) argument
85 #define MAC_CMDCFG_TX_ENA_GET(v) GET_BIT_VALUE(v, 0) argument
86 #define MAC_CMDCFG_RX_ENA_GET(v) GET_BIT_VALUE(v, 1) argument
87 #define MAC_CMDCFG_XON_GEN_GET(v) GET_BIT_VALUE(v, 2) argument
88 #define MAC_CMDCFG_ETH_SPEED_GET(v) GET_BIT_VALUE(v, 3) argument
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| /linux/arch/x86/include/asm/ |
| H A D | perf_event_p4.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 * perf-MSRs are not shared and every thread has its
17 * own perf-MSRs set)
21 #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR)
25 #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
26 #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
62 #define P4_CCCR_THRESHOLD(v) ((v) << P4_CCCR_THRESHOLD_SHIFT) argument
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| /linux/drivers/staging/media/sunxi/cedrus/ |
| H A D | cedrus_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (c) 2013-2016 Jens Kuske <jenskuske@gmail.com>
6 * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com>
13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
18 * * VLD : Variable-Length Decoder
64 #define VE_PRIMARY_FB_LINE_STRIDE_LUMA(s) SHIFT_AND_MASK_BITS(s, 15, 0)
96 #define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
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| /linux/arch/s390/include/asm/ |
| H A D | fpu-insn-asm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 #error only <asm/fpu-insn.h> can be included directly
23 /* GR_NUM - Retrieve general-purpose register number
76 \opd = 15
83 /* VX_NUM - Retrieve vector register number
140 \opd = 15
195 /* RXB - Compute most significant bit used vector registers
200 * are stored in instruction bits 8-11.
203 * are stored in instruction bits 12-15.
206 * are stored in instruction bits 16-19.
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| /linux/sound/ppc/ |
| H A D | snd_ps3_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
72 31 24 23 16 15 8 7 0
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
95 31 24 23 16 15 8 7 0
96 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
98 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
105 31 24 23 16 15 8 7 0
106 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | adi,max98396.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@analog.com>
13 The MAX98396 is a mono Class-DG speaker amplifier with I/V sense.
21 - adi,max98396
22 - adi,max98397
27 avdd-supply:
28 description: A 1.8V supply that powers up the AVDD pin.
30 dvdd-supply:
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| /linux/lib/ |
| H A D | bitfield_kunit.c | 1 // SPDX-License-Identifier: GPL-2.0+
11 #define CHECK_ENC_GET_U(tp, v, field, res) do { \ argument
15 _res = u##tp##_encode_bits(v, field); \
17 "u" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != " #res "\n", \
20 u##tp##_get_bits(_res, field) != v); \
24 #define CHECK_ENC_GET_LE(tp, v, field, res) do { \ argument
28 _res = le##tp##_encode_bits(v, field); \
31 "le" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != 0x%llx",\
35 le##tp##_get_bits(_res, field) != v);\
39 #define CHECK_ENC_GET_BE(tp, v, field, res) do { \ argument
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| /linux/drivers/iio/adc/ |
| H A D | stm32-dfsdm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
15 * STM32 DFSDM - global register map
18 * ----------------------------------------------------------
20 * ----------------------------------------------------------
22 * ----------------------------------------------------------
24 * ----------------------------------------------------------
26 * ----------------------------------------------------------
28 * ----------------------------------------------------------
30 * ----------------------------------------------------------
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| /linux/drivers/media/radio/ |
| H A D | radio-tea5777.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <media/v4l2-device.h>
18 #include <media/v4l2-dev.h>
19 #include <media/v4l2-fh.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-event.h>
22 #include "radio-tea5777.h"
83 #define TEA5777_W_FM_FORCEMONO_MASK (1LL << 15)
84 #define TEA5777_W_FM_FORCEMONO_SHIFT 15
112 #define TEA5777_W_AM_CALLIGN_MASK (1LL << 15)
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