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/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
H A Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
[all …]
H A Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
/linux/fs/nls/
H A Dnls_ucs2_utils.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 MODULE_DESCRIPTION("NLS UCS-2");
26 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
28 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
29 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
30 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
31 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
32 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
33 -32, -32, -32, -32, -32, /* 060-06f */
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
H A Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux/drivers/media/dvb-frontends/
H A Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 #define STV090x_WIDTH_OUTSERRS1_HZ_FIELD 1
33 #define STV090x_WIDTH_OUTSERRS2_HZ_FIELD 1
35 #define STV090x_WIDTH_OUTSERRS3_HZ_FIELD 1
37 #define STV090x_WIDTH_OUTPARRS3_HZ_FIELD 1
43 #define STV090x_WIDTH_SPLL_LOCK_FIELD 1
45 #define STV090x_WIDTH_SSTREAM_LCK_3_FIELD 1
47 #define STV090x_WIDTH_SSTREAM_LCK_2_FIELD 1
49 #define STV090x_WIDTH_SSTREAM_LCK_1_FIELD 1
50 #define STV090x_OFFST_SDVBS1_PRF_2_FIELD 1
[all …]
/linux/arch/x86/kernel/
H A Duprobes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for x86
5 * Copyright (C) IBM Corporation, 2008-2011
23 /* Post-execution fixups. */
43 #define OPCODE1(insn) ((insn)->opcode.bytes[0])
44 #define OPCODE2(insn) ((insn)->opcode.bytes[1])
45 #define OPCODE3(insn) ((insn)->opcode.bytes[2])
46 #define MODRM_REG(insn) X86_MODRM_REG((insn)->modrm.value)
56 * Good-instruction tables for 32-bit apps. This is non-const and volatile
61 * 6c-6f - ins,outs. SEGVs if used in userspace
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
34 inkscape:connector-curvature="0"
[all …]
/linux/drivers/clk/ingenic/
H A Dx1830-cgu.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
59 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_enable()
60 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_enable()
69 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_disable()
70 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_disable()
78 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_is_enabled()
79 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_is_enabled()
93 0x0, 0x1, -1, 0x2, -1, -1, -1, 0x3,
[all …]
H A Djz4740-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
38 #define PLLCTL_STABLE (1 << 10)
39 #define PLLCTL_BYPASS (1 << 9)
40 #define PLLCTL_ENABLE (1 << 8)
43 #define LCR_SLEEP (1 << 0)
46 #define CLKGR_UDC (1 << 11)
51 0x0, 0x1, -1, 0x3,
55 1, 2, 3, 4, 6, 8, 12, 16, 24, 32,
[all …]
H A Djz4725b-cgu.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
36 0x0, 0x1, -1, 0x3,
40 1, 2, 3, 4, 6, 8,
44 2, 1,
56 .parents = { JZ4725B_CLK_EXT, -1, -1, -1 },
59 .rate_multiplier = 1,
81 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 },
83 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1, 0,
[all …]
H A Djz4780-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2013-2015 Imagination Technologies
10 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
134 if (req->rate < 15600000) in jz4780_otg_phy_determine_rate()
135 req->rate = 12000000; in jz4780_otg_phy_determine_rate()
136 else if (req->rate < 21600000) in jz4780_otg_phy_determine_rate()
137 req->rate = 19200000; in jz4780_otg_phy_determine_rate()
138 else if (req->rate < 36000000) in jz4780_otg_phy_determine_rate()
[all …]
/linux/lib/crc/x86/
H A Dcrc-pclmul-consts.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 …* ./scripts/gen-crc-consts.py x86_pclmul crc16_msb_0x8bb7,crc32_lsb_0xedb88320,crc32_lsb_0x82f63b7…
11 * CRC folding constants generated for most-significant-bit-first CRC-16 using
12 * G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0
24 .bswap_mask = {15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
46 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
47 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
48 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
51 0x8bb7000000000000, /* LO64_TERMS: (G - x^16) * x^48 */
52 0xf65a57f81d33a48a, /* HI64_TERMS: (floor(x^79 / G) * x) - x^64 */
[all …]
/linux/tools/testing/selftests/tc-testing/tc-tests/infra/
H A Dqdiscs.json14 "$TC qdisc add dev $DUMMY root handle 1: drr",
15 "$TC filter add dev $DUMMY parent 1: basic classid 1:1",
16 "$TC class add dev $DUMMY parent 1: classid 1:1 drr",
17 "$TC qdisc add dev $DUMMY parent 1:1 handle ffff: drr",
18 "$TC filter add dev $DUMMY parent ffff: basic classid ffff:1",
19 "$TC class add dev $DUMMY parent ffff: classid ffff:1 drr",
20 "$TC qdisc add dev $DUMMY parent ffff:1 netem delay 1s",
21 "ping -c1 -W0.01 -I $DUMMY 10.10.10.1 || true",
22 "$TC class del dev $DUMMY classid ffff:1",
23 "$TC class add dev $DUMMY parent ffff: classid ffff:1 drr"
[all …]
/linux/arch/arm/mach-omap1/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/linux/include/uapi/linux/
H A Dmap_to_7segment.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
10 * of (ASCII) characters to a 7-segments notation.
15 * Notation: +-a-+
17 * +-g-+
19 * +-d-+
45 * return -EINVAL;
52 * 2005-05-31 RFC linux-kernel@vger.kernel.org
58 #define BIT_SEG7_B 1
72 return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL; in map_to_seg7()
97 _SEG7('!',0,0,0,0,1,1,0), _SEG7('"',0,1,0,0,0,1,0), _SEG7('#',0,1,1,0,1,1,0),\
[all …]
H A Dmap_to_14segment.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
14 * of (ASCII) characters to a 14-segments notation.
17 * See: https://en.wikipedia.org/wiki/Fourteen-segment_display
19 * Notation: +---a---+
23 * +-g1+-g2+
27 * +---d---+
53 * return -EINVAL;
65 #define BIT_SEG14_B 1
87 if (c < 0 || c >= sizeof(map->table) / sizeof(map->table[0])) in map_to_seg14()
88 return -EINVAL; in map_to_seg14()
[all …]
/linux/Documentation/driver-api/media/drivers/ccs/
H A Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
13 # v1.1 defined in version 1.1
23 - e GRBG 0
24 - e RGGB 1
[all …]
/linux/sound/soc/fsl/
H A Dfsl_esai.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * fsl_esai.h - ALSA ESAI interface for the Freescale i.MX SoC
52 /* ESAI Control Register -- REG_ESAI_ECR 0x8 */
54 #define ESAI_ECR_ETI_MASK (1 << ESAI_ECR_ETI_SHIFT)
55 #define ESAI_ECR_ETI (1 << ESAI_ECR_ETI_SHIFT)
57 #define ESAI_ECR_ETO_MASK (1 << ESAI_ECR_ETO_SHIFT)
58 #define ESAI_ECR_ETO (1 << ESAI_ECR_ETO_SHIFT)
60 #define ESAI_ECR_ERI_MASK (1 << ESAI_ECR_ERI_SHIFT)
61 #define ESAI_ECR_ERI (1 << ESAI_ECR_ERI_SHIFT)
63 #define ESAI_ECR_ERO_MASK (1 << ESAI_ECR_ERO_SHIFT)
[all …]
/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Dtaprio.json4 "name": "Add taprio Qdisc to multi-queue device (8 queues)",
13 "echo \"1 1 8\" > /sys/bus/netdevsim/new_device"
15 "cmdUnderTest": "$TC qdisc add dev $ETH root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entr
7 "taprio" global() string
24 { global() object
29 "taprio" global() string
51 "taprio" global() string
73 "taprio" global() string
80 "$TC qdisc add dev $ETH root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entry S 01 300000 flags 0x1 clo global() string
96 "taprio" global() string
118 "taprio" global() string
140 "taprio" global() string
147 "$TC qdisc add dev $ETH root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entry S 01 300000 flags 0x1 clo global() string
165 "taprio" global() string
173 "$TC qdisc replace dev $ETH handle 8001: parent root stab overhead 24 taprio num_tc 8 map 0 1 2 3 4 5 6 7 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 base-time 0 sched-entry global() string
183 "echo \"1\" > /sys/bus/netdevsim/del_device" global() string
191 "taprio" global() string
199 "$TC qdisc replace dev $ETH handle 8001: parent root stab overhead 24 taprio num_tc 8 map 0 1 2 3 4 5 6 7 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 base-time 0 sched-entry global() string
209 "echo \"1\" > /sys/bus/netdevsim/del_device" global() string
217 "taprio", global() string
225 "$TC qdisc replace dev $ETH handle 8001: parent root stab overhead 24 taprio num_tc 8 map 0 1 2 3 4 5 6 7 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 base-time 0 sched-entry global() string
234 "echo \"1\" > /sys/bus/netdevsim/del_device" global() string
242 "taprio", global() string
250 "$TC qdisc replace dev $ETH handle 8001: parent root stab overhead 24 taprio num_tc 8 map 0 1 2 3 4 5 6 7 queues 1@0 1@1 1@2 1@3 1@4 1@5 1@6 1@7 base-time 0 sched-entry global() string
259 "echo \"1\" > /sys/bus/netdevsim/del_device" global() string
[all...]
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/linux/arch/alpha/kernel/
H A Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
65 *------------------------------------------
67 * 1 NCR810 (builtin) 33
70 * 4 PCI slot 1 35
72 * 6 keyboard 1
76 *10 EISA irq 3 -
[all …]
/linux/arch/sh/drivers/pci/
H A Dfixups-sdk7780.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/drivers/pci/fixups-sdk7780.c
8 * Copyright (C) 2004 - 2006 Paul Mundt
14 #include "pci-sh4.h"
24 { IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,
25 -1, -1, -1, -1, -1, -1 },
27 { IRQ_INTB, IRQ_INTA, -1, IRQ_INTA, -1, -1, -1, -1, -1, -1, -1, -1,
28 -1, -1, -1, -1 },
30 { IRQ_INTC, IRQ_INTB, -1, IRQ_INTB, -1, -1, -1, -1, -1, -1, -1, -1,
31 -1, -1, -1, -1 },
[all …]
/linux/drivers/usb/gadget/udc/
H A Domap_udc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * omap_udc.h -- for omap 3.2 udc, with OTG support
15 # define UDC_SETUP_SEL (1 << 6)
16 # define UDC_EP_SEL (1 << 5)
17 # define UDC_EP_DIR (1 << 4)
21 # define UDC_CLR_HALT (1 << 7)
22 # define UDC_SET_HALT (1 << 6)
23 # define UDC_CLRDATA_TOGGLE (1 << 3)
24 # define UDC_SET_FIFO_EN (1 << 2)
25 # define UDC_CLR_EP (1 << 1)
[all …]

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