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Searched defs:BASE (Results 1 – 25 of 54) sorted by relevance

123

/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \ argument
187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \ argument
193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \ argument
199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
237 #define emit_jmpl(BASE, IMM_OFF, LREG) \ argument
/linux/arch/sparc/kernel/
H A Dsun4v_tlb_miss.S11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c142 #define BASE(seg) BASE_INNER(seg) macro
145 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_translate_dcn10.c48 #define BASE(seg) \ macro
H A Dhw_factory_dcn10.c54 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c48 #define BASE(seg) \ macro
H A Dhw_factory_dce120.c57 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_translate_dcn30.c57 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn30.c62 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_translate_dcn20.c52 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn20.c55 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_translate_dcn21.c52 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn21.c53 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_translate_dcn32.c50 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn32.c55 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
H A Dhw_translate_dcn401.c25 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn401.c35 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_translate_dcn315.c52 #define BASE(seg) BASE_INNER(seg) macro
H A Dhw_factory_dcn315.c59 #define BASE(seg) BASE_INNER(seg) macro
/linux/include/linux/
H A Dzutil.h53 #define BASE 65521L /* largest prime smaller than 65536 */ macro
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c47 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/media/tuners/
H A Dxc2028-types.h14 #define BASE (1<<0) macro
/linux/drivers/gpu/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c95 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c194 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn10/
H A Dirq_service_dcn10.c192 #define BASE(seg) \ macro

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