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Searched defs:BASE (Results 1 – 25 of 29) sorted by relevance

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/linux/rust/kernel/drm/
H A Dioctl.rs9 const BASE: u32 = uapi::DRM_IOCTL_BASE as u32; constant
/linux/kernel/sched/ext/
H A Dtypes.h155 #define __SCX_CMASK_DEFINE(NAME, BASE, NR_CIDS, ALLOC_CIDS) \ argument
170 #define SCX_CMASK_DEFINE(NAME, BASE, NR_CIDS) \ argument
184 #define SCX_CMASK_DEFINE_SHARD(NAME, BASE, NR_CIDS) \ argument
/linux/arch/sparc/kernel/
H A Dsun4v_tlb_miss.S11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \ argument
187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \ argument
193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \ argument
199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
237 #define emit_jmpl(BASE, IMM_OFF, LREG) \ argument
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c115 #define BASE(seg) BASE_INNER(seg) macro
118 #define BASE(seg) \ macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c48 #define BASE(seg) \ macro
H A Dhw_factory_dce120.c57 #define BASE(seg) \ macro
/linux/include/linux/
H A Dzutil.h53 #define BASE 65521L /* largest prime smaller than 65536 */ macro
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c47 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c54 #define BASE(seg) \ macro
/linux/drivers/media/tuners/
H A Dxc2028-types.h14 #define BASE (1<<0) macro
/linux/fs/xfs/libxfs/
H A Dxfs_da_btree.h165 #define XFS_DA_LOGOFF(BASE, ADDR) ((char *)(ADDR) - (char *)(BASE)) argument
166 #define XFS_DA_LOGRANGE(BASE, ADDR, SIZE) \ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c55 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c62 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c53 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c55 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
H A Dhw_factory_dcn401.c35 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c59 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/media/pci/cobalt/
H A Dcobalt-omnitek.c42 #define BASE (cobalt->bar0) macro
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dwb.h31 #define BASE(seg) \ macro
/linux/drivers/net/ethernet/smsc/
H A Dsmc9194.h99 #define BASE 2 macro
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h35 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c51 #define BASE(seg) BASE_INNER(seg) macro
/linux/drivers/ps3/
H A Dps3av_cmd.c489 #define BASE PS3AV_CMD_AUDIO_FS_44K macro
/linux/arch/mips/include/asm/mips-boards/
H A Dbonito64.h411 #define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBAS… argument

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