Lines Matching +full:fixed +full:- +full:rate +full:- +full:clocks

1 # SPDX-License-Identifier: GPL-2.0
59 	  Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
67 	  generators of audio clocks.
87 	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
91 	tristate "Raspberry Pi RP1-based clock support"
96 	  This multi-function device has 3 main PLLs and several clock
97 	  generators to drive the internal sub-peripherals.
106 	  multi-function device has one fixed-rate oscillator, clocked
113 	  This driver provides support for clocks that are controlled
123 	  This driver provides support for clocks that are controlled
137 	  be pre-programmed to support other configurations and features not yet
179 	  This driver supports the clocks on Bitmain BM1880 SoC.
186 	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
194 	  This driver supports the clocks provided by the TPS68470 PMIC.
204 	  For example, the CDCE925 contains two PLLs with spread-spectrum
206 	  the following setup, and uses a fixed setting for the output muxes.
214 	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
221 	bool "Clock driver for Airoha EN7523 SoC system clocks"
226 	  This driver provides the fixed clocks and gates present on Airoha
235 	  This driver supports the SoC clocks on the Cirrus Logic ep93xx.
243 	  This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H
245 	  provides read-only PLLs, derived from the main crystal clock (which
246 	  must be constant). It also exposes some divider clocks.
274 	  This driver supports the SoC clocks on the Cortina Systems Gemini
294 	  This driver supports the SoC clocks on the Aspeed BMC platforms.
304 	  clock. These multi-function devices have two (S2MPS14) or three
305 	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
313 	  controlled by software. For now, the TWL6032 and TWL6030 clocks are
329 	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
345           This driver support the Display output interfaces(LCD, DPHY) pixel clocks
355 	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
369 	  This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family,
370 	  all the clocks are initialized by the bootloader, so this driver
374 	bool "Clock driver for Loongson-2 SoC"
377           This driver provides support for clock controller on Loongson-2 SoC.
380           Say Y here to support Loongson-2 SoC clock driver.
409 	tristate "Clock driver for Renesas 9-series PCIe clock generators"
414 	  This driver supports the Renesas 9-series PCIe clock generator
456 	  Support for stm32f4 and stm32f7 SoC families clocks
461 	  Support for stm32h7 SoC family clocks
466 	  Support for Marvell MMP2 and MMP3 SoC clocks
472           This driver supports clocks for Audio subsystem on MMP2 SoC.
482 	bool "Clock driver for Memory Mapped Fixed values"
486 	  Support for Memory Mapped IO Fixed clocks
493 	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.
500 	  This driver supports the Sunplus SP7021 SoC clocks.
506 	tristate "Clock driver based on RISC-V RPMI"
511 	  Support for clocks based on the clock service group defined by
512 	  the RISC-V platform management interface (RPMI) specification.
516 source "drivers/clk/baikal-t1/Kconfig"
543 source "drivers/clk/sunxi-ng/Kconfig"
564 	tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS
569 	  KUnit tests for the basic fixed rate clk type.
584 	  Kunit test for the clk-fractional-divider type.