| 20796678 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add feature support
Lan969x supports a number of different features, depending on the
target. Add new field sparx5->features and initialize the features based
on the target. Also add th
net: sparx5: add feature support
Lan969x supports a number of different features, depending on the
target. Add new field sparx5->features and initialize the features based
on the target. Also add the function sparx5_has_feature() and use it
throughout. For now, we only need to handle features: PSFP and PTP -
more will come in the future.
[1] https://www.microchip.com/en-us/product/lan9698
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-15-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 98a01119 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add compatible string for lan969x
Add lan9691-switch compatible string to mchp_sparx5_match. Guard it with
IS_ENABLED(CONFIG_LAN969X_SWITCH) to make sure Sparx5 can be compiled on
its o
net: sparx5: add compatible string for lan969x
Add lan9691-switch compatible string to mchp_sparx5_match. Guard it with
IS_ENABLED(CONFIG_LAN969X_SWITCH) to make sure Sparx5 can be compiled on
its own.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-14-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| b074c5e6 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: use is_sparx5() macro throughout
Use the is_sparx5() macro (introduced in earlier series [1]), in places
where we need to handle things a bit differently on lan969x.
These places are:
net: sparx5: use is_sparx5() macro throughout
Use the is_sparx5() macro (introduced in earlier series [1]), in places
where we need to handle things a bit differently on lan969x.
These places are:
- in sparx5_dsm_calendar_update() we need to switch the calendar
from a to b on lan969x.
- in sparx5_start() we need to make sure the HSCH_SYS_CLK_PER
register is only touched on Sparx5.
- in sparx5_start() we need to disable VCAP and FDMA for lan969x
(will come in later series).
- in sparx5_mirror_port_get() we must make sure the
ANA_AC_PROBE_PORT_CFG1 register is only read on Sparx5.
- sparx5_netdev.c and sparx5_packet.c we need to use different IFH
(Internal Frame Header) offsets for lan969x.
- in sparx5_port_fifo_sz() we must bail out on lan969x.
- in sparx5_port_config_low_set() we must configure the phase
detection registers.
- in sparx5_port_config() and sparx5_port_init() we must do some
additional configuration of the port devices.
- in sparx5_dwrr_conf_set() we must derive the scheduling layer
[1] https://lore.kernel.org/netdev/20241004-b4-sparx5-lan969x-switch-driver-v2-8-d3290f581663@microchip.com/
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-12-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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| 5d2ba394 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: lan969x: add function for calculating the DSM calendar
Lan969x has support for RedBox / HSR / PRP (not implemented yet). In
order to accommodate for this in the future, we need to give lan969x
net: lan969x: add function for calculating the DSM calendar
Lan969x has support for RedBox / HSR / PRP (not implemented yet). In
order to accommodate for this in the future, we need to give lan969x it's
own function for calculating the DSM calendar.
The function calculates the calendar for each taxi bus. The calendar is
used for bandwidth allocation towards the ports attached to the taxi
bus. A calendar configuration consists of up-to 64 slots, which may be
allocated to ports or left unused. Each slot accounts for 1 clock cycle.
Also expose sparx5_cal_speed_to_value(), sparx5_get_port_cal_speed,
sparx5_cal_bw and SPX5_DSM_CAL_EMPTY for use by lan969x.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-11-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 24fe8354 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: lan969x: add PTP handler function
Add PTP IRQ handler for lan969x. This is required, as the PTP registers
are placed in two different targets on Sparx5 and lan969x. The
implementation is otherw
net: lan969x: add PTP handler function
Add PTP IRQ handler for lan969x. This is required, as the PTP registers
are placed in two different targets on Sparx5 and lan969x. The
implementation is otherwise the same as on Sparx5.
Also, expose sparx5_get_hwtimestamp() for use by lan969x.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-10-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 69b61425 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: lan969x: add register diffs to match data
Add new file lan969x_regs.c that defines all the register differences
for lan969x, and add it to the lan969x match data.
GW_DEV2G5_PHASE_DETECTOR_CTRL
net: lan969x: add register diffs to match data
Add new file lan969x_regs.c that defines all the register differences
for lan969x, and add it to the lan969x match data.
GW_DEV2G5_PHASE_DETECTOR_CTRL, FP_DEV2G5_PHAD_CTRL_PHAD_ENA and
FP_DEV2G5_PHAD_CTRL_PHAD_FAILED are required by the new register macros
which was introduced earlier. Add these for Sparx5 also.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-7-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 19949849 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add registers required by lan969x
Lan969x will require a few additional registers for certain operations.
Some are shared, some are not. Add these.
Reviewed-by: Steen Hegelund <Steen.H
net: sparx5: add registers required by lan969x
Lan969x will require a few additional registers for certain operations.
Some are shared, some are not. Add these.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-5-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| ead854c4 | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add sparx5 context pointer to a few functions
In preparation for lan969x, add the sparx5 context pointer to certain
IFH (Internal Frame Header) functions. This is required, as the
is_sp
net: sparx5: add sparx5 context pointer to a few functions
In preparation for lan969x, add the sparx5 context pointer to certain
IFH (Internal Frame Header) functions. This is required, as the
is_sparx5() function will be used here in a subsequent patch.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-4-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 728267dc | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: change frequency calculation for SDLB's
In preparation for lan969x, rework the function that calculates the SDLB
(Service Dual Leacky Bucket) clock. This is required, as the
HSCH_SYS_CL
net: sparx5: change frequency calculation for SDLB's
In preparation for lan969x, rework the function that calculates the SDLB
(Service Dual Leacky Bucket) clock. This is required, as the
HSCH_SYS_CLK_PER register is Sparx5-exclusive. Instead derive the clock
from the core clock, using the sparx5_clk_period() function. The clock
stays the same before and after this patch, only now,
sparx5_sdlb_clk_hz_get() can be used for lan969x too.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-3-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 9324881c | 24-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: change spx5_wr to spx5_rmw in cal update()
In preparation for lan969x, use spx5_rmw() for enabling the update of
the calendar. This is required to not overwrite the DSM_TAXI_CAL_CFG
reg
net: sparx5: change spx5_wr to spx5_rmw in cal update()
In preparation for lan969x, use spx5_rmw() for enabling the update of
the calendar. This is required to not overwrite the DSM_TAXI_CAL_CFG
register, as an additional write will be added before this one, in a
subsequent patch.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-2-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
show more ...
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| 4b67bcb9 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add is_sparx5 macro and use it throughout
We dont want to ops out each time a function needs to do some platform
specifics. In particular we have a few places, where it would be
conveni
net: sparx5: add is_sparx5 macro and use it throughout
We dont want to ops out each time a function needs to do some platform
specifics. In particular we have a few places, where it would be
convenient to just branch out on the platform type. Add the function
is_sparx5() and, initially, use it for:
- register writes that should only be done on Sparx5 (QSYS_CAL_CTRL,
CLKGEN_LCPLL1_CORE_CLK).
- function calls that should only be done on Sparx5
(ethtool_op_get_ts_info())
- register writes that are chip-exclusive (MASK_CFG1/2, PGID_CFG1/2,
these are replicated for n_ports >32 on Sparx5).
The is_sparx5() function simply checks the target chip type, to
determine if this is a Sparx5 SKU or not.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| a0dd8906 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: ops out function for DSM calendar calculation
The DSM (Disassembler) calendar grants each port access to internal
busses. The configuration of the calendar is done differently on Sparx5
net: sparx5: ops out function for DSM calendar calculation
The DSM (Disassembler) calendar grants each port access to internal
busses. The configuration of the calendar is done differently on Sparx5
and lan969x. Therefore ops out the function that calculates the
calendar.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| 8c274d69 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: ops out PTP IRQ handler
The PTP registers are located in two different register targets on
Sparx5 and lan969x. We can't handle this with the register macros, so
ops out the handler.
Re
net: sparx5: ops out PTP IRQ handler
The PTP registers are located in two different register targets on
Sparx5 and lan969x. We can't handle this with the register macros, so
ops out the handler.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| b7e09ddb | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: ops out function for setting the port mux
Port muxing is configured based on the supported port modes. As these
modes can differ on Sparx5 and lan969x we ops out the port muxing
functio
net: sparx5: ops out function for setting the port mux
Port muxing is configured based on the supported port modes. As these
modes can differ on Sparx5 and lan969x we ops out the port muxing
function.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| beb36b50 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: ops out functions for getting certain array values
Add getters for getting values in arrays: sdlb_groups and
sparx5_hsch_max_group_rate and ops out the getters, as these arrays will
dif
net: sparx5: ops out functions for getting certain array values
Add getters for getting values in arrays: sdlb_groups and
sparx5_hsch_max_group_rate and ops out the getters, as these arrays will
differ on lan969x.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| 20f8bc87 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: ops out chip port to device index/bit functions
The chip port device index and mode bit can be obtained using the port
number. However the mapping of port number to chip device index a
net: sparx5: ops out chip port to device index/bit functions
The chip port device index and mode bit can be obtained using the port
number. However the mapping of port number to chip device index and
mode bit differs on Sparx5 and lan969x. Therefore ops out the function.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| 048c9690 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add ops to match data
Add new struct sparx5_ops, containing functions that needs to be
different as the implementation differs on Sparx5 and lan969x. Initially
we add functions for chec
net: sparx5: add ops to match data
Add new struct sparx5_ops, containing functions that needs to be
different as the implementation differs on Sparx5 and lan969x. Initially
we add functions for checking the port type (2g5, 5g, 10g or 25g) based
on the port number. Update the code to use the ops instead of the
platform specific functions.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| 559fb423 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: use SPX5_CONST for constants which do not have a symbol
Now that we have indentified all the chip constants, update the use of
them where a symbol is not defined for the constant.
Revi
net: sparx5: use SPX5_CONST for constants which do not have a symbol
Now that we have indentified all the chip constants, update the use of
them where a symbol is not defined for the constant.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| 3f9e4634 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: use SPX5_CONST for constants which already have a symbol
Now that we have indentified all the chip constants, update the use of
them where a symbol is already defined for the constant.
net: sparx5: use SPX5_CONST for constants which already have a symbol
Now that we have indentified all the chip constants, update the use of
them where a symbol is already defined for the constant.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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| d5a1eb48 | 04-Oct-2024 |
Daniel Machon <daniel.machon@microchip.com> |
net: sparx5: add constants to match data
Add new struct sparx5_consts, containing all the chip constants that are
known to be different for Sparx5 and lan969x.
Reviewed-by: Steen Hegelund <Steen.He
net: sparx5: add constants to match data
Add new struct sparx5_consts, containing all the chip constants that are
known to be different for Sparx5 and lan969x.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
show more ...
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