| 678e9409 | 16-Jun-2026 |
Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> |
i3c: mipi-i3c-hci: Use named initializers for platform_device_id's .driver_data
The assignment in this driver uses a mixed way to initialize the platform_device_id array. .name is assigned by name a
i3c: mipi-i3c-hci: Use named initializers for platform_device_id's .driver_data
The assignment in this driver uses a mixed way to initialize the platform_device_id array. .name is assigned by name and .driver_data by position. Unify that to use named assignment for both struct members. This is needed for a planned change to struct platform_device_id replacing .driver_data by an anonymous union.
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://patch.msgid.link/7c006616f72748fb4deccd197ca2b6427c006f79.1781620397.git.ukleinek@kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 225b76e2 | 16-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Use unsigned int for dev_nack_retry_count consistently
Use unsigned int for dev_nack_retry_count across the core and controller drivers to match the type of master->dev_nack_retry_count
i3c: master: Use unsigned int for dev_nack_retry_count consistently
Use unsigned int for dev_nack_retry_count across the core and controller drivers to match the type of master->dev_nack_retry_count.
Update the sysfs store path to use kstrtouint() and adjust the ->set_dev_nack_retry() callback prototype and callers accordingly.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260616113752.196140-4-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 79ce29e1 | 16-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Add missing runtime PM get in dev_nack_retry_count_store()
Ensure the device is runtime resumed while updating the retry configuration to avoid accessing the controller while suspended.
i3c: master: Add missing runtime PM get in dev_nack_retry_count_store()
Ensure the device is runtime resumed while updating the retry configuration to avoid accessing the controller while suspended.
Call i3c_master_rpm_get() before accessing the controller in dev_nack_retry_count_store() and release it with i3c_master_rpm_put() afterwards.
Fixes: 990c149c61ee4 ("i3c: master: Introduce optional Runtime PM support") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260616113752.196140-3-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| ab5f9c5c | 16-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Update dev_nack_retry_count under maintenance lock
Protect master->dev_nack_retry_count against concurrent sysfs updates by updating it while holding the bus maintenance lock.
Conseque
i3c: master: Update dev_nack_retry_count under maintenance lock
Protect master->dev_nack_retry_count against concurrent sysfs updates by updating it while holding the bus maintenance lock.
Consequently, combine adjacent return statements into one.
For consistency, read dev_nack_retry_count while holding the bus normaluse lock.
Fixes: b58f47eb39268 ("i3c: add sysfs entry and attribute for Device NACK Retry count") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260616113752.196140-2-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 8d8afa42 | 12-Jun-2026 |
Aman Kumar Pandey <aman.kumarpandey@nxp.com> |
i3c: master: Expose the APIs to support I3C hub
Change the below internal static functions to APIs to allow new I3C hub driver to use them
1) i3c_dev_enable_ibi_locked() 2) i3c_dev_disable_ibi_lock
i3c: master: Expose the APIs to support I3C hub
Change the below internal static functions to APIs to allow new I3C hub driver to use them
1) i3c_dev_enable_ibi_locked() 2) i3c_dev_disable_ibi_locked() 3) i3c_dev_request_ibi_locked() 4) i3c_dev_free_ibi_locked() 5) i3c_master_reattach_i3c_dev_locked()
Signed-off-by: Aman Kumar Pandey <aman.kumarpandey@nxp.com> Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612111816.3688240-3-lakshay.piplani@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 79c41666 | 12-Jun-2026 |
Lakshay Piplani <lakshay.piplani@nxp.com> |
i3c: master: rename i3c_master_reattach_i3c_dev() to *_locked
Rename i3c_master_reattach_i3c_dev() to *_locked() to make the locking requirement explicit and consistent with other I3C core helpers t
i3c: master: rename i3c_master_reattach_i3c_dev() to *_locked
Rename i3c_master_reattach_i3c_dev() to *_locked() to make the locking requirement explicit and consistent with other I3C core helpers that require the bus lock to be held by the caller.
Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612111816.3688240-2-lakshay.piplani@nxp.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| efaa912a | 25-May-2026 |
Manikandan Muralidharan <manikandan.m@microchip.com> |
i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the required quirk
Add support for microchip sama7d65 SoC I3C HCI master only IP with additional clock support to enable bulk clock acqu
i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the required quirk
Add support for microchip sama7d65 SoC I3C HCI master only IP with additional clock support to enable bulk clock acquisition and apply the required quirks.
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260525092405.1514213-4-manikandan.m@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 9972c11b | 04-May-2026 |
Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> |
i3c: Consistently define pci_device_ids using named initializers
The .driver_data member of the various struct pci_device_id arrays were initialized by list expressions. This isn't easily readable i
i3c: Consistently define pci_device_ids using named initializers
The .driver_data member of the various struct pci_device_id arrays were initialized by list expressions. This isn't easily readable if you're not into PCI. Using named initializers is more explicit and thus easier to parse.
This change doesn't introduce changes to the compiled pci_device_id arrays. Tested on x86 and arm64.
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260504143324.2122737-2-u.kleine-koenig@baylibre.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 4438609e | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Reconcile dynamic addresses after DAA
After Dynamic Address Assignment (DAA), there may be cases where devices have been assigned dynamic addresses on the bus, but are not successfully
i3c: master: Reconcile dynamic addresses after DAA
After Dynamic Address Assignment (DAA), there may be cases where devices have been assigned dynamic addresses on the bus, but are not successfully registered in the device model. This can happen, for example, if errors occur during device addition, leaving the bus state and software state inconsistent.
Introduce a reconciliation step to resolve such inconsistencies.
Scan all address slots marked as I3C devices by the bus, and compare them against the set of devices currently registered. For any dynamic address that is marked occupied but has no corresponding i3c_dev_desc, probe for device presence using a GETSTATUS CCC.
Retry the probe (with exponential backoff delay) to handle transient NACK conditions. If a device responds, register it via i3c_master_add_i3c_dev_locked(). Otherwise, free the address slot so it may be reused in future DAA operations.
Note, i3c_master_add_i3c_dev_locked() may fail (again), in which case the dynamic address remains marked as occupied. A future DAA will try again.
This also handles a corner case where a device is assigned a dynamic address but not successfully added, and subsequently loses that address (e.g. due to power management). If DAA is run again, the device may receive a new dynamic address while the old one remains marked as occupied. Repeated occurrences of this scenario could eventually exhaust the dynamic address space. The reconciliation step ensures that stale addresses are detected and freed, preventing address leakage.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-8-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 94daedb4 | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Move DAA API functions after i3c_master_add_i3c_dev_locked()
Relocate i3c_master_do_daa_ext() and i3c_master_do_daa() so they appear after i3c_master_add_i3c_dev_locked().
This orderin
i3c: master: Move DAA API functions after i3c_master_add_i3c_dev_locked()
Relocate i3c_master_do_daa_ext() and i3c_master_do_daa() so they appear after i3c_master_add_i3c_dev_locked().
This ordering is required for upcoming changes where the DAA flow will (indirectly) rely on i3c_master_add_i3c_dev_locked() functionality. Reordering avoids forward dependency issues and keeps related code paths logically arranged.
No functional change.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-7-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 689d0bd8 | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Make i3c_master_add_i3c_dev_locked() return void
The return value of i3c_master_add_i3c_dev_locked() is not used by any caller, and callers are not in a position to recover from failure
i3c: master: Make i3c_master_add_i3c_dev_locked() return void
The return value of i3c_master_add_i3c_dev_locked() is not used by any caller, and callers are not in a position to recover from failures in this path.
Change the function to return void. Amend the kernel-doc accordingly, fix some grammar and remove a stale paragraph.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-6-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| c236563c | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Tolerate i3c_master_add_i3c_dev_locked() failures in DAA
i3c_master_add_i3c_dev_locked() no longer leaves the address marked as free on failure, so aborting the DAA sequence on it
i3c: mipi-i3c-hci: Tolerate i3c_master_add_i3c_dev_locked() failures in DAA
i3c_master_add_i3c_dev_locked() no longer leaves the address marked as free on failure, so aborting the DAA sequence on its error is unnecessary.
Failure to register a discovered device does not invalidate the entire Dynamic Address Assignment (DAA) procedure. Align with the behavior of other I3C master drivers by ignoring errors from i3c_master_add_i3c_dev_locked() and continuing enumeration.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-5-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| b3ba8383 | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Prevent reuse of dynamic address on device add failure
i3c_master_add_i3c_dev_locked() is called after a device has already been assigned a dynamic address. If the function fails, the
i3c: master: Prevent reuse of dynamic address on device add failure
i3c_master_add_i3c_dev_locked() is called after a device has already been assigned a dynamic address. If the function fails, the address remains marked as free and may be reallocated to another device, leading to address conflicts on the bus.
Ensure the address is not marked as free on failure, by updating the address slot state to prevent the address from being re-used.
Emit an error message to inform of the failure.
Opportunistically remove the !master check because it is impossible.
Note, directly resetting the device's dynamic address is no longer an option, since Direct RSTDAA was deprecated from I3C starting from version 1.1 and v1.1 (or later) target devices are meant to NACK it.
Fixes: 3a379bbcea0af ("i3c: Add core I3C infrastructure") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-4-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| ad7fba5c | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Ignore DISEC failures when disabling IBIs
Disabling IBIs currently returns the result of the DISEC CCC, causing i3c_hci_disable_ibi() to fail if the transfer errors out.
However,
i3c: mipi-i3c-hci: Ignore DISEC failures when disabling IBIs
Disabling IBIs currently returns the result of the DISEC CCC, causing i3c_hci_disable_ibi() to fail if the transfer errors out.
However, the controller has already been programmed to reject IBIs by setting DAT_0_SIR_REJECT, so the target’s IBIs are effectively disabled from the host side regardless of the outcome of the DISEC command. At this point, teardown of the IBI infrastructure can safely proceed even if DISEC fails.
Note, from then on, the MIPI I3C HCI not only NACKs the target's IBI but automatically sends another DISEC command.
Make i3c_hci_disable_ibi() resilient by ignoring the return value of i3c_master_disec_locked() and always returning success.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-3-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 650716f2 | 12-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Fix race in i3c_hci_addr_to_dev()
i3c_hci_addr_to_dev() walks bus->devs.i3c, which is protected by bus.lock (rwsem). However, it is invoked from the MIPI I3C HCI IRQ handler, whi
i3c: mipi-i3c-hci: Fix race in i3c_hci_addr_to_dev()
i3c_hci_addr_to_dev() walks bus->devs.i3c, which is protected by bus.lock (rwsem). However, it is invoked from the MIPI I3C HCI IRQ handler, which cannot take bus.lock. This allows concurrent device addition/removal in the I3C core to modify the list while it is being traversed, potentially leading to use-after-free or crashes.
Remove the dependency on the bus device list and introduce a dedicated lookup table. Add an ibi_devs[] array indexed by DAT entry, maintained under hci->lock. Update the array when IBIs are enabled or disabled, so that it always reflects the set of devices allowed to generate IBIs. Also update when IBIs are freed, to cover the corner case when an IBI is freed without first being disabled (e.g. oldedev in i3c_master_add_i3c_dev_locked()).
Move i3c_hci_addr_to_dev() into core.c, reimplement it using the new array, and add a lockdep assertion to enforce that hci->lock is held by callers.
Demote a message in PIO and DMA IBI handling, from an error to a debug message, because there is a race window when the condition can arise normally.
Fixes: 9ad9a52cce282 ("i3c/master: introduce the mipi-i3c-hci driver") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260612080107.11606-2-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 32fcf003 | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Add Hot-Join support
Wire the MIPI I3C HCI driver into the I3C core Hot-Join framework to allow targets to dynamically join the bus after initial DAA.
HCI hardware ACKs or NACKs
i3c: mipi-i3c-hci: Add Hot-Join support
Wire the MIPI I3C HCI driver into the I3C core Hot-Join framework to allow targets to dynamically join the bus after initial DAA.
HCI hardware ACKs or NACKs Hot-Join requests based on HC_CONTROL.HOT_JOIN_CTRL. This was previously left in the NACK-and-DISEC state, effectively preventing Hot-Join. Implement the ->enable_hotjoin() and ->disable_hotjoin() master operations so the core and user space can control this policy at runtime.
Also issue broadcast ENEC HJ when enabling Hot-Join. This is required because the controller may have previously DISEC'ed the Hot-Join event, causing targets that were NACKed once to never retry.
Acknowledged Hot-Join requests are delivered as IBIs on the reserved address 0x02. Update both the DMA and PIO IBI paths to recognise this address and forward the event to i3c_master_queue_hotjoin().
To make Hot-Join usable by default, enable it once after the initial DAA. This is gated by rpm_ibi_allowed, since otherwise keeping Hot-Join enabled prevents runtime suspend. A new hj_init_done flag ensures this one-time enablement is not repeated on subsequent DAAs.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-9-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 4bfba7b3 | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Export i3c_master_enec_disec_locked()
The existing i3c_master_enec_locked() wrapper always treats a NACKed ENEC CCC as a failure (M2 error). However, broadcasting ENEC to enable Hot-Jo
i3c: master: Export i3c_master_enec_disec_locked()
The existing i3c_master_enec_locked() wrapper always treats a NACKed ENEC CCC as a failure (M2 error). However, broadcasting ENEC to enable Hot-Join is legitimately useful even when no I3C devices are currently present on the bus, in which case the broadcast will be NACKed and should not be reported as an error.
The underlying helper i3c_master_enec_disec_locked() already accepts a suppress_m2 flag that lets callers ignore such NACKs. Expose it so that a subsequent patch enabling Hot-Join events can issue ENEC with M2 suppression.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-8-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 3f79dac3 | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Defer new-device registration out of DAA caller context
Master drivers may invoke i3c_master_do_daa_ext() during resume to re-run Dynamic Address Assignment. As well as assigning addre
i3c: master: Defer new-device registration out of DAA caller context
Master drivers may invoke i3c_master_do_daa_ext() during resume to re-run Dynamic Address Assignment. As well as assigning addresses to any newly arrived devices, this restores the dynamic address of devices that lost it across system suspend, so it has to run as part of the controller's resume path.
A side effect of i3c_master_do_daa_ext() today is that it also registers any newly discovered I3C devices with the driver model inline, via i3c_master_register_new_i3c_devs(). Doing that from the resume path is problematic: a hot-join-capable device may join the bus during this same DAA, and registering it immediately would push driver model work (probing, sysfs, etc.) into the controller's resume context, where the rest of the system is not yet fully resumed and the controller driver is still partway through its own resume sequence.
Decouple discovery from registration: add a reg_work work item to struct i3c_master_controller and have i3c_master_do_daa_ext() queue it on master->wq (the freezable workqueue) instead of calling i3c_master_register_new_i3c_devs() directly. The worker performs the registration only when the controller is not shutting_down, and is cancelled alongside hj_work in i3c_master_shutdown(). Because wq is freezable, any newly observed devices end up being registered after the system has finished resuming.
i3c_master_register() also routes its initial post-bus-init registration through reg_work, using flush_work() to keep probe-time behavior synchronous. This keeps a single registration code path and ensures the worker is the only writer of desc->dev.
Fixes: 3a379bbcea0af ("i3c: Add core I3C infrastructure") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-7-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 0cbefeaf | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: dw: Drop redundant Hot-Join cancel_work_sync() in shutdown
The I3C core now installs an i3c_bus_type shutdown callback that flushes master->hj_work (via i3c_master_shutdown()) before any driver
i3c: dw: Drop redundant Hot-Join cancel_work_sync() in shutdown
The I3C core now installs an i3c_bus_type shutdown callback that flushes master->hj_work (via i3c_master_shutdown()) before any driver's platform shutdown hook runs. The explicit cancel_work_sync() in dw_i3c_shutdown() is therefore redundant: by the time it executes, the Hot-Join worker has already been cancelled, and the shutting_down gate makes a new worker a no-op.
Remove the now-unneeded call. No functional change.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-6-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 8323e783 | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Ensure Hot-Join operations are stopped on shutdown
System shutdown invokes each device's bus shutdown callback to quiesce hardware, but the I3C bus type does not currently implement one
i3c: master: Ensure Hot-Join operations are stopped on shutdown
System shutdown invokes each device's bus shutdown callback to quiesce hardware, but the I3C bus type does not currently implement one. As a result, on shutdown the controller's Hot-Join work and any in-flight i3c_master_do_daa() can keep running (or be newly triggered) while the rest of the system is being torn down.
A similar window exists at i3c_master_unregister() time: cancel_work_sync() on hj_work prevents queued work from completing, but does not stop a fresh Hot-Join IBI from re-queueing the worker, nor a concurrent sysfs writer from toggling Hot-Join via i3c_set_hotjoin().
Introduce a single "shutting down" gate in the I3C core, set under the bus maintenance lock so it is observed by any in-progress DAA path before pending work is cancelled. Install an i3c_bus_type shutdown callback that engages this gate for master devices during system shutdown, and use the same gate in i3c_master_unregister() so both paths get identical guarantees.
Once the gate is engaged, the Hot-Join worker, i3c_master_do_daa_ext() and i3c_set_hotjoin() all bail out cleanly, so Hot-Join IBIs that race with shutdown become no-ops, direct DAA callers see -ENODEV, and sysfs writers can no longer re-enable Hot-Join through ops->enable_hotjoin() while the controller is going away.
No functional change for the steady-state runtime path; the new checks only take effect once the controller has been marked as shutting down.
Note, this patch depends on patch "i3c: master: Consolidate Hot-Join DAA work in the core".
Fixes: 3a379bbcea0af ("i3c: Add core I3C infrastructure") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-5-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 828c6130 | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Consolidate Hot-Join DAA work in the core
Three master drivers (dw-i3c-master, i3c-master-cdns, svc-i3c-master) each carry an essentially identical Hot-Join handler: a struct work_struc
i3c: master: Consolidate Hot-Join DAA work in the core
Three master drivers (dw-i3c-master, i3c-master-cdns, svc-i3c-master) each carry an essentially identical Hot-Join handler: a struct work_struct embedded in their private state, a work function that just calls i3c_master_do_daa() on the embedded i3c_master_controller, plus matching INIT_WORK()/cancel_work_sync() boilerplate in probe/remove (and shutdown for dw-i3c). The IBI/ISR paths then queue that work onto master->wq, which already lives in the core.
Move this pattern into the I3C core:
- Add struct work_struct hj_work to struct i3c_master_controller and initialise it in i3c_master_register() with a core-provided handler i3c_master_hj_work_fn() that performs i3c_master_do_daa(). - Cancel the work in i3c_master_unregister() so all controllers get correct teardown ordering against the workqueue for free. - Export i3c_master_queue_hotjoin() as the single entry point drivers call from their Hot-Join IBI handler.
Convert the three existing users to the new API: drop their private hj_work fields, work functions, INIT_WORK() and cancel_work_sync() calls, and replace the queue_work(master->wq, &drv->hj_work) call sites with i3c_master_queue_hotjoin(&drv->base). The dw-i3c shutdown path still needs to flush pending Hot-Join work before tearing down the hardware, so it is updated to cancel master->base.hj_work directly.
No functional change intended: the work is still queued on the same master->wq, runs the same i3c_master_do_daa(), and is cancelled at controller teardown. Future Hot-Join improvements now only need to be made in one place.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-4-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 5b130aad | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Serialize i3c_set_hotjoin() with the maintenance lock
i3c_set_hotjoin() dispatches the controller's enable_hotjoin() or disable_hotjoin() op and updates master->hotjoin under i3c_bus_no
i3c: master: Serialize i3c_set_hotjoin() with the maintenance lock
i3c_set_hotjoin() dispatches the controller's enable_hotjoin() or disable_hotjoin() op and updates master->hotjoin under i3c_bus_normaluse_lock(). That lock is a read-side acquisition of bus->lock (down_read()), so it does not exclude concurrent callers.
The hotjoin sysfs attribute can be opened multiple times, and writes through different opens are not serialized. Two concurrent writers to "hotjoin" can therefore race in i3c_set_hotjoin(), with the controller op and the master->hotjoin store from one call interleaving with the other. The hardware enable/disable state and the value reported by hotjoin_show() can end up out of sync.
Take i3c_bus_maintenance_lock() instead. Toggling Hot Join enable changes bus state and is conceptually a maintenance operation, so the write-side acquisition of bus->lock is the appropriate lock and serializes concurrent callers against each other and against other maintenance operations.
Fixes: 317bacf960a48 ("i3c: master: add enable(disable) hot join in sys entry") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-3-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 527756cb | 08-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: master: Make hot-join workqueue freezable to block hot-join during suspend
The I3C master workqueue (master->wq) is used to defer work that needs thread context and the bus maintenance lock, mo
i3c: master: Make hot-join workqueue freezable to block hot-join during suspend
The I3C master workqueue (master->wq) is used to defer work that needs thread context and the bus maintenance lock, most notably Hot Join processing (which calls i3c_master_do_daa() to assign dynamic addresses to newly joined devices).
Currently the workqueue keeps running across system suspend, which can race with the suspend path:
- do_daa() may execute after the controller has been suspended, issuing bus transactions on a powered-down or otherwise unusable controller. - New I3C devices can be enumerated and added to the bus mid-suspend, registering driver model objects at a point where the I3C subsystem and its consumers are not prepared to handle them.
Mark the workqueue WQ_FREEZABLE so its workers are frozen for the duration of system suspend/hibernate and resumed afterwards. This naturally defers any pending or newly queued Hot Join work until the system (and the controller) is fully resumed, closing both races without adding explicit suspend/resume synchronization in the master drivers.
Update the kerneldoc for struct i3c_master_controller::wq to reflect that the workqueue is freezable.
Fixes: 3a379bbcea0af ("i3c: Add core I3C infrastructure") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260608054312.10604-2-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| e62fe9f2 | 03-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Increase DMA transfer ring size to maximum
The DMA transfer ring is currently limited to 16 entries, despite the MIPI I3C HCI supporting up to 32 devices. When the ring lacks spa
i3c: mipi-i3c-hci: Increase DMA transfer ring size to maximum
The DMA transfer ring is currently limited to 16 entries, despite the MIPI I3C HCI supporting up to 32 devices. When the ring lacks space for a new transfer list, the driver returns -EBUSY, which can be unexpected for clients.
Increase the DMA transfer ring size to the maximum supported value of 255 entries. This effectively eliminates ring-space exhaustion in practice and avoids the complexity of adding secondary queuing mechanisms.
Even at the maximum size, the memory overhead remains small (approximately 24 bytes per entry by default).
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260603090754.16252-18-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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| 1a7c9c14 | 03-Jun-2026 |
Adrian Hunter <adrian.hunter@intel.com> |
i3c: mipi-i3c-hci: Consolidate DMA ring allocation
dma_alloc_coherent() allocates memory in whole pages, which can waste space when command and response queues are allocated separately.
Allocate th
i3c: mipi-i3c-hci: Consolidate DMA ring allocation
dma_alloc_coherent() allocates memory in whole pages, which can waste space when command and response queues are allocated separately.
Allocate the DMA command and response queues from a single coherent allocation instead, while preserving the required 4-byte alignment.
This reduces memory overhead without changing behavior.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260603090754.16252-17-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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