xref: /linux/drivers/i3c/master.c (revision 8d8afa428318a623aa674c3f90550475ad3e6ccd)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/bitmap.h>
10 #include <linux/bug.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/err.h>
15 #include <linux/export.h>
16 #include <linux/kernel.h>
17 #include <linux/list.h>
18 #include <linux/of.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/slab.h>
21 #include <linux/spinlock.h>
22 #include <linux/workqueue.h>
23 
24 #include "internals.h"
25 
26 static DEFINE_IDR(i3c_bus_idr);
27 static DEFINE_MUTEX(i3c_core_lock);
28 static int __i3c_first_dynamic_bus_num;
29 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
30 
31 /**
32  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
33  * @bus: I3C bus to take the lock on
34  *
35  * This function takes the bus lock so that no other operations can occur on
36  * the bus. This is needed for all kind of bus maintenance operation, like
37  * - enabling/disabling slave events
38  * - re-triggering DAA
39  * - changing the dynamic address of a device
40  * - relinquishing mastership
41  * - ...
42  *
43  * The reason for this kind of locking is that we don't want drivers and core
44  * logic to rely on I3C device information that could be changed behind their
45  * back.
46  */
47 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
48 {
49 	down_write(&bus->lock);
50 }
51 
52 /**
53  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
54  *			      operation
55  * @bus: I3C bus to release the lock on
56  *
57  * Should be called when the bus maintenance operation is done. See
58  * i3c_bus_maintenance_lock() for more details on what these maintenance
59  * operations are.
60  */
61 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
62 {
63 	up_write(&bus->lock);
64 }
65 
66 /**
67  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
68  * @bus: I3C bus to take the lock on
69  *
70  * This function takes the bus lock for any operation that is not a maintenance
71  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
72  * maintenance operations). Basically all communications with I3C devices are
73  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
74  * state or I3C dynamic address).
75  *
76  * Note that this lock is not guaranteeing serialization of normal operations.
77  * In other words, transfer requests passed to the I3C master can be submitted
78  * in parallel and I3C master drivers have to use their own locking to make
79  * sure two different communications are not inter-mixed, or access to the
80  * output/input queue is not done while the engine is busy.
81  */
82 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
83 {
84 	down_read(&bus->lock);
85 }
86 
87 /**
88  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
89  * @bus: I3C bus to release the lock on
90  *
91  * Should be called when a normal operation is done. See
92  * i3c_bus_normaluse_lock() for more details on what these normal operations
93  * are.
94  */
95 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
96 {
97 	up_read(&bus->lock);
98 }
99 
100 static struct i3c_master_controller *
101 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
102 {
103 	return container_of(i3cbus, struct i3c_master_controller, bus);
104 }
105 
106 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
107 {
108 	return container_of(dev, struct i3c_master_controller, dev);
109 }
110 
111 static int __must_check i3c_master_rpm_get(struct i3c_master_controller *master)
112 {
113 	int ret = master->rpm_allowed ? pm_runtime_resume_and_get(master->dev.parent) : 0;
114 
115 	if (ret < 0) {
116 		dev_err(master->dev.parent, "runtime resume failed, error %d\n", ret);
117 		return ret;
118 	}
119 	return 0;
120 }
121 
122 static void i3c_master_rpm_put(struct i3c_master_controller *master)
123 {
124 	if (master->rpm_allowed)
125 		pm_runtime_put_autosuspend(master->dev.parent);
126 }
127 
128 int i3c_bus_rpm_get(struct i3c_bus *bus)
129 {
130 	return i3c_master_rpm_get(i3c_bus_to_i3c_master(bus));
131 }
132 
133 void i3c_bus_rpm_put(struct i3c_bus *bus)
134 {
135 	i3c_master_rpm_put(i3c_bus_to_i3c_master(bus));
136 }
137 
138 bool i3c_bus_rpm_ibi_allowed(struct i3c_bus *bus)
139 {
140 	return i3c_bus_to_i3c_master(bus)->rpm_ibi_allowed;
141 }
142 
143 static const struct device_type i3c_device_type;
144 
145 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
146 {
147 	struct i3c_master_controller *master;
148 
149 	if (dev->type == &i3c_device_type)
150 		return dev_to_i3cdev(dev)->bus;
151 
152 	master = dev_to_i3cmaster(dev);
153 
154 	return &master->bus;
155 }
156 
157 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
158 {
159 	struct i3c_master_controller *master;
160 
161 	if (dev->type == &i3c_device_type)
162 		return dev_to_i3cdev(dev)->desc;
163 
164 	master = dev_to_i3cmaster(dev);
165 
166 	return master->this;
167 }
168 
169 static ssize_t bcr_show(struct device *dev,
170 			struct device_attribute *da,
171 			char *buf)
172 {
173 	struct i3c_bus *bus = dev_to_i3cbus(dev);
174 	struct i3c_dev_desc *desc;
175 	ssize_t ret;
176 
177 	i3c_bus_normaluse_lock(bus);
178 	desc = dev_to_i3cdesc(dev);
179 	ret = sysfs_emit(buf, "0x%02x\n", desc->info.bcr);
180 	i3c_bus_normaluse_unlock(bus);
181 
182 	return ret;
183 }
184 static DEVICE_ATTR_RO(bcr);
185 
186 static ssize_t dcr_show(struct device *dev,
187 			struct device_attribute *da,
188 			char *buf)
189 {
190 	struct i3c_bus *bus = dev_to_i3cbus(dev);
191 	struct i3c_dev_desc *desc;
192 	ssize_t ret;
193 
194 	i3c_bus_normaluse_lock(bus);
195 	desc = dev_to_i3cdesc(dev);
196 	ret = sysfs_emit(buf, "0x%02x\n", desc->info.dcr);
197 	i3c_bus_normaluse_unlock(bus);
198 
199 	return ret;
200 }
201 static DEVICE_ATTR_RO(dcr);
202 
203 static ssize_t pid_show(struct device *dev,
204 			struct device_attribute *da,
205 			char *buf)
206 {
207 	struct i3c_bus *bus = dev_to_i3cbus(dev);
208 	struct i3c_dev_desc *desc;
209 	ssize_t ret;
210 
211 	i3c_bus_normaluse_lock(bus);
212 	desc = dev_to_i3cdesc(dev);
213 	ret = sysfs_emit(buf, "%llx\n", desc->info.pid);
214 	i3c_bus_normaluse_unlock(bus);
215 
216 	return ret;
217 }
218 static DEVICE_ATTR_RO(pid);
219 
220 static ssize_t dynamic_address_show(struct device *dev,
221 				    struct device_attribute *da,
222 				    char *buf)
223 {
224 	struct i3c_bus *bus = dev_to_i3cbus(dev);
225 	struct i3c_dev_desc *desc;
226 	ssize_t ret;
227 
228 	i3c_bus_normaluse_lock(bus);
229 	desc = dev_to_i3cdesc(dev);
230 	ret = sysfs_emit(buf, "%02x\n", desc->info.dyn_addr);
231 	i3c_bus_normaluse_unlock(bus);
232 
233 	return ret;
234 }
235 static DEVICE_ATTR_RO(dynamic_address);
236 
237 static const char * const hdrcap_strings[] = {
238 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
239 };
240 
241 static ssize_t hdrcap_show(struct device *dev,
242 			   struct device_attribute *da,
243 			   char *buf)
244 {
245 	struct i3c_bus *bus = dev_to_i3cbus(dev);
246 	struct i3c_dev_desc *desc;
247 	ssize_t offset = 0, ret;
248 	unsigned long caps;
249 	int mode;
250 
251 	i3c_bus_normaluse_lock(bus);
252 	desc = dev_to_i3cdesc(dev);
253 	caps = desc->info.hdr_cap;
254 	for_each_set_bit(mode, &caps, 8) {
255 		if (mode >= ARRAY_SIZE(hdrcap_strings))
256 			break;
257 
258 		if (!hdrcap_strings[mode])
259 			continue;
260 
261 		ret = sysfs_emit_at(buf, offset, offset ? " %s" : "%s",
262 			      hdrcap_strings[mode]);
263 		if (ret < 0)
264 			goto out;
265 
266 		offset += ret;
267 	}
268 
269 	ret = sysfs_emit_at(buf, offset, "\n");
270 	if (ret < 0)
271 		goto out;
272 
273 	ret = offset + ret;
274 
275 out:
276 	i3c_bus_normaluse_unlock(bus);
277 
278 	return ret;
279 }
280 static DEVICE_ATTR_RO(hdrcap);
281 
282 static ssize_t modalias_show(struct device *dev,
283 			     struct device_attribute *da, char *buf)
284 {
285 	struct i3c_device *i3c = dev_to_i3cdev(dev);
286 	struct i3c_device_info devinfo;
287 	u16 manuf, part, ext;
288 
289 	i3c_device_get_info(i3c, &devinfo);
290 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
291 	part = I3C_PID_PART_ID(devinfo.pid);
292 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
293 
294 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
295 		return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04X\n", devinfo.dcr,
296 			       manuf);
297 
298 	return sysfs_emit(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X\n",
299 		       devinfo.dcr, manuf, part, ext);
300 }
301 static DEVICE_ATTR_RO(modalias);
302 
303 static struct attribute *i3c_device_attrs[] = {
304 	&dev_attr_bcr.attr,
305 	&dev_attr_dcr.attr,
306 	&dev_attr_pid.attr,
307 	&dev_attr_dynamic_address.attr,
308 	&dev_attr_hdrcap.attr,
309 	&dev_attr_modalias.attr,
310 	NULL,
311 };
312 ATTRIBUTE_GROUPS(i3c_device);
313 
314 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
315 {
316 	const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
317 	struct i3c_device_info devinfo;
318 	u16 manuf, part, ext;
319 
320 	if (i3cdev->desc)
321 		devinfo = i3cdev->desc->info;
322 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
323 	part = I3C_PID_PART_ID(devinfo.pid);
324 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
325 
326 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
327 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
328 				      devinfo.dcr, manuf);
329 
330 	return add_uevent_var(env,
331 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
332 			      devinfo.dcr, manuf, part, ext);
333 }
334 
335 static const struct device_type i3c_device_type = {
336 	.groups	= i3c_device_groups,
337 	.uevent = i3c_device_uevent,
338 };
339 
340 static int i3c_device_match(struct device *dev, const struct device_driver *drv)
341 {
342 	struct i3c_device *i3cdev;
343 	const struct i3c_driver *i3cdrv;
344 
345 	if (dev->type != &i3c_device_type)
346 		return 0;
347 
348 	i3cdev = dev_to_i3cdev(dev);
349 	i3cdrv = drv_to_i3cdrv(drv);
350 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
351 		return 1;
352 
353 	return 0;
354 }
355 
356 static int i3c_device_probe(struct device *dev)
357 {
358 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
359 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
360 
361 	return driver->probe(i3cdev);
362 }
363 
364 static void i3c_device_remove(struct device *dev)
365 {
366 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
367 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
368 
369 	if (driver->remove)
370 		driver->remove(i3cdev);
371 }
372 
373 static enum i3c_addr_slot_status
374 i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
375 {
376 	unsigned long status;
377 	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
378 
379 	if (addr > I2C_MAX_ADDR)
380 		return I3C_ADDR_SLOT_RSVD;
381 
382 	status = bus->addrslots[bitpos / BITS_PER_LONG];
383 	status >>= bitpos % BITS_PER_LONG;
384 
385 	return status & mask;
386 }
387 
388 static enum i3c_addr_slot_status
389 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
390 {
391 	return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
392 }
393 
394 static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
395 					      enum i3c_addr_slot_status status, u32 mask)
396 {
397 	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
398 	unsigned long *ptr;
399 
400 	if (addr > I2C_MAX_ADDR)
401 		return;
402 
403 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
404 	*ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
405 	*ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
406 }
407 
408 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
409 					 enum i3c_addr_slot_status status)
410 {
411 	i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
412 }
413 
414 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
415 {
416 	enum i3c_addr_slot_status status;
417 
418 	status = i3c_bus_get_addr_slot_status(bus, addr);
419 
420 	return status == I3C_ADDR_SLOT_FREE;
421 }
422 
423 /*
424  * ┌────┬─────────────┬───┬─────────┬───┐
425  * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA  │ T ├────┐
426  * └────┴─────────────┴───┴─────────┴───┘    │
427  * ┌─────────────────────────────────────────┘
428  * │  ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
429  * └─►│Sr│7'h7E RnW=1  │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK430  *    └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
431  * Some master controllers (such as HCI) need to prepare the entire above transaction before
432  * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
433  * before knowing the target device's UID information.
434  *
435  * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
436  * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
437  * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
438  * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
439  * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
440  * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
441  * able to switch to its desired address.
442  *
443  * If the previous step fails, fallback returning one of the remaining unassigned address,
444  * regardless of its state in the desired list.
445  */
446 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
447 {
448 	enum i3c_addr_slot_status status;
449 	u8 addr;
450 
451 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
452 		status = i3c_bus_get_addr_slot_status_mask(bus, addr,
453 							   I3C_ADDR_SLOT_EXT_STATUS_MASK);
454 		if (status == I3C_ADDR_SLOT_FREE)
455 			return addr;
456 	}
457 
458 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
459 		status = i3c_bus_get_addr_slot_status_mask(bus, addr,
460 							   I3C_ADDR_SLOT_STATUS_MASK);
461 		if (status == I3C_ADDR_SLOT_FREE)
462 			return addr;
463 	}
464 
465 	return -ENOMEM;
466 }
467 
468 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
469 {
470 	int i;
471 
472 	/* Addresses 0 to 7 are reserved. */
473 	for (i = 0; i < 8; i++)
474 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
475 
476 	/*
477 	 * Reserve broadcast address and all addresses that might collide
478 	 * with the broadcast address when facing a single bit error.
479 	 */
480 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
481 				     I3C_ADDR_SLOT_RSVD);
482 	for (i = 0; i < 7; i++)
483 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
484 					     I3C_ADDR_SLOT_RSVD);
485 }
486 
487 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
488 {
489 	mutex_lock(&i3c_core_lock);
490 	idr_remove(&i3c_bus_idr, i3cbus->id);
491 	mutex_unlock(&i3c_core_lock);
492 }
493 
494 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
495 {
496 	int ret, start, end, id = -1;
497 
498 	init_rwsem(&i3cbus->lock);
499 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
500 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
501 	i3c_bus_init_addrslots(i3cbus);
502 	i3cbus->mode = I3C_BUS_MODE_PURE;
503 
504 	if (np)
505 		id = of_alias_get_id(np, "i3c");
506 
507 	mutex_lock(&i3c_core_lock);
508 	if (id >= 0) {
509 		start = id;
510 		end = start + 1;
511 	} else {
512 		start = __i3c_first_dynamic_bus_num;
513 		end = 0;
514 	}
515 
516 	ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
517 	mutex_unlock(&i3c_core_lock);
518 
519 	if (ret < 0)
520 		return ret;
521 
522 	i3cbus->id = ret;
523 
524 	return 0;
525 }
526 
527 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
528 			     void *data)
529 {
530 	struct i3c_bus *bus;
531 	int id;
532 
533 	mutex_lock(&i3c_core_lock);
534 	idr_for_each_entry(&i3c_bus_idr, bus, id)
535 		fn(bus, data);
536 	mutex_unlock(&i3c_core_lock);
537 }
538 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
539 
540 int i3c_register_notifier(struct notifier_block *nb)
541 {
542 	return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
543 }
544 EXPORT_SYMBOL_GPL(i3c_register_notifier);
545 
546 int i3c_unregister_notifier(struct notifier_block *nb)
547 {
548 	return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
549 }
550 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
551 
552 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
553 {
554 	blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
555 }
556 
557 static const char * const i3c_bus_mode_strings[] = {
558 	[I3C_BUS_MODE_PURE] = "pure",
559 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
560 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
561 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
562 };
563 
564 static ssize_t mode_show(struct device *dev,
565 			 struct device_attribute *da,
566 			 char *buf)
567 {
568 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
569 	ssize_t ret;
570 
571 	i3c_bus_normaluse_lock(i3cbus);
572 	if (i3cbus->mode < 0 ||
573 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
574 	    !i3c_bus_mode_strings[i3cbus->mode])
575 		ret = sysfs_emit(buf, "unknown\n");
576 	else
577 		ret = sysfs_emit(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
578 	i3c_bus_normaluse_unlock(i3cbus);
579 
580 	return ret;
581 }
582 static DEVICE_ATTR_RO(mode);
583 
584 static ssize_t current_master_show(struct device *dev,
585 				   struct device_attribute *da,
586 				   char *buf)
587 {
588 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
589 	ssize_t ret;
590 
591 	i3c_bus_normaluse_lock(i3cbus);
592 	ret = sysfs_emit(buf, "%d-%llx\n", i3cbus->id,
593 		      i3cbus->cur_master->info.pid);
594 	i3c_bus_normaluse_unlock(i3cbus);
595 
596 	return ret;
597 }
598 static DEVICE_ATTR_RO(current_master);
599 
600 static ssize_t i3c_scl_frequency_show(struct device *dev,
601 				      struct device_attribute *da,
602 				      char *buf)
603 {
604 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
605 	ssize_t ret;
606 
607 	i3c_bus_normaluse_lock(i3cbus);
608 	ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i3c);
609 	i3c_bus_normaluse_unlock(i3cbus);
610 
611 	return ret;
612 }
613 static DEVICE_ATTR_RO(i3c_scl_frequency);
614 
615 static ssize_t i2c_scl_frequency_show(struct device *dev,
616 				      struct device_attribute *da,
617 				      char *buf)
618 {
619 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
620 	ssize_t ret;
621 
622 	i3c_bus_normaluse_lock(i3cbus);
623 	ret = sysfs_emit(buf, "%ld\n", i3cbus->scl_rate.i2c);
624 	i3c_bus_normaluse_unlock(i3cbus);
625 
626 	return ret;
627 }
628 static DEVICE_ATTR_RO(i2c_scl_frequency);
629 
630 static void i3c_master_hj_work_fn(struct work_struct *work)
631 {
632 	struct i3c_master_controller *master = container_of(work, typeof(*master), hj_work);
633 
634 	if (!master->shutting_down)
635 		i3c_master_do_daa(master);
636 }
637 
638 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
639 {
640 	int ret;
641 
642 	if (!master || !master->ops)
643 		return -EINVAL;
644 
645 	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
646 		return -EINVAL;
647 
648 	if (enable || master->rpm_ibi_allowed) {
649 		ret = i3c_master_rpm_get(master);
650 		if (ret)
651 			return ret;
652 	}
653 
654 	i3c_bus_maintenance_lock(&master->bus);
655 
656 	if (master->shutting_down)
657 		ret = -ENODEV;
658 	else if (enable)
659 		ret = master->ops->enable_hotjoin(master);
660 	else
661 		ret = master->ops->disable_hotjoin(master);
662 
663 	if (!ret)
664 		master->hotjoin = enable;
665 
666 	i3c_bus_maintenance_unlock(&master->bus);
667 
668 	if ((enable && ret) || (!enable && !ret) || master->rpm_ibi_allowed)
669 		i3c_master_rpm_put(master);
670 
671 	return ret;
672 }
673 
674 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
675 			     const char *buf, size_t count)
676 {
677 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
678 	int ret;
679 	bool res;
680 
681 	if (!i3cbus->cur_master)
682 		return -EINVAL;
683 
684 	if (kstrtobool(buf, &res))
685 		return -EINVAL;
686 
687 	ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
688 	if (ret)
689 		return ret;
690 
691 	return count;
692 }
693 
694 /*
695  * i3c_master_enable_hotjoin - Enable hotjoin
696  * @master: I3C master object
697  *
698  * Return: a 0 in case of success, an negative error code otherwise.
699  */
700 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
701 {
702 	return i3c_set_hotjoin(master, true);
703 }
704 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
705 
706 /*
707  * i3c_master_disable_hotjoin - Disable hotjoin
708  * @master: I3C master object
709  *
710  * Return: a 0 in case of success, an negative error code otherwise.
711  */
712 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
713 {
714 	return i3c_set_hotjoin(master, false);
715 }
716 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
717 
718 /**
719  * i3c_master_queue_hotjoin - Queue DAA processing after a Hot-Join event
720  * @master: I3C master object
721  *
722  * Queue the hot-join worker on the master's workqueue.
723  */
724 void i3c_master_queue_hotjoin(struct i3c_master_controller *master)
725 {
726 	queue_work(master->wq, &master->hj_work);
727 }
728 EXPORT_SYMBOL_GPL(i3c_master_queue_hotjoin);
729 
730 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
731 {
732 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
733 	ssize_t ret;
734 
735 	i3c_bus_normaluse_lock(i3cbus);
736 	ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
737 	i3c_bus_normaluse_unlock(i3cbus);
738 
739 	return ret;
740 }
741 
742 static DEVICE_ATTR_RW(hotjoin);
743 
744 static ssize_t dev_nack_retry_count_show(struct device *dev,
745 					 struct device_attribute *attr, char *buf)
746 {
747 	return sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count);
748 }
749 
750 static ssize_t dev_nack_retry_count_store(struct device *dev,
751 					  struct device_attribute *attr,
752 					  const char *buf, size_t count)
753 {
754 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
755 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
756 	unsigned long val;
757 	int ret;
758 
759 	ret = kstrtoul(buf, 0, &val);
760 	if (ret)
761 		return ret;
762 
763 	i3c_bus_maintenance_lock(i3cbus);
764 	ret = master->ops->set_dev_nack_retry(master, val);
765 	i3c_bus_maintenance_unlock(i3cbus);
766 
767 	if (ret)
768 		return ret;
769 
770 	master->dev_nack_retry_count = val;
771 
772 	return count;
773 }
774 
775 static DEVICE_ATTR_RW(dev_nack_retry_count);
776 
777 static ssize_t do_daa_store(struct device *dev,
778 			    struct device_attribute *attr,
779 			    const char *buf, size_t count)
780 {
781 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
782 	bool val;
783 	int ret;
784 
785 	if (kstrtobool(buf, &val))
786 		return -EINVAL;
787 
788 	if (!val)
789 		return -EINVAL;
790 
791 	if (!master->init_done)
792 		return -EAGAIN;
793 
794 	ret = i3c_master_do_daa(master);
795 	if (ret)
796 		return ret;
797 
798 	return count;
799 }
800 
801 static DEVICE_ATTR_WO(do_daa);
802 
803 static struct attribute *i3c_masterdev_attrs[] = {
804 	&dev_attr_mode.attr,
805 	&dev_attr_current_master.attr,
806 	&dev_attr_i3c_scl_frequency.attr,
807 	&dev_attr_i2c_scl_frequency.attr,
808 	&dev_attr_bcr.attr,
809 	&dev_attr_dcr.attr,
810 	&dev_attr_pid.attr,
811 	&dev_attr_dynamic_address.attr,
812 	&dev_attr_hdrcap.attr,
813 	&dev_attr_hotjoin.attr,
814 	&dev_attr_do_daa.attr,
815 	NULL,
816 };
817 ATTRIBUTE_GROUPS(i3c_masterdev);
818 
819 static void i3c_masterdev_release(struct device *dev)
820 {
821 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
822 	struct i3c_bus *bus = dev_to_i3cbus(dev);
823 
824 	if (master->wq)
825 		destroy_workqueue(master->wq);
826 
827 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
828 	i3c_bus_cleanup(bus);
829 
830 	of_node_put(dev->of_node);
831 }
832 
833 static const struct device_type i3c_masterdev_type = {
834 	.groups	= i3c_masterdev_groups,
835 };
836 
837 static void i3c_master_shutdown(struct i3c_master_controller *master)
838 {
839 	i3c_bus_maintenance_lock(&master->bus);
840 	master->shutting_down = true;
841 	i3c_bus_maintenance_unlock(&master->bus);
842 
843 	cancel_work_sync(&master->hj_work);
844 	cancel_work_sync(&master->reg_work);
845 }
846 
847 static void i3c_device_shutdown(struct device *dev)
848 {
849 	if (dev->type == &i3c_masterdev_type)
850 		i3c_master_shutdown(dev_to_i3cmaster(dev));
851 }
852 
853 const struct bus_type i3c_bus_type = {
854 	.name = "i3c",
855 	.match = i3c_device_match,
856 	.probe = i3c_device_probe,
857 	.remove = i3c_device_remove,
858 	.shutdown = i3c_device_shutdown,
859 };
860 EXPORT_SYMBOL_GPL(i3c_bus_type);
861 
862 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
863 			    unsigned long max_i2c_scl_rate)
864 {
865 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
866 
867 	i3cbus->mode = mode;
868 
869 	switch (i3cbus->mode) {
870 	case I3C_BUS_MODE_PURE:
871 		if (!i3cbus->scl_rate.i3c)
872 			i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE;
873 		break;
874 	case I3C_BUS_MODE_MIXED_FAST:
875 	case I3C_BUS_MODE_MIXED_LIMITED:
876 		if (!i3cbus->scl_rate.i3c)
877 			i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE;
878 		if (!i3cbus->scl_rate.i2c)
879 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
880 		break;
881 	case I3C_BUS_MODE_MIXED_SLOW:
882 		if (!i3cbus->scl_rate.i2c)
883 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
884 		if (!i3cbus->scl_rate.i3c ||
885 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
886 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
887 		break;
888 	default:
889 		return -EINVAL;
890 	}
891 
892 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
893 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
894 
895 	/*
896 	 * I3C/I2C frequency may have been overridden, check that user-provided
897 	 * values are not exceeding max possible frequency.
898 	 */
899 	if (i3cbus->scl_rate.i3c > I3C_BUS_I3C_SCL_MAX_RATE ||
900 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE)
901 		return -EINVAL;
902 
903 	return 0;
904 }
905 
906 static struct i3c_master_controller *
907 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
908 {
909 	return container_of(adap, struct i3c_master_controller, i2c);
910 }
911 
912 static struct i2c_adapter *
913 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
914 {
915 	return &master->i2c;
916 }
917 
918 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
919 {
920 	kfree(dev);
921 }
922 
923 static struct i2c_dev_desc *
924 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
925 			 u16 addr, u8 lvr)
926 {
927 	struct i2c_dev_desc *dev;
928 
929 	dev = kzalloc_obj(*dev);
930 	if (!dev)
931 		return ERR_PTR(-ENOMEM);
932 
933 	dev->common.master = master;
934 	dev->addr = addr;
935 	dev->lvr = lvr;
936 
937 	return dev;
938 }
939 
940 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
941 				   u16 payloadlen)
942 {
943 	dest->addr = addr;
944 	dest->payload.len = payloadlen;
945 	if (payloadlen)
946 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
947 	else
948 		dest->payload.data = NULL;
949 
950 	return dest->payload.data;
951 }
952 
953 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
954 {
955 	kfree(dest->payload.data);
956 }
957 
958 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
959 			     struct i3c_ccc_cmd_dest *dests,
960 			     unsigned int ndests)
961 {
962 	cmd->rnw = rnw ? 1 : 0;
963 	cmd->id = id;
964 	cmd->dests = dests;
965 	cmd->ndests = ndests;
966 	cmd->err = I3C_ERROR_UNKNOWN;
967 }
968 
969 /**
970  * i3c_master_send_ccc_cmd_locked() - send a CCC (Common Command Codes)
971  * @master: master used to send frames on the bus
972  * @cmd: command to send
973  *
974  * Return: 0 in case of success, or a negative error code otherwise.
975  *         I3C Mx error codes are stored in cmd->err.
976  */
977 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
978 					  struct i3c_ccc_cmd *cmd)
979 {
980 	if (!cmd || !master)
981 		return -EINVAL;
982 
983 	if (WARN_ON(master->init_done &&
984 		    !rwsem_is_locked(&master->bus.lock)))
985 		return -EINVAL;
986 
987 	if (!master->ops->send_ccc_cmd)
988 		return -EOPNOTSUPP;
989 
990 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
991 		return -EINVAL;
992 
993 	if (master->ops->supports_ccc_cmd &&
994 	    !master->ops->supports_ccc_cmd(master, cmd))
995 		return -EOPNOTSUPP;
996 
997 	return master->ops->send_ccc_cmd(master, cmd);
998 }
999 
1000 static struct i2c_dev_desc *
1001 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
1002 				u16 addr)
1003 {
1004 	struct i2c_dev_desc *dev;
1005 
1006 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
1007 		if (dev->addr == addr)
1008 			return dev;
1009 	}
1010 
1011 	return NULL;
1012 }
1013 
1014 /**
1015  * i3c_master_get_free_addr() - get a free address on the bus
1016  * @master: I3C master object
1017  * @start_addr: where to start searching
1018  *
1019  * This function must be called with the bus lock held in write mode.
1020  *
1021  * Return: the first free address starting at @start_addr (included) or -ENOMEM
1022  * if there's no more address available.
1023  */
1024 int i3c_master_get_free_addr(struct i3c_master_controller *master,
1025 			     u8 start_addr)
1026 {
1027 	return i3c_bus_get_free_addr(&master->bus, start_addr);
1028 }
1029 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
1030 
1031 static void i3c_device_release(struct device *dev)
1032 {
1033 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
1034 
1035 	WARN_ON(i3cdev->desc);
1036 
1037 	of_node_put(i3cdev->dev.of_node);
1038 	kfree(i3cdev);
1039 }
1040 
1041 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
1042 {
1043 	kfree(dev);
1044 }
1045 
1046 static struct i3c_dev_desc *
1047 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
1048 			 const struct i3c_device_info *info)
1049 {
1050 	struct i3c_dev_desc *dev;
1051 
1052 	dev = kzalloc_obj(*dev);
1053 	if (!dev)
1054 		return ERR_PTR(-ENOMEM);
1055 
1056 	dev->common.master = master;
1057 	dev->info = *info;
1058 	mutex_init(&dev->ibi_lock);
1059 
1060 	return dev;
1061 }
1062 
1063 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
1064 				    u8 addr)
1065 {
1066 	enum i3c_addr_slot_status addrstat;
1067 	struct i3c_ccc_cmd_dest dest;
1068 	struct i3c_ccc_cmd cmd;
1069 	int ret;
1070 
1071 	if (!master)
1072 		return -EINVAL;
1073 
1074 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
1075 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
1076 		return -EINVAL;
1077 
1078 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
1079 	i3c_ccc_cmd_init(&cmd, false,
1080 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
1081 			 &dest, 1);
1082 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1083 	i3c_ccc_cmd_dest_cleanup(&dest);
1084 
1085 	/* No active devices on the bus. */
1086 	if (ret && cmd.err == I3C_ERROR_M2)
1087 		ret = 0;
1088 
1089 	return ret;
1090 }
1091 
1092 /**
1093  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
1094  *				procedure
1095  * @master: master used to send frames on the bus
1096  *
1097  * Send a ENTDAA CCC command to start a DAA procedure.
1098  *
1099  * Note that this function only sends the ENTDAA CCC command, all the logic
1100  * behind dynamic address assignment has to be handled in the I3C master
1101  * driver.
1102  *
1103  * This function must be called with the bus lock held in write mode.
1104  *
1105  * Return: 0 in case of success, or a negative error code otherwise.
1106  */
1107 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
1108 {
1109 	struct i3c_ccc_cmd_dest dest;
1110 	struct i3c_ccc_cmd cmd;
1111 	int ret;
1112 
1113 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
1114 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
1115 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1116 	i3c_ccc_cmd_dest_cleanup(&dest);
1117 
1118 	/* No active devices need an address. */
1119 	if (ret && cmd.err == I3C_ERROR_M2)
1120 		ret = 0;
1121 
1122 	return ret;
1123 }
1124 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
1125 
1126 /**
1127  * i3c_master_enec_disec_locked() - send an ENEC or DISEC CCC command
1128  * @master: master used to send frames on the bus
1129  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1130  * @enable: true to send ENEC, false to send DISEC
1131  * @evts: events to enable or disable
1132  * @suppress_m2: if true, treat an M2 (NACK) error from the CCC as success
1133  *
1134  * Send an ENEC or DISEC CCC command to enable or disable some or all events
1135  * coming from a specific slave, or all devices if @addr is
1136  * %I3C_BROADCAST_ADDR.
1137  *
1138  * When @suppress_m2 is true, a NACK of the broadcast (which can happen when
1139  * no devices are present on the bus) is not reported as an error. This is
1140  * useful for callers that want to configure event reporting unconditionally,
1141  * regardless of whether any devices are currently on the bus.
1142  *
1143  * This function must be called with the bus lock held in write mode.
1144  *
1145  * Return: 0 in case of success, or a negative error code otherwise.
1146  */
1147 int i3c_master_enec_disec_locked(struct i3c_master_controller *master, u8 addr,
1148 				 bool enable, u8 evts, bool suppress_m2)
1149 {
1150 	struct i3c_ccc_events *events;
1151 	struct i3c_ccc_cmd_dest dest;
1152 	struct i3c_ccc_cmd cmd;
1153 	int ret;
1154 
1155 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
1156 	if (!events)
1157 		return -ENOMEM;
1158 
1159 	events->events = evts;
1160 	i3c_ccc_cmd_init(&cmd, false,
1161 			 enable ?
1162 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
1163 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
1164 			 &dest, 1);
1165 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1166 	i3c_ccc_cmd_dest_cleanup(&dest);
1167 
1168 	if (suppress_m2 && ret && cmd.err == I3C_ERROR_M2)
1169 		ret = 0;
1170 
1171 	return ret;
1172 }
1173 EXPORT_SYMBOL_GPL(i3c_master_enec_disec_locked);
1174 
1175 /**
1176  * i3c_master_disec_locked() - send a DISEC CCC command
1177  * @master: master used to send frames on the bus
1178  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1179  * @evts: events to disable
1180  *
1181  * Send a DISEC CCC command to disable some or all events coming from a
1182  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1183  *
1184  * This function must be called with the bus lock held in write mode.
1185  *
1186  * Return: 0 in case of success, or a negative error code otherwise.
1187  */
1188 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
1189 			    u8 evts)
1190 {
1191 	return i3c_master_enec_disec_locked(master, addr, false, evts, false);
1192 }
1193 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
1194 
1195 /**
1196  * i3c_master_enec_locked() - send an ENEC CCC command
1197  * @master: master used to send frames on the bus
1198  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1199  * @evts: events to disable
1200  *
1201  * Sends an ENEC CCC command to enable some or all events coming from a
1202  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1203  *
1204  * This function must be called with the bus lock held in write mode.
1205  *
1206  * Return: 0 in case of success, or a negative error code otherwise.
1207  */
1208 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
1209 			   u8 evts)
1210 {
1211 	return i3c_master_enec_disec_locked(master, addr, true, evts, false);
1212 }
1213 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1214 
1215 /**
1216  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1217  * @master: master used to send frames on the bus
1218  *
1219  * Send a DEFSLVS CCC command containing all the devices known to the @master.
1220  * This is useful when you have secondary masters on the bus to propagate
1221  * device information.
1222  *
1223  * This should be called after all I3C devices have been discovered (in other
1224  * words, after the DAA procedure has finished) and instantiated in
1225  * &i3c_master_controller_ops->bus_init().
1226  * It should also be called if a master ACKed an Hot-Join request and assigned
1227  * a dynamic address to the device joining the bus.
1228  *
1229  * This function must be called with the bus lock held in write mode.
1230  *
1231  * Return: 0 in case of success, or a negative error code otherwise.
1232  */
1233 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1234 {
1235 	struct i3c_ccc_defslvs *defslvs;
1236 	struct i3c_ccc_dev_desc *desc;
1237 	struct i3c_ccc_cmd_dest dest;
1238 	struct i3c_dev_desc *i3cdev;
1239 	struct i2c_dev_desc *i2cdev;
1240 	struct i3c_ccc_cmd cmd;
1241 	struct i3c_bus *bus;
1242 	bool send = false;
1243 	int ndevs = 0, ret;
1244 
1245 	if (!master)
1246 		return -EINVAL;
1247 
1248 	bus = i3c_master_get_bus(master);
1249 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1250 		ndevs++;
1251 
1252 		if (i3cdev == master->this)
1253 			continue;
1254 
1255 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1256 		    I3C_BCR_I3C_MASTER)
1257 			send = true;
1258 	}
1259 
1260 	/* No other master on the bus, skip DEFSLVS. */
1261 	if (!send)
1262 		return 0;
1263 
1264 	i3c_bus_for_each_i2cdev(bus, i2cdev)
1265 		ndevs++;
1266 
1267 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1268 					struct_size(defslvs, slaves,
1269 						    ndevs - 1));
1270 	if (!defslvs)
1271 		return -ENOMEM;
1272 
1273 	defslvs->count = ndevs;
1274 	defslvs->master.bcr = master->this->info.bcr;
1275 	defslvs->master.dcr = master->this->info.dcr;
1276 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1277 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1278 
1279 	desc = defslvs->slaves;
1280 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
1281 		desc->lvr = i2cdev->lvr;
1282 		desc->static_addr = i2cdev->addr << 1;
1283 		desc++;
1284 	}
1285 
1286 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1287 		/* Skip the I3C dev representing this master. */
1288 		if (i3cdev == master->this)
1289 			continue;
1290 
1291 		desc->bcr = i3cdev->info.bcr;
1292 		desc->dcr = i3cdev->info.dcr;
1293 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1294 		desc->static_addr = i3cdev->info.static_addr << 1;
1295 		desc++;
1296 	}
1297 
1298 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1299 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1300 	i3c_ccc_cmd_dest_cleanup(&dest);
1301 
1302 	return ret;
1303 }
1304 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1305 
1306 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1307 				   u8 oldaddr, u8 newaddr, bool setdasa)
1308 {
1309 	struct i3c_ccc_cmd_dest dest;
1310 	struct i3c_ccc_setda *setda;
1311 	struct i3c_ccc_cmd cmd;
1312 	int ret;
1313 
1314 	if (!oldaddr || !newaddr)
1315 		return -EINVAL;
1316 
1317 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1318 	if (!setda)
1319 		return -ENOMEM;
1320 
1321 	setda->addr = newaddr << 1;
1322 	i3c_ccc_cmd_init(&cmd, false,
1323 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1324 			 &dest, 1);
1325 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1326 	i3c_ccc_cmd_dest_cleanup(&dest);
1327 
1328 	return ret;
1329 }
1330 
1331 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1332 				     u8 static_addr, u8 dyn_addr)
1333 {
1334 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1335 }
1336 
1337 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1338 				      u8 oldaddr, u8 newaddr)
1339 {
1340 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1341 }
1342 
1343 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1344 				    struct i3c_device_info *info)
1345 {
1346 	struct i3c_ccc_cmd_dest dest;
1347 	struct i3c_ccc_mrl *mrl;
1348 	struct i3c_ccc_cmd cmd;
1349 	int ret;
1350 
1351 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1352 	if (!mrl)
1353 		return -ENOMEM;
1354 
1355 	/*
1356 	 * When the device does not have IBI payload GETMRL only returns 2
1357 	 * bytes of data.
1358 	 */
1359 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1360 		dest.payload.len -= 1;
1361 
1362 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1363 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1364 	if (ret)
1365 		goto out;
1366 
1367 	switch (dest.payload.len) {
1368 	case 3:
1369 		info->max_ibi_len = mrl->ibi_len;
1370 		fallthrough;
1371 	case 2:
1372 		info->max_read_len = be16_to_cpu(mrl->read_len);
1373 		break;
1374 	default:
1375 		ret = -EIO;
1376 		goto out;
1377 	}
1378 
1379 out:
1380 	i3c_ccc_cmd_dest_cleanup(&dest);
1381 
1382 	return ret;
1383 }
1384 
1385 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1386 				    struct i3c_device_info *info)
1387 {
1388 	struct i3c_ccc_cmd_dest dest;
1389 	struct i3c_ccc_mwl *mwl;
1390 	struct i3c_ccc_cmd cmd;
1391 	int ret;
1392 
1393 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1394 	if (!mwl)
1395 		return -ENOMEM;
1396 
1397 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1398 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1399 	if (ret)
1400 		goto out;
1401 
1402 	if (dest.payload.len != sizeof(*mwl)) {
1403 		ret = -EIO;
1404 		goto out;
1405 	}
1406 
1407 	info->max_write_len = be16_to_cpu(mwl->len);
1408 
1409 out:
1410 	i3c_ccc_cmd_dest_cleanup(&dest);
1411 
1412 	return ret;
1413 }
1414 
1415 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1416 				     struct i3c_device_info *info)
1417 {
1418 	struct i3c_ccc_getmxds *getmaxds;
1419 	struct i3c_ccc_cmd_dest dest;
1420 	struct i3c_ccc_cmd cmd;
1421 	int ret;
1422 
1423 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1424 					 sizeof(*getmaxds));
1425 	if (!getmaxds)
1426 		return -ENOMEM;
1427 
1428 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1429 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1430 	if (ret) {
1431 		/*
1432 		 * Retry when the device does not support max read turnaround
1433 		 * while expecting shorter length from this CCC command.
1434 		 */
1435 		dest.payload.len -= 3;
1436 		ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1437 		if (ret)
1438 			goto out;
1439 	}
1440 
1441 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1442 		ret = -EIO;
1443 		goto out;
1444 	}
1445 
1446 	info->max_read_ds = getmaxds->maxrd;
1447 	info->max_write_ds = getmaxds->maxwr;
1448 	if (dest.payload.len == 5)
1449 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1450 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1451 					    ((u32)getmaxds->maxrdturn[2] << 16);
1452 
1453 out:
1454 	i3c_ccc_cmd_dest_cleanup(&dest);
1455 
1456 	return ret;
1457 }
1458 
1459 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1460 				       struct i3c_device_info *info)
1461 {
1462 	struct i3c_ccc_gethdrcap *gethdrcap;
1463 	struct i3c_ccc_cmd_dest dest;
1464 	struct i3c_ccc_cmd cmd;
1465 	int ret;
1466 
1467 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1468 					  sizeof(*gethdrcap));
1469 	if (!gethdrcap)
1470 		return -ENOMEM;
1471 
1472 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1473 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1474 	if (ret)
1475 		goto out;
1476 
1477 	if (dest.payload.len != 1) {
1478 		ret = -EIO;
1479 		goto out;
1480 	}
1481 
1482 	info->hdr_cap = gethdrcap->modes;
1483 
1484 out:
1485 	i3c_ccc_cmd_dest_cleanup(&dest);
1486 
1487 	return ret;
1488 }
1489 
1490 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1491 				    struct i3c_device_info *info)
1492 {
1493 	struct i3c_ccc_getpid *getpid;
1494 	struct i3c_ccc_cmd_dest dest;
1495 	struct i3c_ccc_cmd cmd;
1496 	int ret, i;
1497 
1498 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1499 	if (!getpid)
1500 		return -ENOMEM;
1501 
1502 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1503 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1504 	if (ret)
1505 		goto out;
1506 
1507 	info->pid = 0;
1508 	for (i = 0; i < sizeof(getpid->pid); i++) {
1509 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1510 
1511 		info->pid |= (u64)getpid->pid[i] << sft;
1512 	}
1513 
1514 out:
1515 	i3c_ccc_cmd_dest_cleanup(&dest);
1516 
1517 	return ret;
1518 }
1519 
1520 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1521 				    struct i3c_device_info *info)
1522 {
1523 	struct i3c_ccc_getbcr *getbcr;
1524 	struct i3c_ccc_cmd_dest dest;
1525 	struct i3c_ccc_cmd cmd;
1526 	int ret;
1527 
1528 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1529 	if (!getbcr)
1530 		return -ENOMEM;
1531 
1532 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1533 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1534 	if (ret)
1535 		goto out;
1536 
1537 	info->bcr = getbcr->bcr;
1538 
1539 out:
1540 	i3c_ccc_cmd_dest_cleanup(&dest);
1541 
1542 	return ret;
1543 }
1544 
1545 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1546 				    struct i3c_device_info *info)
1547 {
1548 	struct i3c_ccc_getdcr *getdcr;
1549 	struct i3c_ccc_cmd_dest dest;
1550 	struct i3c_ccc_cmd cmd;
1551 	int ret;
1552 
1553 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1554 	if (!getdcr)
1555 		return -ENOMEM;
1556 
1557 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1558 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1559 	if (ret)
1560 		goto out;
1561 
1562 	info->dcr = getdcr->dcr;
1563 
1564 out:
1565 	i3c_ccc_cmd_dest_cleanup(&dest);
1566 
1567 	return ret;
1568 }
1569 
1570 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1571 {
1572 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1573 	enum i3c_addr_slot_status slot_status;
1574 	int ret;
1575 
1576 	if (!dev->info.dyn_addr)
1577 		return -EINVAL;
1578 
1579 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1580 						   dev->info.dyn_addr);
1581 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1582 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1583 		return -EINVAL;
1584 
1585 	ret = i3c_master_getpid_locked(master, &dev->info);
1586 	if (ret)
1587 		return ret;
1588 
1589 	ret = i3c_master_getbcr_locked(master, &dev->info);
1590 	if (ret)
1591 		return ret;
1592 
1593 	ret = i3c_master_getdcr_locked(master, &dev->info);
1594 	if (ret)
1595 		return ret;
1596 
1597 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1598 		ret = i3c_master_getmxds_locked(master, &dev->info);
1599 		if (ret)
1600 			return ret;
1601 	}
1602 
1603 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1604 		dev->info.max_ibi_len = 1;
1605 
1606 	i3c_master_getmrl_locked(master, &dev->info);
1607 	i3c_master_getmwl_locked(master, &dev->info);
1608 
1609 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1610 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1611 		if (ret && ret != -EOPNOTSUPP)
1612 			return ret;
1613 	}
1614 
1615 	return 0;
1616 }
1617 
1618 static int i3c_master_getstatus_locked(struct i3c_master_controller *master,
1619 				       u8 addr, u16 *status)
1620 {
1621 	struct i3c_ccc_getstatus *getstatus;
1622 	struct i3c_ccc_cmd_dest dest;
1623 	struct i3c_ccc_cmd cmd;
1624 	int ret;
1625 
1626 	getstatus = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*getstatus));
1627 	if (!getstatus)
1628 		return -ENOMEM;
1629 
1630 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETSTATUS, &dest, 1);
1631 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1632 	if (ret)
1633 		goto out;
1634 
1635 	if (dest.payload.len != sizeof(*getstatus)) {
1636 		ret = -EIO;
1637 		goto out;
1638 	}
1639 
1640 	if (status)
1641 		*status = be16_to_cpu(getstatus->status);
1642 out:
1643 	i3c_ccc_cmd_dest_cleanup(&dest);
1644 
1645 	return ret;
1646 }
1647 
1648 /* Values are chosen to give the device plenty of opportunities to respond */
1649 #define I3C_DEV_PROBE_INITIAL_DELAY_US	20
1650 #define I3C_DEV_PROBE_DELAY_FACTOR	2
1651 #define I3C_DEV_PROBE_CNT		5
1652 
1653 static bool i3c_master_i3c_dev_present(struct i3c_master_controller *master, unsigned int addr)
1654 {
1655 	int delay = I3C_DEV_PROBE_INITIAL_DELAY_US;
1656 
1657 	for (int i = 0; i < I3C_DEV_PROBE_CNT; i++) {
1658 		if (i) {
1659 			fsleep(delay);
1660 			delay *= I3C_DEV_PROBE_DELAY_FACTOR;
1661 		}
1662 		if (!i3c_master_getstatus_locked(master, addr, NULL))
1663 			return true;
1664 	}
1665 
1666 	return false;
1667 }
1668 
1669 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1670 {
1671 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1672 
1673 	if (dev->info.static_addr)
1674 		i3c_bus_set_addr_slot_status(&master->bus,
1675 					     dev->info.static_addr,
1676 					     I3C_ADDR_SLOT_FREE);
1677 
1678 	if (dev->info.dyn_addr)
1679 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1680 					     I3C_ADDR_SLOT_FREE);
1681 
1682 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1683 		i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
1684 					     I3C_ADDR_SLOT_FREE);
1685 }
1686 
1687 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1688 {
1689 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1690 	enum i3c_addr_slot_status status;
1691 
1692 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1693 		return 0;
1694 
1695 	if (dev->info.static_addr) {
1696 		status = i3c_bus_get_addr_slot_status(&master->bus,
1697 						      dev->info.static_addr);
1698 		/* Since static address and assigned dynamic address can be
1699 		 * equal, allow this case to pass.
1700 		 */
1701 		if (status != I3C_ADDR_SLOT_FREE &&
1702 		    dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1703 			return -EBUSY;
1704 
1705 		i3c_bus_set_addr_slot_status(&master->bus,
1706 					     dev->info.static_addr,
1707 					     I3C_ADDR_SLOT_I3C_DEV);
1708 	}
1709 
1710 	/*
1711 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1712 	 * trying to apply a pre-reserved dynamic address, we should not try
1713 	 * to reserve the address slot a second time.
1714 	 */
1715 	if (dev->info.dyn_addr &&
1716 	    (!dev->boardinfo ||
1717 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1718 		status = i3c_bus_get_addr_slot_status(&master->bus,
1719 						      dev->info.dyn_addr);
1720 		if (status != I3C_ADDR_SLOT_FREE)
1721 			goto err_release_static_addr;
1722 
1723 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1724 					     I3C_ADDR_SLOT_I3C_DEV);
1725 	}
1726 
1727 	return 0;
1728 
1729 err_release_static_addr:
1730 	if (dev->info.static_addr)
1731 		i3c_bus_set_addr_slot_status(&master->bus,
1732 					     dev->info.static_addr,
1733 					     I3C_ADDR_SLOT_FREE);
1734 
1735 	return -EBUSY;
1736 }
1737 
1738 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1739 				     struct i3c_dev_desc *dev)
1740 {
1741 	int ret;
1742 
1743 	/*
1744 	 * We don't attach devices to the controller until they are
1745 	 * addressable on the bus.
1746 	 */
1747 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1748 		return 0;
1749 
1750 	ret = i3c_master_get_i3c_addrs(dev);
1751 	if (ret)
1752 		return ret;
1753 
1754 	/* Do not attach the master device itself. */
1755 	if (master->this != dev && master->ops->attach_i3c_dev) {
1756 		ret = master->ops->attach_i3c_dev(dev);
1757 		if (ret) {
1758 			i3c_master_put_i3c_addrs(dev);
1759 			return ret;
1760 		}
1761 	}
1762 
1763 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1764 
1765 	return 0;
1766 }
1767 
1768 /**
1769  * i3c_master_reattach_i3c_dev_locked() - reattach an I3C device with a new address
1770  * @dev: I3C device descriptor to reattach
1771  * @old_dyn_addr: previous dynamic address of the device
1772  *
1773  * This function reattaches an existing I3C device to the bus when its dynamic
1774  * address has changed. It updates the bus address slot status accordingly:
1775  * - Marks the new dynamic address as occupied by an I3C device.
1776  * - Frees the old dynamic address slot if applicable.
1777  *
1778  * This function must be called with the bus lock held in write mode.
1779  *
1780  * Return: 0 on success, or a negative error code if reattachment fails
1781  *         (e.g. -EBUSY if the new address slot is not free).
1782  */
1783 int i3c_master_reattach_i3c_dev_locked(struct i3c_dev_desc *dev,
1784 				       u8 old_dyn_addr)
1785 {
1786 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1787 	int ret;
1788 
1789 	if (dev->info.dyn_addr != old_dyn_addr) {
1790 		i3c_bus_set_addr_slot_status(&master->bus,
1791 					     dev->info.dyn_addr,
1792 					     I3C_ADDR_SLOT_I3C_DEV);
1793 		if (old_dyn_addr)
1794 			i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1795 						     I3C_ADDR_SLOT_FREE);
1796 	}
1797 
1798 	if (master->ops->reattach_i3c_dev) {
1799 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1800 		if (ret) {
1801 			i3c_master_put_i3c_addrs(dev);
1802 			return ret;
1803 		}
1804 	}
1805 
1806 	return 0;
1807 }
1808 EXPORT_SYMBOL_GPL(i3c_master_reattach_i3c_dev_locked);
1809 
1810 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1811 {
1812 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1813 
1814 	/* Do not detach the master device itself. */
1815 	if (master->this != dev && master->ops->detach_i3c_dev)
1816 		master->ops->detach_i3c_dev(dev);
1817 
1818 	i3c_master_put_i3c_addrs(dev);
1819 	list_del(&dev->common.node);
1820 }
1821 
1822 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1823 				     struct i2c_dev_desc *dev)
1824 {
1825 	int ret;
1826 
1827 	if (master->ops->attach_i2c_dev) {
1828 		ret = master->ops->attach_i2c_dev(dev);
1829 		if (ret)
1830 			return ret;
1831 	}
1832 
1833 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1834 
1835 	return 0;
1836 }
1837 
1838 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1839 {
1840 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1841 
1842 	list_del(&dev->common.node);
1843 
1844 	if (master->ops->detach_i2c_dev)
1845 		master->ops->detach_i2c_dev(dev);
1846 }
1847 
1848 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1849 					  struct i3c_dev_boardinfo *boardinfo)
1850 {
1851 	struct i3c_device_info info = {
1852 		.static_addr = boardinfo->static_addr,
1853 		.pid = boardinfo->pid,
1854 	};
1855 	struct i3c_dev_desc *i3cdev;
1856 	int ret;
1857 
1858 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1859 	if (IS_ERR(i3cdev))
1860 		return -ENOMEM;
1861 
1862 	i3cdev->boardinfo = boardinfo;
1863 
1864 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1865 	if (ret)
1866 		goto err_free_dev;
1867 
1868 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1869 					i3cdev->boardinfo->init_dyn_addr);
1870 	if (ret)
1871 		goto err_detach_dev;
1872 
1873 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1874 	ret = i3c_master_reattach_i3c_dev_locked(i3cdev, 0);
1875 	if (ret)
1876 		goto err_rstdaa;
1877 
1878 	ret = i3c_master_retrieve_dev_info(i3cdev);
1879 	if (ret)
1880 		goto err_rstdaa;
1881 
1882 	return 0;
1883 
1884 err_rstdaa:
1885 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1886 err_detach_dev:
1887 	i3c_master_detach_i3c_dev(i3cdev);
1888 err_free_dev:
1889 	i3c_master_free_i3c_dev(i3cdev);
1890 
1891 	return ret;
1892 }
1893 
1894 static void
1895 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1896 {
1897 	struct i3c_dev_desc *desc;
1898 	int ret;
1899 
1900 	if (!master->init_done)
1901 		return;
1902 
1903 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1904 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1905 			continue;
1906 
1907 		desc->dev = kzalloc_obj(*desc->dev);
1908 		if (!desc->dev)
1909 			continue;
1910 
1911 		desc->dev->bus = &master->bus;
1912 		desc->dev->desc = desc;
1913 		desc->dev->dev.parent = &master->dev;
1914 		desc->dev->dev.type = &i3c_device_type;
1915 		desc->dev->dev.bus = &i3c_bus_type;
1916 		desc->dev->dev.release = i3c_device_release;
1917 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1918 			     desc->info.pid);
1919 
1920 		if (desc->boardinfo)
1921 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1922 
1923 		ret = device_register(&desc->dev->dev);
1924 		if (ret) {
1925 			dev_err(&master->dev,
1926 				"Failed to add I3C device (err = %d)\n", ret);
1927 			put_device(&desc->dev->dev);
1928 		}
1929 	}
1930 }
1931 
1932 static void i3c_master_reg_work_fn(struct work_struct *work)
1933 {
1934 	struct i3c_master_controller *master = container_of(work, typeof(*master), reg_work);
1935 
1936 	i3c_bus_normaluse_lock(&master->bus);
1937 	if (!master->shutting_down)
1938 		i3c_master_register_new_i3c_devs(master);
1939 	i3c_bus_normaluse_unlock(&master->bus);
1940 }
1941 
1942 /**
1943  * i3c_master_dma_map_single() - Map buffer for single DMA transfer
1944  * @dev: device object of a device doing DMA
1945  * @buf: destination/source buffer for DMA
1946  * @len: length of transfer
1947  * @force_bounce: true, force to use a bounce buffer,
1948  *                false, function will auto check is a bounce buffer required
1949  * @dir: DMA direction
1950  *
1951  * Map buffer for a DMA transfer and allocate a bounce buffer if required.
1952  *
1953  * Return: I3C DMA transfer descriptor or NULL in case of error.
1954  */
1955 struct i3c_dma *i3c_master_dma_map_single(struct device *dev, void *buf,
1956 	size_t len, bool force_bounce, enum dma_data_direction dir)
1957 {
1958 	void *bounce __free(kfree) = NULL;
1959 	void *dma_buf = buf;
1960 
1961 	struct i3c_dma *dma_xfer __free(kfree) = kzalloc_obj(*dma_xfer);
1962 	if (!dma_xfer)
1963 		return NULL;
1964 
1965 	dma_xfer->dev = dev;
1966 	dma_xfer->buf = buf;
1967 	dma_xfer->dir = dir;
1968 	dma_xfer->len = len;
1969 	dma_xfer->map_len = len;
1970 
1971 	if (is_vmalloc_addr(buf))
1972 		force_bounce = true;
1973 
1974 	if (force_bounce) {
1975 		dma_xfer->map_len = ALIGN(len, cache_line_size());
1976 		if (dir == DMA_FROM_DEVICE)
1977 			bounce = kzalloc(dma_xfer->map_len, GFP_KERNEL);
1978 		else
1979 			bounce = kmemdup(buf, dma_xfer->map_len, GFP_KERNEL);
1980 		if (!bounce)
1981 			return NULL;
1982 		dma_buf = bounce;
1983 	}
1984 
1985 	dma_xfer->addr = dma_map_single(dev, dma_buf, dma_xfer->map_len, dir);
1986 	if (dma_mapping_error(dev, dma_xfer->addr))
1987 		return NULL;
1988 
1989 	dma_xfer->bounce_buf = no_free_ptr(bounce);
1990 	return no_free_ptr(dma_xfer);
1991 }
1992 EXPORT_SYMBOL_GPL(i3c_master_dma_map_single);
1993 
1994 /**
1995  * i3c_master_dma_unmap_single() - Unmap buffer after DMA
1996  * @dma_xfer: DMA transfer and mapping descriptor
1997  *
1998  * Unmap buffer and cleanup DMA transfer descriptor.
1999  */
2000 void i3c_master_dma_unmap_single(struct i3c_dma *dma_xfer)
2001 {
2002 	dma_unmap_single(dma_xfer->dev, dma_xfer->addr,
2003 			 dma_xfer->map_len, dma_xfer->dir);
2004 	if (dma_xfer->bounce_buf) {
2005 		if (dma_xfer->dir == DMA_FROM_DEVICE)
2006 			memcpy(dma_xfer->buf, dma_xfer->bounce_buf,
2007 			       dma_xfer->len);
2008 		kfree(dma_xfer->bounce_buf);
2009 	}
2010 	kfree(dma_xfer);
2011 }
2012 EXPORT_SYMBOL_GPL(i3c_master_dma_unmap_single);
2013 
2014 /**
2015  * i3c_master_set_info() - set master device information
2016  * @master: master used to send frames on the bus
2017  * @info: I3C device information
2018  *
2019  * Set master device info. This should be called from
2020  * &i3c_master_controller_ops->bus_init().
2021  *
2022  * Not all &i3c_device_info fields are meaningful for a master device.
2023  * Here is a list of fields that should be properly filled:
2024  *
2025  * - &i3c_device_info->dyn_addr
2026  * - &i3c_device_info->bcr
2027  * - &i3c_device_info->dcr
2028  * - &i3c_device_info->pid
2029  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
2030  *   &i3c_device_info->bcr
2031  *
2032  * This function must be called with the bus lock held in maintenance mode.
2033  *
2034  * Return: 0 if @info contains valid information (not every piece of
2035  * information can be checked, but we can at least make sure @info->dyn_addr
2036  * and @info->bcr are correct), -EINVAL otherwise.
2037  */
2038 int i3c_master_set_info(struct i3c_master_controller *master,
2039 			const struct i3c_device_info *info)
2040 {
2041 	struct i3c_dev_desc *i3cdev;
2042 	int ret;
2043 
2044 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
2045 		return -EINVAL;
2046 
2047 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
2048 	    master->secondary)
2049 		return -EINVAL;
2050 
2051 	if (master->this)
2052 		return -EINVAL;
2053 
2054 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
2055 	if (IS_ERR(i3cdev))
2056 		return PTR_ERR(i3cdev);
2057 
2058 	master->this = i3cdev;
2059 	master->bus.cur_master = master->this;
2060 
2061 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
2062 	if (ret)
2063 		goto err_free_dev;
2064 
2065 	return 0;
2066 
2067 err_free_dev:
2068 	i3c_master_free_i3c_dev(i3cdev);
2069 
2070 	return ret;
2071 }
2072 EXPORT_SYMBOL_GPL(i3c_master_set_info);
2073 
2074 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
2075 {
2076 	struct i3c_dev_desc *i3cdev, *i3ctmp;
2077 	struct i2c_dev_desc *i2cdev, *i2ctmp;
2078 
2079 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
2080 				 common.node) {
2081 		i3c_master_detach_i3c_dev(i3cdev);
2082 
2083 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
2084 			i3c_bus_set_addr_slot_status(&master->bus,
2085 					i3cdev->boardinfo->init_dyn_addr,
2086 					I3C_ADDR_SLOT_FREE);
2087 
2088 		i3c_master_free_i3c_dev(i3cdev);
2089 	}
2090 
2091 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
2092 				 common.node) {
2093 		i3c_master_detach_i2c_dev(i2cdev);
2094 		i3c_bus_set_addr_slot_status(&master->bus,
2095 					     i2cdev->addr,
2096 					     I3C_ADDR_SLOT_FREE);
2097 		i3c_master_free_i2c_dev(i2cdev);
2098 	}
2099 }
2100 
2101 /**
2102  * i3c_master_bus_init() - initialize an I3C bus
2103  * @master: main master initializing the bus
2104  *
2105  * This function is following all initialisation steps described in the I3C
2106  * specification:
2107  *
2108  * 1. Attach I2C devs to the master so that the master can fill its internal
2109  *    device table appropriately
2110  *
2111  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
2112  *    the master controller. That's usually where the bus mode is selected
2113  *    (pure bus or mixed fast/slow bus)
2114  *
2115  * 3. Instruct all devices on the bus to drop their dynamic address. This is
2116  *    particularly important when the bus was previously configured by someone
2117  *    else (for example the bootloader)
2118  *
2119  * 4. Disable all slave events.
2120  *
2121  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
2122  *    also have static_addr, try to pre-assign dynamic addresses requested by
2123  *    the FW with SETDASA and attach corresponding statically defined I3C
2124  *    devices to the master.
2125  *
2126  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
2127  *    remaining I3C devices
2128  *
2129  * Once this is done, all I3C and I2C devices should be usable.
2130  *
2131  * Return: a 0 in case of success, an negative error code otherwise.
2132  */
2133 static int i3c_master_bus_init(struct i3c_master_controller *master)
2134 {
2135 	enum i3c_addr_slot_status status;
2136 	struct i2c_dev_boardinfo *i2cboardinfo;
2137 	struct i3c_dev_boardinfo *i3cboardinfo;
2138 	struct i2c_dev_desc *i2cdev;
2139 	int ret;
2140 
2141 	/*
2142 	 * First attach all devices with static definitions provided by the
2143 	 * FW.
2144 	 */
2145 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2146 		status = i3c_bus_get_addr_slot_status(&master->bus,
2147 						      i2cboardinfo->base.addr);
2148 		if (status != I3C_ADDR_SLOT_FREE) {
2149 			ret = -EBUSY;
2150 			goto err_detach_devs;
2151 		}
2152 
2153 		i3c_bus_set_addr_slot_status(&master->bus,
2154 					     i2cboardinfo->base.addr,
2155 					     I3C_ADDR_SLOT_I2C_DEV);
2156 
2157 		i2cdev = i3c_master_alloc_i2c_dev(master,
2158 						  i2cboardinfo->base.addr,
2159 						  i2cboardinfo->lvr);
2160 		if (IS_ERR(i2cdev)) {
2161 			ret = PTR_ERR(i2cdev);
2162 			goto err_detach_devs;
2163 		}
2164 
2165 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
2166 		if (ret) {
2167 			i3c_master_free_i2c_dev(i2cdev);
2168 			goto err_detach_devs;
2169 		}
2170 	}
2171 
2172 	/*
2173 	 * Now execute the controller specific ->bus_init() routine, which
2174 	 * might configure its internal logic to match the bus limitations.
2175 	 */
2176 	ret = master->ops->bus_init(master);
2177 	if (ret)
2178 		goto err_detach_devs;
2179 
2180 	/*
2181 	 * The master device should have been instantiated in ->bus_init(),
2182 	 * complain if this was not the case.
2183 	 */
2184 	if (!master->this) {
2185 		dev_err(&master->dev,
2186 			"master_set_info() was not called in ->bus_init()\n");
2187 		ret = -EINVAL;
2188 		goto err_bus_cleanup;
2189 	}
2190 
2191 	if (master->ops->set_speed) {
2192 		ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
2193 		if (ret)
2194 			goto err_bus_cleanup;
2195 	}
2196 
2197 	/*
2198 	 * Reset all dynamic address that may have been assigned before
2199 	 * (assigned by the bootloader for example).
2200 	 */
2201 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2202 	if (ret)
2203 		goto err_bus_cleanup;
2204 
2205 	if (master->ops->set_speed) {
2206 		ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
2207 		if (ret)
2208 			goto err_bus_cleanup;
2209 	}
2210 
2211 	/*
2212 	 * Disable all slave events before starting DAA. When no active device
2213 	 * is on the bus, returns Mx error code M2, this error is ignored.
2214 	 */
2215 	ret = i3c_master_enec_disec_locked(master, I3C_BROADCAST_ADDR, false,
2216 					   I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
2217 					   I3C_CCC_EVENT_HJ, true);
2218 	if (ret)
2219 		goto err_bus_cleanup;
2220 
2221 	/*
2222 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
2223 	 * address and retrieve device information if needed.
2224 	 * In case pre-assign dynamic address fails, setting dynamic address to
2225 	 * the requested init_dyn_addr is retried after DAA is done in
2226 	 * i3c_master_add_i3c_dev_locked().
2227 	 */
2228 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2229 
2230 		/*
2231 		 * We don't reserve a dynamic address for devices that
2232 		 * don't explicitly request one.
2233 		 */
2234 		if (!i3cboardinfo->init_dyn_addr)
2235 			continue;
2236 
2237 		ret = i3c_bus_get_addr_slot_status(&master->bus,
2238 						   i3cboardinfo->init_dyn_addr);
2239 		if (ret != I3C_ADDR_SLOT_FREE) {
2240 			ret = -EBUSY;
2241 			goto err_rstdaa;
2242 		}
2243 
2244 		/* Do not mark as occupied until real device exist in bus */
2245 		i3c_bus_set_addr_slot_status_mask(&master->bus,
2246 						  i3cboardinfo->init_dyn_addr,
2247 						  I3C_ADDR_SLOT_EXT_DESIRED,
2248 						  I3C_ADDR_SLOT_EXT_STATUS_MASK);
2249 
2250 		/*
2251 		 * Only try to create/attach devices that have a static
2252 		 * address. Other devices will be created/attached when
2253 		 * DAA happens, and the requested dynamic address will
2254 		 * be set using SETNEWDA once those devices become
2255 		 * addressable.
2256 		 */
2257 
2258 		if (i3cboardinfo->static_addr)
2259 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
2260 	}
2261 
2262 	ret = i3c_master_do_daa(master);
2263 	if (ret)
2264 		goto err_rstdaa;
2265 
2266 	return 0;
2267 
2268 err_rstdaa:
2269 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2270 
2271 err_bus_cleanup:
2272 	if (master->ops->bus_cleanup)
2273 		master->ops->bus_cleanup(master);
2274 
2275 err_detach_devs:
2276 	i3c_master_detach_free_devs(master);
2277 
2278 	return ret;
2279 }
2280 
2281 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
2282 {
2283 	if (master->ops->bus_cleanup) {
2284 		int ret = i3c_master_rpm_get(master);
2285 
2286 		if (ret) {
2287 			dev_err(&master->dev,
2288 				"runtime resume error: master bus_cleanup() not done\n");
2289 		} else {
2290 			master->ops->bus_cleanup(master);
2291 			i3c_master_rpm_put(master);
2292 		}
2293 	}
2294 
2295 	i3c_master_detach_free_devs(master);
2296 }
2297 
2298 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
2299 {
2300 	struct i3c_master_controller *master = i3cdev->common.master;
2301 	struct i3c_dev_boardinfo *i3cboardinfo;
2302 
2303 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2304 		if (i3cdev->info.pid != i3cboardinfo->pid)
2305 			continue;
2306 
2307 		i3cdev->boardinfo = i3cboardinfo;
2308 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
2309 		return;
2310 	}
2311 }
2312 
2313 static struct i3c_dev_desc *
2314 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
2315 {
2316 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
2317 	struct i3c_dev_desc *i3cdev;
2318 
2319 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2320 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
2321 			return i3cdev;
2322 	}
2323 
2324 	return NULL;
2325 }
2326 
2327 /**
2328  * __i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2329  * @master: master used to send frames on the bus
2330  * @addr: I3C slave dynamic address assigned to the device
2331  * @probe: probe to see if the device is really present at @addr
2332  *
2333  * This function instantiates an I3C device object and adds it to the I3C device
2334  * list. All device information is retrieved using standard CCC commands.
2335  *
2336  * This function must be called with the bus lock held in write mode.
2337  */
2338 static void __i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2339 					    u8 addr, bool probe)
2340 {
2341 	struct i3c_device_info info = { .dyn_addr = addr };
2342 	struct i3c_dev_desc *newdev, *olddev;
2343 	u8 old_dyn_addr = addr, expected_dyn_addr;
2344 	struct i3c_ibi_setup ibireq = { };
2345 	bool enable_ibi = false;
2346 	bool no_dev = false;
2347 	int ret;
2348 
2349 	newdev = i3c_master_alloc_i3c_dev(master, &info);
2350 	if (IS_ERR(newdev)) {
2351 		ret = PTR_ERR(newdev);
2352 		goto err_prevent_addr_reuse;
2353 	}
2354 
2355 	ret = i3c_master_attach_i3c_dev(master, newdev);
2356 	if (ret)
2357 		goto err_free_dev;
2358 
2359 	/*
2360 	 * When a dynamic address is first assigned, there is no need to check
2361 	 * whether it is still assigned, however, if adding the device fails,
2362 	 * it will be attempted again later, at which point the address may
2363 	 * have been lost (e.g. due to power management), so for that case,
2364 	 * probe to see if the device is still present at the assigned address.
2365 	 */
2366 	if (probe && !i3c_master_i3c_dev_present(master, addr)) {
2367 		no_dev = true;
2368 		goto err_detach_dev;
2369 	}
2370 
2371 	ret = i3c_master_retrieve_dev_info(newdev);
2372 	if (ret)
2373 		goto err_detach_dev;
2374 
2375 	i3c_master_attach_boardinfo(newdev);
2376 
2377 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2378 	if (olddev) {
2379 		newdev->dev = olddev->dev;
2380 		if (newdev->dev)
2381 			newdev->dev->desc = newdev;
2382 
2383 		/*
2384 		 * We need to restore the IBI state too, so let's save the
2385 		 * IBI information and try to restore them after olddev has
2386 		 * been detached+released and its IBI has been stopped and
2387 		 * the associated resources have been freed.
2388 		 */
2389 		mutex_lock(&olddev->ibi_lock);
2390 		if (olddev->ibi) {
2391 			ibireq.handler = olddev->ibi->handler;
2392 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
2393 			ibireq.num_slots = olddev->ibi->num_slots;
2394 
2395 			if (olddev->ibi->enabled)
2396 				enable_ibi = true;
2397 			/*
2398 			 * The olddev should not receive any commands on the
2399 			 * i3c bus as it does not exist and has been assigned
2400 			 * a new address. This will result in NACK or timeout.
2401 			 * So, update the olddev->ibi->enabled flag to false
2402 			 * to avoid DISEC with OldAddr.
2403 			 */
2404 			olddev->ibi->enabled = false;
2405 			i3c_dev_free_ibi_locked(olddev);
2406 		}
2407 		mutex_unlock(&olddev->ibi_lock);
2408 
2409 		old_dyn_addr = olddev->info.dyn_addr;
2410 
2411 		i3c_master_detach_i3c_dev(olddev);
2412 		i3c_master_free_i3c_dev(olddev);
2413 	}
2414 
2415 	/*
2416 	 * Depending on our previous state, the expected dynamic address might
2417 	 * differ:
2418 	 * - if the device already had a dynamic address assigned, let's try to
2419 	 *   re-apply this one
2420 	 * - if the device did not have a dynamic address and the firmware
2421 	 *   requested a specific address, pick this one
2422 	 * - in any other case, keep the address automatically assigned by the
2423 	 *   master
2424 	 */
2425 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2426 		expected_dyn_addr = old_dyn_addr;
2427 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2428 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2429 	else
2430 		expected_dyn_addr = newdev->info.dyn_addr;
2431 
2432 	if (newdev->info.dyn_addr != expected_dyn_addr &&
2433 	    i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2434 		/*
2435 		 * Try to apply the expected dynamic address. If it fails, keep
2436 		 * the address assigned by the master.
2437 		 */
2438 		ret = i3c_master_setnewda_locked(master,
2439 						 newdev->info.dyn_addr,
2440 						 expected_dyn_addr);
2441 		if (!ret) {
2442 			old_dyn_addr = newdev->info.dyn_addr;
2443 			newdev->info.dyn_addr = expected_dyn_addr;
2444 			i3c_master_reattach_i3c_dev_locked(newdev, old_dyn_addr);
2445 		} else {
2446 			dev_err(&master->dev,
2447 				"Failed to assign reserved/old address to device %d%llx",
2448 				master->bus.id, newdev->info.pid);
2449 		}
2450 	}
2451 
2452 	/*
2453 	 * Now is time to try to restore the IBI setup. If we're lucky,
2454 	 * everything works as before, otherwise, all we can do is complain.
2455 	 * FIXME: maybe we should add callback to inform the driver that it
2456 	 * should request the IBI again instead of trying to hide that from
2457 	 * him.
2458 	 */
2459 	if (ibireq.handler) {
2460 		mutex_lock(&newdev->ibi_lock);
2461 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2462 		if (ret) {
2463 			dev_err(&master->dev,
2464 				"Failed to request IBI on device %d-%llx",
2465 				master->bus.id, newdev->info.pid);
2466 		} else if (enable_ibi) {
2467 			ret = i3c_dev_enable_ibi_locked(newdev);
2468 			if (ret)
2469 				dev_err(&master->dev,
2470 					"Failed to re-enable IBI on device %d-%llx",
2471 					master->bus.id, newdev->info.pid);
2472 		}
2473 		mutex_unlock(&newdev->ibi_lock);
2474 	}
2475 
2476 	return;
2477 
2478 err_detach_dev:
2479 	if (newdev->dev && newdev->dev->desc)
2480 		newdev->dev->desc = NULL;
2481 
2482 	i3c_master_detach_i3c_dev(newdev);
2483 
2484 err_free_dev:
2485 	i3c_master_free_i3c_dev(newdev);
2486 
2487 err_prevent_addr_reuse:
2488 	if (no_dev)
2489 		return;
2490 	/*
2491 	 * Although the device has not been added, the address has been
2492 	 * assigned. Prevent the address from being used again.
2493 	 */
2494 	if (i3c_bus_get_addr_slot_status(&master->bus, addr) == I3C_ADDR_SLOT_FREE)
2495 		i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_I3C_DEV);
2496 
2497 	dev_err(&master->dev, "Failed to add I3C device at address %u, error %d\n", addr, ret);
2498 }
2499 
2500 /**
2501  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2502  * @master: master used to send frames on the bus
2503  * @addr: I3C slave dynamic address assigned to the device
2504  *
2505  * This function instantiates an I3C device object and adds it to the
2506  * I3C device list. All device information is automatically retrieved using
2507  * standard CCC commands.
2508  *
2509  * This function must be called with the bus lock held in write mode.
2510  */
2511 void i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, u8 addr)
2512 {
2513 	__i3c_master_add_i3c_dev_locked(master, addr, false);
2514 }
2515 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2516 
2517 static void i3c_master_reconcile_dyn_addrs(struct i3c_master_controller *master)
2518 {
2519 	DECLARE_BITMAP(dev_dyn_addrs, I2C_MAX_ADDR + 1);
2520 	enum i3c_addr_slot_status status;
2521 	struct i3c_dev_desc *desc;
2522 
2523 	/* Mark all devices' dynamic and static addresses in the bitmap */
2524 	bitmap_zero(dev_dyn_addrs, I2C_MAX_ADDR + 1);
2525 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
2526 		if (desc->info.static_addr)
2527 			__set_bit(desc->info.static_addr, dev_dyn_addrs);
2528 		__set_bit(desc->info.dyn_addr, dev_dyn_addrs);
2529 	}
2530 	/* Reconcile the bitmap with the bus address slot status */
2531 	for (unsigned int addr = 0; addr <= I2C_MAX_ADDR; addr++) {
2532 		status = i3c_bus_get_addr_slot_status(&master->bus, addr);
2533 		if (status != I3C_ADDR_SLOT_I3C_DEV || test_bit(addr, dev_dyn_addrs))
2534 			continue;
2535 		i3c_bus_set_addr_slot_status(&master->bus, addr, I3C_ADDR_SLOT_FREE);
2536 		/* Try to add the device, but probe to see if it is really present */
2537 		__i3c_master_add_i3c_dev_locked(master, addr, true);
2538 	}
2539 }
2540 
2541 /**
2542  * i3c_master_do_daa_ext() - Dynamic Address Assignment (extended version)
2543  * @master: controller
2544  * @rstdaa: whether to first perform Reset of Dynamic Addresses (RSTDAA)
2545  *
2546  * Perform Dynamic Address Assignment with optional support for System
2547  * Hibernation (@rstdaa is true).
2548  *
2549  * After System Hibernation, Dynamic Addresses can have been reassigned at boot
2550  * time to different values. A simple strategy is followed to handle that.
2551  * Perform a Reset of Dynamic Addresses (RSTDAA) followed by the normal DAA
2552  * procedure which has provision for reassigning addresses that differ from the
2553  * previously recorded addresses.
2554  *
2555  * Return: a 0 in case of success, an negative error code otherwise.
2556  */
2557 int i3c_master_do_daa_ext(struct i3c_master_controller *master, bool rstdaa)
2558 {
2559 	int rstret = 0;
2560 	int ret;
2561 
2562 	ret = i3c_master_rpm_get(master);
2563 	if (ret)
2564 		return ret;
2565 
2566 	i3c_bus_maintenance_lock(&master->bus);
2567 
2568 	if (master->shutting_down) {
2569 		ret = -ENODEV;
2570 	} else {
2571 		if (rstdaa)
2572 			rstret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
2573 		ret = master->ops->do_daa(master);
2574 		/*
2575 		 * Handle cases where a dynamic address was assigned but the
2576 		 * device was not successfully added.
2577 		 */
2578 		i3c_master_reconcile_dyn_addrs(master);
2579 	}
2580 
2581 	i3c_bus_maintenance_unlock(&master->bus);
2582 
2583 	if (ret)
2584 		goto out;
2585 
2586 	queue_work(master->wq, &master->reg_work);
2587 out:
2588 	i3c_master_rpm_put(master);
2589 
2590 	return rstret ?: ret;
2591 }
2592 EXPORT_SYMBOL_GPL(i3c_master_do_daa_ext);
2593 
2594 /**
2595  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
2596  * @master: master doing the DAA
2597  *
2598  * This function instantiates I3C device objects and adds them to the
2599  * I3C device list. All device information is automatically retrieved using
2600  * standard CCC commands.
2601  *
2602  * Return: a 0 in case of success, an negative error code otherwise.
2603  */
2604 int i3c_master_do_daa(struct i3c_master_controller *master)
2605 {
2606 	return i3c_master_do_daa_ext(master, false);
2607 }
2608 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
2609 
2610 #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
2611 
2612 static int
2613 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2614 				struct device_node *node, u32 *reg)
2615 {
2616 	struct i2c_dev_boardinfo *boardinfo;
2617 	struct device *dev = &master->dev;
2618 	int ret;
2619 
2620 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2621 	if (!boardinfo)
2622 		return -ENOMEM;
2623 
2624 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2625 	if (ret)
2626 		return ret;
2627 
2628 	/*
2629 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2630 	 * address are supported. These devices can't be passed properly through
2631 	 * DEFSLVS command.
2632 	 */
2633 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2634 		dev_err(dev, "I2C device with 10 bit address not supported.\n");
2635 		return -EOPNOTSUPP;
2636 	}
2637 
2638 	/* LVR is encoded in reg[2]. */
2639 	boardinfo->lvr = reg[2];
2640 
2641 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2642 	of_node_get(node);
2643 
2644 	return 0;
2645 }
2646 
2647 static int
2648 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2649 				struct device_node *node, u32 *reg)
2650 {
2651 	struct i3c_dev_boardinfo *boardinfo;
2652 	struct device *dev = &master->dev;
2653 	enum i3c_addr_slot_status addrstatus;
2654 	u32 init_dyn_addr = 0;
2655 
2656 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2657 	if (!boardinfo)
2658 		return -ENOMEM;
2659 
2660 	if (reg[0]) {
2661 		if (reg[0] > I3C_MAX_ADDR)
2662 			return -EINVAL;
2663 
2664 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2665 							  reg[0]);
2666 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2667 			return -EINVAL;
2668 	}
2669 
2670 	boardinfo->static_addr = reg[0];
2671 
2672 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2673 		if (init_dyn_addr > I3C_MAX_ADDR)
2674 			return -EINVAL;
2675 
2676 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2677 							  init_dyn_addr);
2678 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2679 			return -EINVAL;
2680 	}
2681 
2682 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2683 
2684 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2685 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2686 		return -EINVAL;
2687 
2688 	boardinfo->init_dyn_addr = init_dyn_addr;
2689 	boardinfo->of_node = of_node_get(node);
2690 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2691 
2692 	return 0;
2693 }
2694 
2695 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2696 				 struct device_node *node)
2697 {
2698 	u32 reg[3];
2699 	int ret;
2700 
2701 	if (!master)
2702 		return -EINVAL;
2703 
2704 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2705 	if (ret)
2706 		return ret;
2707 
2708 	/*
2709 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2710 	 * dealing with an I2C device.
2711 	 */
2712 	if (!reg[1])
2713 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2714 	else
2715 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2716 
2717 	return ret;
2718 }
2719 
2720 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2721 {
2722 	struct device *dev = &master->dev;
2723 	struct device_node *i3cbus_np = dev->of_node;
2724 	int ret;
2725 	u32 val;
2726 
2727 	if (!i3cbus_np)
2728 		return 0;
2729 
2730 	for_each_available_child_of_node_scoped(i3cbus_np, node) {
2731 		ret = of_i3c_master_add_dev(master, node);
2732 		if (ret)
2733 			return ret;
2734 	}
2735 
2736 	/*
2737 	 * The user might want to limit I2C and I3C speed in case some devices
2738 	 * on the bus are not supporting typical rates, or if the bus topology
2739 	 * prevents it from using max possible rate.
2740 	 */
2741 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2742 		master->bus.scl_rate.i2c = val;
2743 
2744 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2745 		master->bus.scl_rate.i3c = val;
2746 
2747 	return 0;
2748 }
2749 
2750 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2751 				       struct i2c_msg *xfers, int nxfers)
2752 {
2753 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2754 	struct i2c_dev_desc *dev;
2755 	int i, ret;
2756 	u16 addr;
2757 
2758 	if (!xfers || !master || nxfers <= 0)
2759 		return -EINVAL;
2760 
2761 	if (!master->ops->i2c_xfers)
2762 		return -EOPNOTSUPP;
2763 
2764 	/* Doing transfers to different devices is not supported. */
2765 	addr = xfers[0].addr;
2766 	for (i = 1; i < nxfers; i++) {
2767 		if (addr != xfers[i].addr)
2768 			return -EOPNOTSUPP;
2769 	}
2770 
2771 	ret = i3c_master_rpm_get(master);
2772 	if (ret)
2773 		return ret;
2774 
2775 	i3c_bus_normaluse_lock(&master->bus);
2776 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2777 	if (!dev)
2778 		ret = -ENOENT;
2779 	else
2780 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2781 	i3c_bus_normaluse_unlock(&master->bus);
2782 
2783 	i3c_master_rpm_put(master);
2784 
2785 	return ret ? ret : nxfers;
2786 }
2787 
2788 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2789 {
2790 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2791 }
2792 
2793 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2794 {
2795 	/* Fall back to no spike filters and FM bus mode. */
2796 	u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2797 	u32 reg[3];
2798 
2799 	if (!of_property_read_u32_array(client->dev.of_node, "reg", reg, ARRAY_SIZE(reg)))
2800 		lvr = reg[2];
2801 
2802 	return lvr;
2803 }
2804 
2805 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2806 {
2807 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2808 	enum i3c_addr_slot_status status;
2809 	struct i2c_dev_desc *i2cdev;
2810 	int ret;
2811 
2812 	/* Already added by board info? */
2813 	if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2814 		return 0;
2815 
2816 	status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2817 	if (status != I3C_ADDR_SLOT_FREE)
2818 		return -EBUSY;
2819 
2820 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2821 				     I3C_ADDR_SLOT_I2C_DEV);
2822 
2823 	i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2824 					  i3c_master_i2c_get_lvr(client));
2825 	if (IS_ERR(i2cdev)) {
2826 		ret = PTR_ERR(i2cdev);
2827 		goto out_clear_status;
2828 	}
2829 
2830 	ret = i3c_master_attach_i2c_dev(master, i2cdev);
2831 	if (ret)
2832 		goto out_free_dev;
2833 
2834 	return 0;
2835 
2836 out_free_dev:
2837 	i3c_master_free_i2c_dev(i2cdev);
2838 out_clear_status:
2839 	i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2840 				     I3C_ADDR_SLOT_FREE);
2841 
2842 	return ret;
2843 }
2844 
2845 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2846 {
2847 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2848 	struct i2c_dev_desc *dev;
2849 
2850 	dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2851 	if (!dev)
2852 		return -ENODEV;
2853 
2854 	i3c_master_detach_i2c_dev(dev);
2855 	i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2856 				     I3C_ADDR_SLOT_FREE);
2857 	i3c_master_free_i2c_dev(dev);
2858 
2859 	return 0;
2860 }
2861 
2862 static const struct i2c_algorithm i3c_master_i2c_algo = {
2863 	.master_xfer = i3c_master_i2c_adapter_xfer,
2864 	.functionality = i3c_master_i2c_funcs,
2865 };
2866 
2867 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2868 				 void *data)
2869 {
2870 	struct i2c_adapter *adap;
2871 	struct i2c_client *client;
2872 	struct device *dev = data;
2873 	struct i3c_master_controller *master;
2874 	int ret;
2875 
2876 	if (dev->type != &i2c_client_type)
2877 		return 0;
2878 
2879 	client = to_i2c_client(dev);
2880 	adap = client->adapter;
2881 
2882 	if (adap->algo != &i3c_master_i2c_algo)
2883 		return 0;
2884 
2885 	master = i2c_adapter_to_i3c_master(adap);
2886 
2887 	ret = i3c_master_rpm_get(master);
2888 	if (ret)
2889 		return ret;
2890 
2891 	i3c_bus_maintenance_lock(&master->bus);
2892 	switch (action) {
2893 	case BUS_NOTIFY_ADD_DEVICE:
2894 		ret = i3c_master_i2c_attach(adap, client);
2895 		break;
2896 	case BUS_NOTIFY_DEL_DEVICE:
2897 		ret = i3c_master_i2c_detach(adap, client);
2898 		break;
2899 	default:
2900 		ret = -EINVAL;
2901 	}
2902 	i3c_bus_maintenance_unlock(&master->bus);
2903 
2904 	i3c_master_rpm_put(master);
2905 
2906 	return ret;
2907 }
2908 
2909 static struct notifier_block i2cdev_notifier = {
2910 	.notifier_call = i3c_i2c_notifier_call,
2911 };
2912 
2913 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2914 {
2915 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2916 	struct i2c_dev_desc *i2cdev;
2917 	struct i2c_dev_boardinfo *i2cboardinfo;
2918 	int ret, id;
2919 
2920 	adap->dev.parent = master->dev.parent;
2921 	adap->owner = master->dev.parent->driver->owner;
2922 	adap->algo = &i3c_master_i2c_algo;
2923 	strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2924 	adap->timeout = HZ;
2925 	adap->retries = 3;
2926 
2927 	id = of_alias_get_id(master->dev.of_node, "i2c");
2928 	if (id >= 0) {
2929 		adap->nr = id;
2930 		ret = i2c_add_numbered_adapter(adap);
2931 	} else {
2932 		ret = i2c_add_adapter(adap);
2933 	}
2934 	if (ret)
2935 		return ret;
2936 
2937 	/*
2938 	 * We silently ignore failures here. The bus should keep working
2939 	 * correctly even if one or more i2c devices are not registered.
2940 	 */
2941 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2942 		i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2943 							 i2cboardinfo->base.addr);
2944 		if (WARN_ON(!i2cdev))
2945 			continue;
2946 		i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2947 	}
2948 
2949 	return 0;
2950 }
2951 
2952 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2953 {
2954 	struct i2c_dev_desc *i2cdev;
2955 
2956 	i2c_del_adapter(&master->i2c);
2957 
2958 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2959 		i2cdev->dev = NULL;
2960 }
2961 
2962 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2963 {
2964 	struct i3c_dev_desc *i3cdev;
2965 
2966 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2967 		if (!i3cdev->dev)
2968 			continue;
2969 
2970 		i3cdev->dev->desc = NULL;
2971 		if (device_is_registered(&i3cdev->dev->dev))
2972 			device_unregister(&i3cdev->dev->dev);
2973 		else
2974 			put_device(&i3cdev->dev->dev);
2975 		i3cdev->dev = NULL;
2976 	}
2977 }
2978 
2979 /**
2980  * i3c_master_queue_ibi() - Queue an IBI
2981  * @dev: the device this IBI is coming from
2982  * @slot: the IBI slot used to store the payload
2983  *
2984  * Queue an IBI to the controller workqueue. The IBI handler attached to
2985  * the dev will be called from a workqueue context.
2986  */
2987 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2988 {
2989 	if (!dev->ibi || !slot)
2990 		return;
2991 
2992 	atomic_inc(&dev->ibi->pending_ibis);
2993 	queue_work(dev->ibi->wq, &slot->work);
2994 }
2995 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2996 
2997 static void i3c_master_handle_ibi(struct work_struct *work)
2998 {
2999 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
3000 						 work);
3001 	struct i3c_dev_desc *dev = slot->dev;
3002 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3003 	struct i3c_ibi_payload payload;
3004 
3005 	payload.data = slot->data;
3006 	payload.len = slot->len;
3007 
3008 	if (dev->dev)
3009 		dev->ibi->handler(dev->dev, &payload);
3010 
3011 	master->ops->recycle_ibi_slot(dev, slot);
3012 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
3013 		complete(&dev->ibi->all_ibis_handled);
3014 }
3015 
3016 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
3017 				     struct i3c_ibi_slot *slot)
3018 {
3019 	slot->dev = dev;
3020 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
3021 }
3022 
3023 struct i3c_generic_ibi_slot {
3024 	struct list_head node;
3025 	struct i3c_ibi_slot base;
3026 };
3027 
3028 struct i3c_generic_ibi_pool {
3029 	spinlock_t lock;
3030 	unsigned int num_slots;
3031 	void *payload_buf;
3032 	struct list_head free_slots;
3033 	struct list_head pending;
3034 	struct i3c_generic_ibi_slot slots[] __counted_by(num_slots);
3035 };
3036 
3037 /**
3038  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
3039  * @pool: the IBI pool to free
3040  *
3041  * Free all IBI slots allated by a generic IBI pool.
3042  */
3043 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
3044 {
3045 	struct i3c_generic_ibi_slot *slot;
3046 	unsigned int nslots = 0;
3047 
3048 	while (!list_empty(&pool->free_slots)) {
3049 		slot = list_first_entry(&pool->free_slots,
3050 					struct i3c_generic_ibi_slot, node);
3051 		list_del(&slot->node);
3052 		nslots++;
3053 	}
3054 
3055 	/*
3056 	 * If the number of freed slots is not equal to the number of allocated
3057 	 * slots we have a leak somewhere.
3058 	 */
3059 	WARN_ON(nslots != pool->num_slots);
3060 
3061 	kfree(pool->payload_buf);
3062 	kfree(pool);
3063 }
3064 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
3065 
3066 /**
3067  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
3068  * @dev: the device this pool will be used for
3069  * @req: IBI setup request describing what the device driver expects
3070  *
3071  * Create a generic IBI pool based on the information provided in @req.
3072  *
3073  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
3074  */
3075 struct i3c_generic_ibi_pool *
3076 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
3077 			   const struct i3c_ibi_setup *req)
3078 {
3079 	struct i3c_generic_ibi_pool *pool;
3080 	struct i3c_generic_ibi_slot *slot;
3081 	unsigned int i;
3082 	int ret;
3083 
3084 	pool = kzalloc_flex(*pool, slots, req->num_slots);
3085 	if (!pool)
3086 		return ERR_PTR(-ENOMEM);
3087 
3088 	pool->num_slots = req->num_slots;
3089 
3090 	spin_lock_init(&pool->lock);
3091 	INIT_LIST_HEAD(&pool->free_slots);
3092 	INIT_LIST_HEAD(&pool->pending);
3093 
3094 	if (req->max_payload_len) {
3095 		pool->payload_buf = kcalloc(req->num_slots,
3096 					    req->max_payload_len, GFP_KERNEL);
3097 		if (!pool->payload_buf) {
3098 			ret = -ENOMEM;
3099 			goto err_free_pool;
3100 		}
3101 	}
3102 
3103 	for (i = 0; i < req->num_slots; i++) {
3104 		slot = &pool->slots[i];
3105 		i3c_master_init_ibi_slot(dev, &slot->base);
3106 
3107 		if (req->max_payload_len)
3108 			slot->base.data = pool->payload_buf +
3109 					  (i * req->max_payload_len);
3110 
3111 		list_add_tail(&slot->node, &pool->free_slots);
3112 	}
3113 
3114 	return pool;
3115 
3116 err_free_pool:
3117 	i3c_generic_ibi_free_pool(pool);
3118 	return ERR_PTR(ret);
3119 }
3120 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
3121 
3122 /**
3123  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
3124  * @pool: the pool to query an IBI slot on
3125  *
3126  * Search for a free slot in a generic IBI pool.
3127  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
3128  * when it's no longer needed.
3129  *
3130  * Return: a pointer to a free slot, or NULL if there's no free slot available.
3131  */
3132 struct i3c_ibi_slot *
3133 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
3134 {
3135 	struct i3c_generic_ibi_slot *slot;
3136 	unsigned long flags;
3137 
3138 	spin_lock_irqsave(&pool->lock, flags);
3139 	slot = list_first_entry_or_null(&pool->free_slots,
3140 					struct i3c_generic_ibi_slot, node);
3141 	if (slot)
3142 		list_del(&slot->node);
3143 	spin_unlock_irqrestore(&pool->lock, flags);
3144 
3145 	return slot ? &slot->base : NULL;
3146 }
3147 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
3148 
3149 /**
3150  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
3151  * @pool: the pool to return the IBI slot to
3152  * @s: IBI slot to recycle
3153  *
3154  * Add an IBI slot back to its generic IBI pool. Should be called from the
3155  * master driver struct_master_controller_ops->recycle_ibi() method.
3156  */
3157 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
3158 				  struct i3c_ibi_slot *s)
3159 {
3160 	struct i3c_generic_ibi_slot *slot;
3161 	unsigned long flags;
3162 
3163 	if (!s)
3164 		return;
3165 
3166 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
3167 	spin_lock_irqsave(&pool->lock, flags);
3168 	list_add_tail(&slot->node, &pool->free_slots);
3169 	spin_unlock_irqrestore(&pool->lock, flags);
3170 }
3171 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
3172 
3173 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
3174 {
3175 	if (!ops || !ops->bus_init || !ops->i3c_xfers ||
3176 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
3177 		return -EINVAL;
3178 
3179 	if (ops->request_ibi &&
3180 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
3181 	     !ops->recycle_ibi_slot))
3182 		return -EINVAL;
3183 
3184 	return 0;
3185 }
3186 
3187 /**
3188  * i3c_master_register() - register an I3C master
3189  * @master: master used to send frames on the bus
3190  * @parent: the parent device (the one that provides this I3C master
3191  *	    controller)
3192  * @ops: the master controller operations
3193  * @secondary: true if you are registering a secondary master. Will return
3194  *	       -EOPNOTSUPP if set to true since secondary masters are not yet
3195  *	       supported
3196  *
3197  * This function takes care of everything for you:
3198  *
3199  * - creates and initializes the I3C bus
3200  * - populates the bus with static I2C devs if @parent->of_node is not
3201  *   NULL
3202  * - registers all I3C devices added by the controller during bus
3203  *   initialization
3204  * - registers the I2C adapter and all I2C devices
3205  *
3206  * Return: 0 in case of success, a negative error code otherwise.
3207  */
3208 int i3c_master_register(struct i3c_master_controller *master,
3209 			struct device *parent,
3210 			const struct i3c_master_controller_ops *ops,
3211 			bool secondary)
3212 {
3213 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE;
3214 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
3215 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
3216 	struct i2c_dev_boardinfo *i2cbi;
3217 	int ret;
3218 
3219 	/* We do not support secondary masters yet. */
3220 	if (secondary)
3221 		return -EOPNOTSUPP;
3222 
3223 	ret = i3c_master_check_ops(ops);
3224 	if (ret)
3225 		return ret;
3226 
3227 	master->dev.parent = parent;
3228 	master->dev.of_node = of_node_get(parent->of_node);
3229 	master->dev.bus = &i3c_bus_type;
3230 	master->dev.type = &i3c_masterdev_type;
3231 	master->dev.release = i3c_masterdev_release;
3232 	master->ops = ops;
3233 	master->secondary = secondary;
3234 	INIT_LIST_HEAD(&master->boardinfo.i2c);
3235 	INIT_LIST_HEAD(&master->boardinfo.i3c);
3236 
3237 	ret = i3c_master_rpm_get(master);
3238 	if (ret)
3239 		return ret;
3240 
3241 	device_initialize(&master->dev);
3242 
3243 	master->dev.dma_mask = parent->dma_mask;
3244 	master->dev.coherent_dma_mask = parent->coherent_dma_mask;
3245 	master->dev.dma_parms = parent->dma_parms;
3246 
3247 	ret = i3c_bus_init(i3cbus, master->dev.of_node);
3248 	if (ret)
3249 		goto err_put_dev;
3250 
3251 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
3252 
3253 	ret = of_populate_i3c_bus(master);
3254 	if (ret)
3255 		goto err_put_dev;
3256 
3257 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
3258 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
3259 		case I3C_LVR_I2C_INDEX(0):
3260 			if (mode < I3C_BUS_MODE_MIXED_FAST)
3261 				mode = I3C_BUS_MODE_MIXED_FAST;
3262 			break;
3263 		case I3C_LVR_I2C_INDEX(1):
3264 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
3265 				mode = I3C_BUS_MODE_MIXED_LIMITED;
3266 			break;
3267 		case I3C_LVR_I2C_INDEX(2):
3268 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
3269 				mode = I3C_BUS_MODE_MIXED_SLOW;
3270 			break;
3271 		default:
3272 			ret = -EINVAL;
3273 			goto err_put_dev;
3274 		}
3275 
3276 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
3277 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_MAX_RATE;
3278 	}
3279 
3280 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
3281 	if (ret)
3282 		goto err_put_dev;
3283 
3284 	master->wq = alloc_workqueue("%s", WQ_PERCPU | WQ_FREEZABLE, 0, dev_name(parent));
3285 	if (!master->wq) {
3286 		ret = -ENOMEM;
3287 		goto err_put_dev;
3288 	}
3289 	INIT_WORK(&master->hj_work, i3c_master_hj_work_fn);
3290 	INIT_WORK(&master->reg_work, i3c_master_reg_work_fn);
3291 
3292 	ret = i3c_master_bus_init(master);
3293 	if (ret)
3294 		goto err_put_dev;
3295 
3296 	ret = device_add(&master->dev);
3297 	if (ret)
3298 		goto err_cleanup_bus;
3299 
3300 	/*
3301 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
3302 	 * through the I2C subsystem.
3303 	 */
3304 	ret = i3c_master_i2c_adapter_init(master);
3305 	if (ret)
3306 		goto err_del_dev;
3307 
3308 	i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
3309 
3310 	pm_runtime_no_callbacks(&master->dev);
3311 	pm_suspend_ignore_children(&master->dev, true);
3312 	pm_runtime_enable(&master->dev);
3313 
3314 	/*
3315 	 * We're done initializing the bus and the controller, we can now
3316 	 * register I3C devices discovered during the initial DAA. Device
3317 	 * registration is done via reg_work because that keeps a single
3318 	 * registration code path and ensures the worker is the only writer
3319 	 * of desc->dev. Flush the work to preserve synchronous probe-time
3320 	 * behavior.
3321 	 */
3322 	master->init_done = true;
3323 	queue_work(master->wq, &master->reg_work);
3324 	flush_work(&master->reg_work);
3325 
3326 	if (master->ops->set_dev_nack_retry)
3327 		device_create_file(&master->dev, &dev_attr_dev_nack_retry_count);
3328 
3329 	i3c_master_rpm_put(master);
3330 
3331 	return 0;
3332 
3333 err_del_dev:
3334 	device_del(&master->dev);
3335 
3336 err_cleanup_bus:
3337 	i3c_master_bus_cleanup(master);
3338 
3339 err_put_dev:
3340 	i3c_master_rpm_put(master);
3341 	put_device(&master->dev);
3342 
3343 	return ret;
3344 }
3345 EXPORT_SYMBOL_GPL(i3c_master_register);
3346 
3347 /**
3348  * i3c_master_unregister() - unregister an I3C master
3349  * @master: master used to send frames on the bus
3350  *
3351  * Basically undo everything done in i3c_master_register().
3352  */
3353 void i3c_master_unregister(struct i3c_master_controller *master)
3354 {
3355 	i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
3356 	i3c_master_shutdown(master);
3357 
3358 	if (master->ops->set_dev_nack_retry)
3359 		device_remove_file(&master->dev, &dev_attr_dev_nack_retry_count);
3360 
3361 	i3c_master_i2c_adapter_cleanup(master);
3362 	i3c_master_unregister_i3c_devs(master);
3363 	i3c_master_bus_cleanup(master);
3364 	pm_runtime_disable(&master->dev);
3365 	device_unregister(&master->dev);
3366 }
3367 EXPORT_SYMBOL_GPL(i3c_master_unregister);
3368 
3369 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
3370 {
3371 	struct i3c_master_controller *master;
3372 
3373 	if (!dev)
3374 		return -ENOENT;
3375 
3376 	master = i3c_dev_get_master(dev);
3377 	if (!master)
3378 		return -EINVAL;
3379 
3380 	if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
3381 		!dev->boardinfo->static_addr)
3382 		return -EINVAL;
3383 
3384 	return i3c_master_setdasa_locked(master, dev->info.static_addr,
3385 						dev->boardinfo->init_dyn_addr);
3386 }
3387 
3388 int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, struct i3c_xfer *xfers,
3389 			    int nxfers, enum i3c_xfer_mode mode)
3390 {
3391 	struct i3c_master_controller *master;
3392 
3393 	if (!dev)
3394 		return -ENOENT;
3395 
3396 	master = i3c_dev_get_master(dev);
3397 	if (!master || !xfers)
3398 		return -EINVAL;
3399 
3400 	if (mode != I3C_SDR && !(master->this->info.hdr_cap & BIT(mode)))
3401 		return -EOPNOTSUPP;
3402 
3403 	return master->ops->i3c_xfers(dev, xfers, nxfers, mode);
3404 }
3405 
3406 /**
3407  * i3c_dev_disable_ibi_locked() - Disable IBIs coming from a specific device
3408  * @dev: device on which IBIs should be disabled
3409  *
3410  * This function disable IBIs coming from a specific device and wait for
3411  * all pending IBIs to be processed.
3412  *
3413  * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3414  * Return: 0 in case of success, a negative error core otherwise.
3415  */
3416 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
3417 {
3418 	struct i3c_master_controller *master;
3419 	int ret;
3420 
3421 	if (!dev->ibi)
3422 		return -EINVAL;
3423 
3424 	master = i3c_dev_get_master(dev);
3425 	ret = master->ops->disable_ibi(dev);
3426 	if (ret)
3427 		return ret;
3428 
3429 	reinit_completion(&dev->ibi->all_ibis_handled);
3430 	if (atomic_read(&dev->ibi->pending_ibis))
3431 		wait_for_completion(&dev->ibi->all_ibis_handled);
3432 
3433 	dev->ibi->enabled = false;
3434 
3435 	return 0;
3436 }
3437 EXPORT_SYMBOL_GPL(i3c_dev_disable_ibi_locked);
3438 
3439 /**
3440  * i3c_dev_enable_ibi_locked() - Enable IBIs from a specific device (lock held)
3441  * @dev: device on which IBIs should be enabled
3442  *
3443  * This function enable IBIs coming from a specific device and wait for
3444  * all pending IBIs to be processed. This should be called on a device
3445  * where i3c_device_request_ibi() has succeeded.
3446  *
3447  * Note that IBIs from this device might be received before this function
3448  * returns to its caller.
3449  *
3450  * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3451  * Return: 0 on success, or a negative error code on failure.
3452  */
3453 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
3454 {
3455 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3456 	int ret;
3457 
3458 	if (!dev->ibi)
3459 		return -EINVAL;
3460 
3461 	ret = master->ops->enable_ibi(dev);
3462 	if (!ret)
3463 		dev->ibi->enabled = true;
3464 
3465 	return ret;
3466 }
3467 EXPORT_SYMBOL_GPL(i3c_dev_enable_ibi_locked);
3468 
3469 /**
3470  * i3c_dev_request_ibi_locked() - Request an IBI
3471  * @dev: device for which we should enable IBIs
3472  * @req: setup requested for this IBI
3473  *
3474  * This function is responsible for pre-allocating all resources needed to
3475  * process IBIs coming from @dev. When this function returns, the IBI is not
3476  * enabled until i3c_device_enable_ibi() is called.
3477  *
3478  * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3479  * Return: 0 in case of success, a negative error core otherwise.
3480  */
3481 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
3482 			       const struct i3c_ibi_setup *req)
3483 {
3484 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3485 	struct i3c_device_ibi_info *ibi;
3486 	int ret;
3487 
3488 	if (!master->ops->request_ibi)
3489 		return -EOPNOTSUPP;
3490 
3491 	if (dev->ibi)
3492 		return -EBUSY;
3493 
3494 	ibi = kzalloc_obj(*ibi);
3495 	if (!ibi)
3496 		return -ENOMEM;
3497 
3498 	ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
3499 	if (!ibi->wq) {
3500 		kfree(ibi);
3501 		return -ENOMEM;
3502 	}
3503 
3504 	atomic_set(&ibi->pending_ibis, 0);
3505 	init_completion(&ibi->all_ibis_handled);
3506 	ibi->handler = req->handler;
3507 	ibi->max_payload_len = req->max_payload_len;
3508 	ibi->num_slots = req->num_slots;
3509 
3510 	dev->ibi = ibi;
3511 	ret = master->ops->request_ibi(dev, req);
3512 	if (ret) {
3513 		kfree(ibi);
3514 		dev->ibi = NULL;
3515 	}
3516 
3517 	return ret;
3518 }
3519 EXPORT_SYMBOL_GPL(i3c_dev_request_ibi_locked);
3520 
3521 /**
3522  * i3c_dev_free_ibi_locked() - Free all resources needed for IBI handling
3523  * @dev: device on which you want to release IBI resources
3524  *
3525  * This function is responsible for de-allocating resources previously
3526  * allocated by i3c_device_request_ibi(). It should be called after disabling
3527  * IBIs with i3c_device_disable_ibi().
3528  *
3529  * Context: Must be called with mutex_lock(&dev->desc->ibi_lock) held.
3530  */
3531 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
3532 {
3533 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3534 
3535 	if (!dev->ibi)
3536 		return;
3537 
3538 	if (dev->ibi->enabled) {
3539 		int ret;
3540 
3541 		dev_err(&master->dev, "Freeing IBI that is still enabled\n");
3542 		ret = i3c_master_rpm_get(master);
3543 		if (!ret) {
3544 			ret = i3c_dev_disable_ibi_locked(dev);
3545 			i3c_master_rpm_put(master);
3546 		}
3547 		if (ret)
3548 			dev_err(&master->dev, "Failed to disable IBI before freeing\n");
3549 	}
3550 
3551 	master->ops->free_ibi(dev);
3552 
3553 	if (dev->ibi->wq) {
3554 		destroy_workqueue(dev->ibi->wq);
3555 		dev->ibi->wq = NULL;
3556 	}
3557 
3558 	kfree(dev->ibi);
3559 	dev->ibi = NULL;
3560 }
3561 EXPORT_SYMBOL_GPL(i3c_dev_free_ibi_locked);
3562 
3563 static int __init i3c_init(void)
3564 {
3565 	int res;
3566 
3567 	res = of_alias_get_highest_id("i3c");
3568 	if (res >= 0) {
3569 		mutex_lock(&i3c_core_lock);
3570 		__i3c_first_dynamic_bus_num = res + 1;
3571 		mutex_unlock(&i3c_core_lock);
3572 	}
3573 
3574 	res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3575 	if (res)
3576 		return res;
3577 
3578 	res = bus_register(&i3c_bus_type);
3579 	if (res)
3580 		goto out_unreg_notifier;
3581 
3582 	return 0;
3583 
3584 out_unreg_notifier:
3585 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3586 
3587 	return res;
3588 }
3589 subsys_initcall(i3c_init);
3590 
3591 static void __exit i3c_exit(void)
3592 {
3593 	bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3594 	idr_destroy(&i3c_bus_idr);
3595 	bus_unregister(&i3c_bus_type);
3596 }
3597 module_exit(i3c_exit);
3598 
3599 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3600 MODULE_DESCRIPTION("I3C core");
3601 MODULE_LICENSE("GPL v2");
3602